CD54ACT20 数据资料 dataSheet 下载
... B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators ...
... B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators ...
Tap Tempo LFO datasheet
... If the WAVE DISTORT CV input is not required, it can be tied to a fixed voltage. For a square wave output, this should be 2.5V. This can be produced by a pair of 10K resistors wired as a potential divider between 0V and +5V. If the LEVEL CV input is not required, it can be disabled by tying the inpu ...
... If the WAVE DISTORT CV input is not required, it can be tied to a fixed voltage. For a square wave output, this should be 2.5V. This can be produced by a pair of 10K resistors wired as a potential divider between 0V and +5V. If the LEVEL CV input is not required, it can be disabled by tying the inpu ...
AD7843
... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to ...
... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to ...
SY89829U Oct05
... single 1:20 LVPECL Clock Driver. The part is designed for use in low voltage (2.5V/3.3V) applications which require a large number of outputs to drive precisely aligned, ultra low skew signals to their destination. The input is multiplexed from either LVDS or LVPECL by the CLK_SEL pin. The LVDS inpu ...
... single 1:20 LVPECL Clock Driver. The part is designed for use in low voltage (2.5V/3.3V) applications which require a large number of outputs to drive precisely aligned, ultra low skew signals to their destination. The input is multiplexed from either LVDS or LVPECL by the CLK_SEL pin. The LVDS inpu ...
Triple Differential Driver for Wideband Video / AD8146
... may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods ma ...
... may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods ma ...
MAX4951C 6Gbps SATA Bidirectional Redriver with Input Equalization, General Description
... features an independent channel dynamic power-down mode where power consumption is reduced when no input signal is present. The device maintains output common-mode levels to meet internal SATA version 3.0 standards and prevent delays when coming out of lowpower mode. The device preserves signal inte ...
... features an independent channel dynamic power-down mode where power consumption is reduced when no input signal is present. The device maintains output common-mode levels to meet internal SATA version 3.0 standards and prevent delays when coming out of lowpower mode. The device preserves signal inte ...
SN54221, SN54LS221, SN74221, SN74LS221
... Pulse-width stability is achieved through internal compensation and is virtually independent of VCC and temperature. In most applications, pulse stability is limited only by the accuracy of external timing components. Jitter-free operation is maintained over the full temperature and VCC ranges for m ...
... Pulse-width stability is achieved through internal compensation and is virtually independent of VCC and temperature. In most applications, pulse stability is limited only by the accuracy of external timing components. Jitter-free operation is maintained over the full temperature and VCC ranges for m ...
1.5 to 2.5 Gbps Transceiver (Rev. D)
... The TLK2501 is a member of the transceiver family of multigigabit transceivers used in ultrahigh-speed bidirectional point-to-point data transmission systems. The TLK2501 supports an effective serial interface speed of 1.5 Gbps to 2.5 Gbps, providing up to 2 Gbps of data bandwidth. The TLK2501 is pi ...
... The TLK2501 is a member of the transceiver family of multigigabit transceivers used in ultrahigh-speed bidirectional point-to-point data transmission systems. The TLK2501 supports an effective serial interface speed of 1.5 Gbps to 2.5 Gbps, providing up to 2 Gbps of data bandwidth. The TLK2501 is pi ...
Ch 9
... Some Facts about Comparators: • Comparator output is high or low depending on which input has the higher voltage applied to it. • An open-loop op-amp can be used as a comparator. • Open-loop op-amps go into saturation, and they take a relatively long time to get out of saturation. • The output can “ ...
... Some Facts about Comparators: • Comparator output is high or low depending on which input has the higher voltage applied to it. • An open-loop op-amp can be used as a comparator. • Open-loop op-amps go into saturation, and they take a relatively long time to get out of saturation. • The output can “ ...
FEATURES FUNCTIONAL BLOCK DIAGRAM
... TTL-/CMOS-Compatible Output Stage ....................................7 ...
... TTL-/CMOS-Compatible Output Stage ....................................7 ...
CT425 PID Temperature Controller
... On/Off and Alarm work similarly with the only difference being how Hysteresis is used. Please see the Hysteresis description for further information. When set to Disabled, the output is de-energized regardless of the Reverse Acting setting. Reverse Acting: Setting this to True causes the respective ...
... On/Off and Alarm work similarly with the only difference being how Hysteresis is used. Please see the Hysteresis description for further information. When set to Disabled, the output is de-energized regardless of the Reverse Acting setting. Reverse Acting: Setting this to True causes the respective ...
MAX8529 1.5MHz Dual 180° Out-of-Phase PWM Step-Down Controller with POR General Description
... 4.75V to 23V. Each output is adjustable from sub-1V to 18V. Input voltage ripple and total RMS input ripple current are reduced by synchronized 180-degree out-ofphase operation. The switching frequency is adjustable from 600kHz to 1.5MHz with an external resistor. Alternatively, the controller can b ...
... 4.75V to 23V. Each output is adjustable from sub-1V to 18V. Input voltage ripple and total RMS input ripple current are reduced by synchronized 180-degree out-ofphase operation. The switching frequency is adjustable from 600kHz to 1.5MHz with an external resistor. Alternatively, the controller can b ...
TUSB2036 数据资料 dataSheet 下载
... power devices provide overcurrent inputs to the TUSB2036 OVRCUR terminals in case of an overcurrent condition, the corresponding PWRON terminals are disabled by the TUSB2036. In the ganged mode, all PWRON signals transition simultaneously, and any OVRCUR input can be used. In the nonganged mode, the ...
... power devices provide overcurrent inputs to the TUSB2036 OVRCUR terminals in case of an overcurrent condition, the corresponding PWRON terminals are disabled by the TUSB2036. In the ganged mode, all PWRON signals transition simultaneously, and any OVRCUR input can be used. In the nonganged mode, the ...
RF2472 2.4GHz LOW NOISE AMPLIFIER WITH ENABLE Features
... The 22nF bypass and coupling capacitors in the application schematics may seem excessively large for circuits intended to operate at 1.9GHz and 2.4GHz. These large capacitors provide a low impedance path to ground for second-order mixing products that leads to improved third-order intermodulation pe ...
... The 22nF bypass and coupling capacitors in the application schematics may seem excessively large for circuits intended to operate at 1.9GHz and 2.4GHz. These large capacitors provide a low impedance path to ground for second-order mixing products that leads to improved third-order intermodulation pe ...
A CURRENT-MODE LOGIC FREQUENCY DIVIDER
... A current-mode logic (CML) frequency divider is needed at the output of the DCO where the clock frequency is too high for standard CMOS logic flip-flops to operate. Since CML circuits consist of only NMOS transistors and resistors, and use limited voltage swings for their input and output signals, t ...
... A current-mode logic (CML) frequency divider is needed at the output of the DCO where the clock frequency is too high for standard CMOS logic flip-flops to operate. Since CML circuits consist of only NMOS transistors and resistors, and use limited voltage swings for their input and output signals, t ...
LTC2376-20 20-Bit, 250ksps, Low Power SAR
... may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may effect device reliability and lifetime. Note 2: All voltage values are with respect to ground. Note 3: When these pin voltages are taken below ground or above REF or OVDD, they will b ...
... may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may effect device reliability and lifetime. Note 2: All voltage values are with respect to ground. Note 3: When these pin voltages are taken below ground or above REF or OVDD, they will b ...
.Connection and Operation (Speed Control)
... be sure to use the supplied signal line (3.3 mm1 m [0.130 in.3.3 ft]). Connect the shield wire for the signal line to terminal L. Ensure proper connection on the external speed potentiometer or external DC voltage side so that the shield wire will not contact with another terminal. The input imp ...
... be sure to use the supplied signal line (3.3 mm1 m [0.130 in.3.3 ft]). Connect the shield wire for the signal line to terminal L. Ensure proper connection on the external speed potentiometer or external DC voltage side so that the shield wire will not contact with another terminal. The input imp ...
LMV761, LMV762/Q - Texas Instruments
... input offset voltage. The LMV761 single has a shutdown pin that can be used to disable the device and reduce the supply current. The LMV761 is available in a space-saving 6-pin SOT-23 or 8-Pin SOIC package. The LMV762 dual is available in 8-pin SOIC or VSSOP package. The LMV762Q-Q1 is available VSSO ...
... input offset voltage. The LMV761 single has a shutdown pin that can be used to disable the device and reduce the supply current. The LMV761 is available in a space-saving 6-pin SOT-23 or 8-Pin SOIC package. The LMV762 dual is available in 8-pin SOIC or VSSOP package. The LMV762Q-Q1 is available VSSO ...
MAX3941 10Gbps EAM Driver with Integrated Bias Network General Description
... incorporates the functions of a biasing circuit and a modulation circuit, with integrated control op amps externally programmed by DC voltages. The integrated bias circuit provides a programmable biasing current up to 50mA. This bias current reflects a bias voltage of up to 1.25V on an external 50Ω ...
... incorporates the functions of a biasing circuit and a modulation circuit, with integrated control op amps externally programmed by DC voltages. The integrated bias circuit provides a programmable biasing current up to 50mA. This bias current reflects a bias voltage of up to 1.25V on an external 50Ω ...
16Mb 256K x 16 MRAM Memory
... The MRAM is protected from write operations whenever VDD is less than VWI. As soon as VDD exceeds VDD(min), there is a startup time of 2 ms before read or write operations can start. This time allows memory power supplies to stabilize. The E and W control signals should track VDD on power up to VDD- ...
... The MRAM is protected from write operations whenever VDD is less than VWI. As soon as VDD exceeds VDD(min), there is a startup time of 2 ms before read or write operations can start. This time allows memory power supplies to stabilize. The E and W control signals should track VDD on power up to VDD- ...
Unit: 1 – Binary Systems and Logic Circuits
... The most basic logical unit system is gate circuit. There are several different types of gates with each perform differently from other logic gates. Digital signal consist of only two values, ‘0’ and ‘1’. These two values have logical meaning i.e. ‘1’ represents the existence of particular condition ...
... The most basic logical unit system is gate circuit. There are several different types of gates with each perform differently from other logic gates. Digital signal consist of only two values, ‘0’ and ‘1’. These two values have logical meaning i.e. ‘1’ represents the existence of particular condition ...
Features • Single
... Two 32-bit on-chip timers are available on the AT7912F. Each timer provides a 32-bit counter and a 32-bit reload register. The two timers can be operated independently or cascaded. The timers can be used to set an external signal when the timeout value is reached. Each timer can generate periodic in ...
... Two 32-bit on-chip timers are available on the AT7912F. Each timer provides a 32-bit counter and a 32-bit reload register. The two timers can be operated independently or cascaded. The timers can be used to set an external signal when the timeout value is reached. Each timer can generate periodic in ...
ACNT-H790-000E Datasheet
... the resistor is usually a compromise between minimizing power dissipation and maximizing accuracy. Smaller sense resistance decreases power dissipation, while larger sense resistance can improve circuit accuracy by utilizing the full input range of the ACNT-H79A/H790. ...
... the resistor is usually a compromise between minimizing power dissipation and maximizing accuracy. Smaller sense resistance decreases power dissipation, while larger sense resistance can improve circuit accuracy by utilizing the full input range of the ACNT-H79A/H790. ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.