• Study Resource
  • Explore
    • Arts & Humanities
    • Business
    • Engineering & Technology
    • Foreign Language
    • History
    • Math
    • Science
    • Social Science

    Top subcategories

    • Advanced Math
    • Algebra
    • Basic Math
    • Calculus
    • Geometry
    • Linear Algebra
    • Pre-Algebra
    • Pre-Calculus
    • Statistics And Probability
    • Trigonometry
    • other →

    Top subcategories

    • Astronomy
    • Astrophysics
    • Biology
    • Chemistry
    • Earth Science
    • Environmental Science
    • Health Science
    • Physics
    • other →

    Top subcategories

    • Anthropology
    • Law
    • Political Science
    • Psychology
    • Sociology
    • other →

    Top subcategories

    • Accounting
    • Economics
    • Finance
    • Management
    • other →

    Top subcategories

    • Aerospace Engineering
    • Bioengineering
    • Chemical Engineering
    • Civil Engineering
    • Computer Science
    • Electrical Engineering
    • Industrial Engineering
    • Mechanical Engineering
    • Web Design
    • other →

    Top subcategories

    • Architecture
    • Communications
    • English
    • Gender Studies
    • Music
    • Performing Arts
    • Philosophy
    • Religious Studies
    • Writing
    • other →

    Top subcategories

    • Ancient History
    • European History
    • US History
    • World History
    • other →

    Top subcategories

    • Croatian
    • Czech
    • Finnish
    • Greek
    • Hindi
    • Japanese
    • Korean
    • Persian
    • Swedish
    • Turkish
    • other →
 
Profile Documents Logout
Upload
A 32GBit/s communication SoC for a waferscale neuromorphic system
A 32GBit/s communication SoC for a waferscale neuromorphic system

... brain functions in order to realize novel cognition-derived computational functions [1,2]. The last years have seen a steady increase in the size of neuromorphic systems in order to handle more advanced cognitive tasks. These large-scale hardware systems for spiking neural networks require high-spee ...
DAC2904 数据资料 dataSheet 下载
DAC2904 数据资料 dataSheet 下载

... DIGITAL INPUTS AND TIMING The data input ports of the DAC2904 accept a standard positive coding with data bit D13 being the most significant bit (MSB). The converter outputs support a clock rate of up to 125MSPS. The best performance will typically be achieved with a symmetric duty cycle for write a ...
Paladin Transducers
Paladin Transducers

... • High protection against overload - up to 250 Amps for one second with current transducers. • High degree of mechanical shock and vibration resistance. ...
MAX221E ±15kV ESD-Protected, +5V, 1µA, Single RS-232 Transceiver with AutoShutdown General Description
MAX221E ±15kV ESD-Protected, +5V, 1µA, Single RS-232 Transceiver with AutoShutdown General Description

... assembly. The driver output and receiver input of the MAX221E have extra protection against static electricity. Maxim’s engineers have developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operatio ...
DOC
DOC

... A two-bit digitiser, with integrated demultiplexer, has been designed for operation up to 8 Giga-Samples/second. This circuit digitises the input signal at the full sample rate and then an on-chip 1-to-4 demultiplexer converts the output stream into 4 parallel outputs. Each output, at one quarter of ...
DS15BR400/DS15BR401 4-Channel LVDS Buffer/Repeater with
DS15BR400/DS15BR401 4-Channel LVDS Buffer/Repeater with

... The PWDN input activates a hardware powerdown mode. When the powerdown mode is active (PWDN=L), all input and output buffers and internal bias circuitry are powered off. When exiting powerdown mode, there is a delay associated with turning on bandgap references and input/output buffer circuits as in ...
MAX16976 28V, 600mA Automotive Step-Down Converter with Low Operating Current General Description
MAX16976 28V, 600mA Automotive Step-Down Converter with Low Operating Current General Description

... The MAX16976 is a constant-frequency, current-mode automotive buck converter with an integrated high-side switch. The device operates with input voltages from 3.5V to 28V and tolerates input transients up to 42V. During undervoltage events, such as cold-crank conditions, the internal pass device mai ...
AN-278 Designing with a New Super Fast Dual Norton Amplifier
AN-278 Designing with a New Super Fast Dual Norton Amplifier

... Combining gain with constant delay filtering: Another important application of the LM359 in data recovery systems is that of filtering. It is most desirable to prevent high frequency noise spikes from being coupled through the sensing stage causing erroneous readings, but the low pass filter used mu ...
LTC5582 - 40MHz to 10GHz RMS Power Detector with 57dB Dynamic Range.
LTC5582 - 40MHz to 10GHz RMS Power Detector with 57dB Dynamic Range.

... pin is internally biased to 1.585V and connected to an onchip 50pF capacitor to ground. The impedance between DEC and IN+ (or IN–) is 200Ω. The pin can be connected to the center tap of an external balun when terminated differentially. The pin can be floating or connected to ground via an AC-decoupl ...
EV10AS180AGS Low power L-Band 10-bit 1.5 GSps ADC
EV10AS180AGS Low power L-Band 10-bit 1.5 GSps ADC

... The EV10AS180A works in fully differential mode from analog inputs up to digital outputs. It operates in the first Nyquist and L-Band (Fin ranging from DC to 1800 MHz). DEMUX Ratio (1:1 or 1:2 or 1:4) can be selected with the 2 pins RS0, RS1. DEMUX outputs are synchronous on each port. A differentia ...
CD74HCT4067-Q1 数据资料 dataSheet 下载
CD74HCT4067-Q1 数据资料 dataSheet 下载

... Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to +7 V Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp curre ...
PPT - Electrical and Computer Engineering
PPT - Electrical and Computer Engineering

Document
Document

... A Non-Parallelizable Problem Let us consider the TSP(D) problem Suppose there is a parallel algorithm solving this problem Then there is a sequential algorithm that simulates the parallel one By Brent’s Principle, we have parallel time  no. of processors = total amount of work where the total amoun ...
ADuM5401 英文数据手册DataSheet下载
ADuM5401 英文数据手册DataSheet下载

Zero-Drift, High Voltage, Bidirectional Difference Amplifier AD8207
Zero-Drift, High Voltage, Bidirectional Difference Amplifier AD8207

... Figure 25. Simplified Schematic ...
Paladin Transducers 250 Series Class 0.5
Paladin Transducers 250 Series Class 0.5

... D.C. input versions accept signals over a wide range providing galvanic isolation between the input and output signal. Output is directly proportional to the input. Thermocouple models also incorporate cold junction compensation for all base metal Thermocouples, and Thermocouple break protection. Su ...
Asynchronous VLSI Design: An Introduction
Asynchronous VLSI Design: An Introduction

ZYBO Reference Manual Overview
ZYBO Reference Manual Overview

... A USB 2.0 port can deliver maximum 0.5A of current according to the specifications. This should provide enough power for lower complexity designs. An idling blank board consumes around 0.2A from the 5V input supply. As an example, the standalone lwIP echo server sample project replying to ping reque ...
AD7940 数据手册DataSheet下载
AD7940 数据手册DataSheet下载

... contains a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 7 MHz. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the devices to interface with microprocessors or DSPs. The input signal is sampled on ...
AD2s1205
AD2s1205

... If any fault condition (LOS, DOS, or LOT) is indicated by the AD2S1205, the output data must be presumed to be invalid. This means that even if a RESET or SAMPLE pulse releases the fault condition, the output data may be corrupted, even though a fault may not be immediately indicated after the RESET ...
LTC1487 - Ultra-Low Power RS485 with Low
LTC1487 - Ultra-Low Power RS485 with Low

... output will retain the last valid line signal due to the 45mV of hysteresis incorporated in the receiver circuit. If the LTC1487 transceiver inputs are left floating (unterminated), an internal pull-up of 10µA at the A input will force the receiver output to a known high state. ...
15-A, 48-V INPUT, 5-V OUTPUT, ISOLATED, 1/8th BRICK DC/DC
15-A, 48-V INPUT, 5-V OUTPUT, ISOLATED, 1/8th BRICK DC/DC

MC145151-2 and MC145152-2
MC145151-2 and MC145152-2

... Section 4.3, “Dual-Modulus Prescaling,” on page 21). The A inputs all have internal pull-up resistors that ensure that inputs left open will remain at a logic 1. OSCin, OSCout Reference Oscillator Input/Output (Pins 27, 26) These pins form an on-chip reference oscillator when connected to terminals ...
MAX5253 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface __________________General Description
MAX5253 +3V, Quad, 12-Bit Voltage-Output DAC with Serial Interface __________________General Description

... each DAC has a doubled-buffered input composed of an input register and a DAC register (see Functional Diagram). In addition to the four voltage outputs, each amplifier’s negative input is available to the user. The DACs are inverted R-2R ladder networks that convert 12-bit digital inputs into equiv ...
LCDX Hardware Guide
LCDX Hardware Guide

... There are two connections for Com1 on the LCDX board. The first is the DB-9 connector, it’s most commonly used for downloading user programs from the PC to the LCDX. The second Com1 connector is a 5-pin right angle header found on the other side of the board. The 5-pin headers first connection marke ...
< 1 ... 133 134 135 136 137 138 139 140 141 ... 363 >

Flip-flop (electronics)



In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.
  • studyres.com © 2025
  • DMCA
  • Privacy
  • Terms
  • Report