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IOSR Journal of Computer Engineering (IOSR-JCE)
IOSR Journal of Computer Engineering (IOSR-JCE)

MAX1208 12-Bit, 80Msps, 3.3V ADC General Description Features
MAX1208 12-Bit, 80Msps, 3.3V ADC General Description Features

... allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX1208 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX1208 supports both a single-ended and differential input clock drive. Wide ...
OVERCURRENT RELAY WITH IDMT
OVERCURRENT RELAY WITH IDMT

AN113 - Power Conversion, Measurement and Pulse Circuits
AN113 - Power Conversion, Measurement and Pulse Circuits

... the kHz range. Figure 13, a very simplistic battery model, shows a resistive divider with a partial shunt capacitive term. This capacitive term introduces error in AC-based measurement. Additionally, the battery’s unloaded internal resistance may significantly differ from its loaded value. As such, a ...
AD7660 数据手册DataSheet下载
AD7660 数据手册DataSheet下载

... GENERAL DESCRIPTION ...
Column-parallel CCD
Column-parallel CCD

... Clock amplitude for plot below is only 0.4 Vpk-pk Significant noise induced from clock Low clock due to very low dose inter-gate implant (not a resonance effect) Further tests to use CMOS-based drive chip (CPD1) ...
AD7899 数据手册DataSheet下载
AD7899 数据手册DataSheet下载

... Conversion Clock Input. CLKIN is an externally applied clock which allows the user to control the conversion rate of the AD7899. If the CLKIN input is high on the rising edge of CONVST an externally applied clock will be used as the conversion clock. If the CLKIN is low on the rising edge of CONVST ...
Accurately measuring ADC driving-circuit settling time (slyt262.PDF, 197 KB)
Accurately measuring ADC driving-circuit settling time (slyt262.PDF, 197 KB)

... low cost and low power dissipation. These ADCs use an unbuffered front end directly coupled to the sampling network. To effectively minimize noise and signal distortion, it is necessary to drive the ADC with a high-speed, lownoise, low-distortion operational amplifier.2 To achieve minimal distortion ...
Atmel AVR042: AVR Hardware Design Considerations 8-bit Atmel
Atmel AVR042: AVR Hardware Design Considerations 8-bit Atmel

Performance limits of switched-capacitor DC-DC converters
Performance limits of switched-capacitor DC-DC converters

... is lost on the capacitor esr’s and the switch on-resistances during each charge transfer to or from a capacitor. The energy loss is smaller if the ac components in capacitor voltages are smaller. In general, precise knowledge of all network parasitics is necessary in order to estimate the converter ...
Slide 1
Slide 1

... We see that the signal-to-noise ratio increases approximately 6dB for each bit added to the word length of the Quantized samples. ...
MEASUREMENTS OF ELECTRICAL QUANTITIES
MEASUREMENTS OF ELECTRICAL QUANTITIES

16-Bit 100 kSPS PulSAR Unipolar ADC with Reference AD7651
16-Bit 100 kSPS PulSAR Unipolar ADC with Reference AD7651

... When SER/PAR is LOW, this output is used as Bit 8 of the parallel port data output bus. When SER/PAR is HIGH, this output, part of the serial port, is used as a serial data output synchronized to SCLK. Conversion results are stored in an on-chip register. The AD7651 provides the conversion result, M ...
Optical Pulse Distortion Measurement Limitations in Linear Time
Optical Pulse Distortion Measurement Limitations in Linear Time

CARMALO
CARMALO

... period, measured with the linelength system. (bottom) Outdoor air temperature measured over the same period. The system is simple in concept. On each receiver, a sample of the laser carrying the ~1200 MHz reference signal is extracted with a 10 dB fiberoptic coupler and looped back to the lab on a s ...
Slide 1
Slide 1

... gain errors, the straight line is either a best-fit straight line or a line drawn between the end points of the transfer function.  INL is often called 'relative ...
AD7899 5 V Single Supply 14-Bit 400 kSPS ADC
AD7899 5 V Single Supply 14-Bit 400 kSPS ADC

... Conversion Clock Input. CLKIN is an externally applied clock which allows the user to control the conversion rate of the AD7899. If the CLKIN input is high on the rising edge of CONVST an externally applied clock will be used as the conversion clock. If the CLKIN is low on the rising edge of CONVST ...
MAX660 CMOS Monolithic Voltage Converter _______________General Description ___________________________ Features
MAX660 CMOS Monolithic Voltage Converter _______________General Description ___________________________ Features

... with a typical operating current of only 120µA provides ideal performance for both battery-powered and boardlevel voltage conversion applications. The MAX660 can also double the output voltage of an input power supply or battery, providing +9.35V at 100mA from a +5V input. A frequency control (FC) p ...
Chapter 5 Frequency Domain Analysis of Systems
Chapter 5 Frequency Domain Analysis of Systems

... Phase Function • Filters are usually designed based on specifications on the magnitude response | H ( ) | • The phase response arg H ( ) has to be taken into account too in order to prevent signal distortion as the signal goes through the system • If the filter has linear phase in its passband(s) ...
MAX9242/MAX9244/MAX9246/MAX9254 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance General Description
MAX9242/MAX9244/MAX9246/MAX9254 21-Bit Deserializers with Programmable Spread Spectrum and DC Balance General Description

High Efficiency, Fast Transient Synchronous Step
High Efficiency, Fast Transient Synchronous Step

... The NB638 is a fully integrated high frequency synchronous rectified step-down switch mode converter. It offers a very compact solution to achieve 6A continuous output current over a wide input supply range with excellent load and line regulation. The NB638 operates at high efficiency over a wide ou ...
General Description Features Block Diagram Pin Assignment 831724
General Description Features Block Diagram Pin Assignment 831724

... is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE 1: Measured from the differential input crossing point to the differential output crossing point. NOTE 2: ...
AD7652 数据手册DataSheet下载
AD7652 数据手册DataSheet下载

... When SER/PAR is LOW, this output is used as Bit 8 of the parallel port data output bus. When SER/PAR is HIGH, this output, part of the serial port, is used as a serial data output synchronized to SCLK. Conversion results are stored in an on-chip register. The AD7652 provides the conversion result, M ...
Technical Article How to Design Wideband Front Ends for GSPS Converters
Technical Article How to Design Wideband Front Ends for GSPS Converters

three phase scr control and regulation board
three phase scr control and regulation board

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Time-to-digital converter



In electronic instrumentation and signal processing, a time to digital converter (abbreviated TDC) is a device for recognizing events and providing a digital representation of the time they occurred. For example, a TDC might output the time of arrival for each incoming pulse. Some applications wish to measure the time interval between two events rather than some notion of an absolute time.In electronics time-to-digital converters (TDCs) or time digitizers are devices commonly used to measure a time interval and convert it into digital (binary) output. In some cases interpolating TDCs are also called time counters (TCs).TDCs are used in many different applications, where the time interval between two signal pulses (start and stop pulse) should be determined. Measurement is started and stopped, when either the rising or the falling edge of a signal pulse crosses a set threshold. These requirements are fulfilled in many physical experiments, like time-of-flight and lifetime measurements in atomic and high energy physics, experiments that involve laser ranging and electronic research involving the testing of integrated circuits and high-speed data transfer.
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