APPLICATION NOTE Designing With XC9500XL CPLDs
... mented with 5 p-terms from each directly adjacent neighbor taking the tally to 15 product terms. In this case, three more p-terms are needed, so the software must find them. The next site (to the north) requires two of its native 5 product terms, but three are available to meet the demand. The softw ...
... mented with 5 p-terms from each directly adjacent neighbor taking the tally to 15 product terms. In this case, three more p-terms are needed, so the software must find them. The next site (to the north) requires two of its native 5 product terms, but three are available to meet the demand. The softw ...
PPT - EECS - University of Michigan
... the ideal voltage levels at which code transitions occur and the actual voltage is the INL error, expressed in LSBs. INL error at any given point in an ADC's transfer function is the accumulation of all DNL errors of all previous (or lower) ADC codes, hence it's called integral nonlinearity. ...
... the ideal voltage levels at which code transitions occur and the actual voltage is the INL error, expressed in LSBs. INL error at any given point in an ADC's transfer function is the accumulation of all DNL errors of all previous (or lower) ADC codes, hence it's called integral nonlinearity. ...
Application Note AN-5053 Devices with a Synchronous Pixel Interface Introduction
... Standard 16- and 18-bit RGB display interfaces can be readily serialized and deserialized through use of the FIN224AC. For 8- and 10-bit RGB and YUV interfaces, the FIN212AC would be a more optimal solution. The FIN224AC has been designed to work synchronously over an input pixel clock frequency ran ...
... Standard 16- and 18-bit RGB display interfaces can be readily serialized and deserialized through use of the FIN224AC. For 8- and 10-bit RGB and YUV interfaces, the FIN212AC would be a more optimal solution. The FIN224AC has been designed to work synchronously over an input pixel clock frequency ran ...
LMX2305 PLLatinum 550 MHz Frequency Synthesizer for RF Personal Communications
... The LMX2305 is a high performance frequency synthesizer with an integrated prescaler designed for RF operation up to 550 MHz. It is fabricated using National’s ABiC IV BiCMOS process. The LMX2305 contains a dual modulus prescaler which can select either a 64/65 or a 128/129 divide ratio at input fre ...
... The LMX2305 is a high performance frequency synthesizer with an integrated prescaler designed for RF operation up to 550 MHz. It is fabricated using National’s ABiC IV BiCMOS process. The LMX2305 contains a dual modulus prescaler which can select either a 64/65 or a 128/129 divide ratio at input fre ...
Evaluates: MAX1180–MAX1186/MAX1190 MAX1181 Evaluation Kit General Description Features
... and tested circuit board that contains all the components necessary to evaluate the performance of the nonmultiplexed MAX1180–MAX1184 and MAX1190 or multiplexed MAX1185 and MAX1186, dual 10-bit analog-to-digital converters (ADC). The MAX1180–MAX1186 and MAX1190 accept differential or single-ended an ...
... and tested circuit board that contains all the components necessary to evaluate the performance of the nonmultiplexed MAX1180–MAX1184 and MAX1190 or multiplexed MAX1185 and MAX1186, dual 10-bit analog-to-digital converters (ADC). The MAX1180–MAX1186 and MAX1190 accept differential or single-ended an ...
A 20 Gb/s 0.3 pJ/b Single-Ended Die-to-Die
... cell. Therefore, each unit cell controls the output signal when its clock is high and its delayed clock is low. By connecting the appropriate clock phases to each of the pull-up and pulldown cells, the output is driven by only one cell at a time and each clock phase sees the same capacitive load. Th ...
... cell. Therefore, each unit cell controls the output signal when its clock is high and its delayed clock is low. By connecting the appropriate clock phases to each of the pull-up and pulldown cells, the output is driven by only one cell at a time and each clock phase sees the same capacitive load. Th ...
One-Chip Solution in 0.35 µm Standard CMOS for Electronic
... which technology should be used. The most popular approach is choosing a high voltage compatible BCD technology that makes it easy to design interfaces to the power electronics environment. A disadvantage is the low digital integration capability of these processes that make high integrated systems ...
... which technology should be used. The most popular approach is choosing a high voltage compatible BCD technology that makes it easy to design interfaces to the power electronics environment. A disadvantage is the low digital integration capability of these processes that make high integrated systems ...
Lab2 - Ece.umd.edu
... propagation delays, that input signals cannot change too fast, and that there is no chance for one of the questionable inputs to arise. The simplest, and most common, way to do this is to make the clock input a periodic signal, and to synchronize the input signals with the clock, resulting in synchr ...
... propagation delays, that input signals cannot change too fast, and that there is no chance for one of the questionable inputs to arise. The simplest, and most common, way to do this is to make the clock input a periodic signal, and to synchronize the input signals with the clock, resulting in synchr ...
AN394
... For a high to low transition, the Q on-chip output buffer has to discharge the bus capacitance through the R resistor and to sink some current from Vcc through the Rp resistor. The new time constant, when compared to that calculated earlier in this document, is reduced by 17%, because of the paralle ...
... For a high to low transition, the Q on-chip output buffer has to discharge the bus capacitance through the R resistor and to sink some current from Vcc through the Rp resistor. The new time constant, when compared to that calculated earlier in this document, is reduced by 17%, because of the paralle ...
Time-to-digital converter
In electronic instrumentation and signal processing, a time to digital converter (abbreviated TDC) is a device for recognizing events and providing a digital representation of the time they occurred. For example, a TDC might output the time of arrival for each incoming pulse. Some applications wish to measure the time interval between two events rather than some notion of an absolute time.In electronics time-to-digital converters (TDCs) or time digitizers are devices commonly used to measure a time interval and convert it into digital (binary) output. In some cases interpolating TDCs are also called time counters (TCs).TDCs are used in many different applications, where the time interval between two signal pulses (start and stop pulse) should be determined. Measurement is started and stopped, when either the rising or the falling edge of a signal pulse crosses a set threshold. These requirements are fulfilled in many physical experiments, like time-of-flight and lifetime measurements in atomic and high energy physics, experiments that involve laser ranging and electronic research involving the testing of integrated circuits and high-speed data transfer.