PICkit basics
... ;Inner loop takes 3 instructions ; per loop * 256 loops = 768 instructions ;The outer loop takes an additional 3 ; instructions per loopp * 256 loops ;(768+3) * 256 = 197376 instructions / ; 125K instructions per second = ...
... ;Inner loop takes 3 instructions ; per loop * 256 loops = 768 instructions ;The outer loop takes an additional 3 ; instructions per loopp * 256 loops ;(768+3) * 256 = 197376 instructions / ; 125K instructions per second = ...
AD9283 数据手册DataSheet下载
... of the output voltage swing to ease interfacing with 2.5 V or 3.3 V logic. The AD9283 goes into a low power state within two clock cycles following the assertion of the PWRDWN input. PWRDWN is asserted with a logic high. During power-down the outputs transition to a high impedance state. The time it ...
... of the output voltage swing to ease interfacing with 2.5 V or 3.3 V logic. The AD9283 goes into a low power state within two clock cycles following the assertion of the PWRDWN input. PWRDWN is asserted with a logic high. During power-down the outputs transition to a high impedance state. The time it ...
MAX125/MAX126 2x4-Channel, Simultaneous-Sampling 14-Bit DAS General Description
... Note 13: The data-access time is defined as the time required for an output to cross 0.8V or 2.0V. It is measured using the circuit of Figure 1. The measured number is then extrapolated back to determine the value with a 25pF load. Note 14: The bus-relinquish time is derived from the measured time t ...
... Note 13: The data-access time is defined as the time required for an output to cross 0.8V or 2.0V. It is measured using the circuit of Figure 1. The measured number is then extrapolated back to determine the value with a 25pF load. Note 14: The bus-relinquish time is derived from the measured time t ...
new approaches to the direct measurement of capacitance
... measurements in digital form requires the addition of an A/D converter with consequent loss of accuracy. In the PSD method the magnitude of the signal to be displayed depends on the total gain of the measuring system, frequency and amplitude of the driving source, and phase angle of the detected sig ...
... measurements in digital form requires the addition of an A/D converter with consequent loss of accuracy. In the PSD method the magnitude of the signal to be displayed depends on the total gain of the measuring system, frequency and amplitude of the driving source, and phase angle of the detected sig ...
Design of Low Power CMOS Crystal Oscillator with Tuning Capacitors
... operating in the weak inversion [8]. Its value should be high enough for the sake of frequency stability and power consumption. Moreover, the start-up condition can be satisfied more easily due to larger bias resistor [6]. In this realization, Rbias is around 100 M Ω by the biasing transistors M 4 a ...
... operating in the weak inversion [8]. Its value should be high enough for the sake of frequency stability and power consumption. Moreover, the start-up condition can be satisfied more easily due to larger bias resistor [6]. In this realization, Rbias is around 100 M Ω by the biasing transistors M 4 a ...
Interconnects and Routing
... SOI circuit innovations Clock system design micromicro-architecture L ...
... SOI circuit innovations Clock system design micromicro-architecture L ...
So far, we have only considered DC analysis and only resistive drops
... One solution is to insert buffers in the transmission line until the total delay of the line becomes much smaller than the delay of the buffer. For the buffer introduced we did minimize the delay. But this one dimensional minimization, we did mot study its effect on other parameters. . By introducin ...
... One solution is to insert buffers in the transmission line until the total delay of the line becomes much smaller than the delay of the buffer. For the buffer introduced we did minimize the delay. But this one dimensional minimization, we did mot study its effect on other parameters. . By introducin ...
correlation fundamentals
... As usual writing such equations down does little to inform our intuition on what is really happening! But the math is the exact model that we will attempt to execute in the imperfect world of electronic circuits. We need to break down EQ(1A) in to its individual operations so that we can better unde ...
... As usual writing such equations down does little to inform our intuition on what is really happening! But the math is the exact model that we will attempt to execute in the imperfect world of electronic circuits. We need to break down EQ(1A) in to its individual operations so that we can better unde ...
1.5A switch step down switching regulator
... RSENSE. The current is sensed through Rsense and if reaches the threshold, the mirror is unbalanced and the PDMOS is switched off until the next falling edge of the internal clock pulse. Due to this reduction of the ON time, the output voltage decreases. Since the minimum switch ON time (necessary t ...
... RSENSE. The current is sensed through Rsense and if reaches the threshold, the mirror is unbalanced and the PDMOS is switched off until the next falling edge of the internal clock pulse. Due to this reduction of the ON time, the output voltage decreases. Since the minimum switch ON time (necessary t ...
TS1108 Coulomb Counter User`s Guide
... using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein a ...
... using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. Application examples described herein a ...
MAX1112/MAX1113 +5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs General Description
... In differential mode, IN- and IN+ are internally switched to either of the analog inputs. This configuration is pseudo-differential to the effect that only the signal at IN+ is sampled. The return side (IN-) must remain stable within ±0.5 LSB (±0.1 LSB for best results) with respect to AGND during a ...
... In differential mode, IN- and IN+ are internally switched to either of the analog inputs. This configuration is pseudo-differential to the effect that only the signal at IN+ is sampled. The return side (IN-) must remain stable within ±0.5 LSB (±0.1 LSB for best results) with respect to AGND during a ...
GaGe PCIe/PCI Digitizer Data Sheet
... Note 1: The 4 GS Cobra model consumes an extra 3 Watts of power from the +5 Volts supply, as compared with the 256 MS model. Intermediate memory models consume extra power proportionately. Note 2: The 16 GS Cobra Express model consumes an extra 3 Watts of power from the +12V supply, as compared with ...
... Note 1: The 4 GS Cobra model consumes an extra 3 Watts of power from the +5 Volts supply, as compared with the 256 MS model. Intermediate memory models consume extra power proportionately. Note 2: The 16 GS Cobra Express model consumes an extra 3 Watts of power from the +12V supply, as compared with ...
9. Capacitor and Resistor Circuits
... However, the initial condition i0 is different this time as we shall see. Equation (18) can be integrated for the charge Q[t] obtaining Q@tD = Q@0D + i0 t 1 - ExpB- ...
... However, the initial condition i0 is different this time as we shall see. Equation (18) can be integrated for the charge Q[t] obtaining Q@tD = Q@0D + i0 t 1 - ExpB- ...
CN-0192
... buffer circuit shown in Figure 1 also provides gain to the AD2S1210 excitation output signal, as well as current drive capability. This circuit note describes the performance requirements and the recommended excitation buffer topology. A typical resolver has an input resistance in range of 100 Ω to ...
... buffer circuit shown in Figure 1 also provides gain to the AD2S1210 excitation output signal, as well as current drive capability. This circuit note describes the performance requirements and the recommended excitation buffer topology. A typical resolver has an input resistance in range of 100 Ω to ...
Low-Voltage Differential Signaling LVDS
... Low-voltage differential signaling (LVDS) is a signaling method used for high-speed transmission of binary data over copper. It is well recognized that the benefits of balanced data transmission begin to outweigh the costs over single-ended techniques when signal transition times approach 10 ns. Thi ...
... Low-voltage differential signaling (LVDS) is a signaling method used for high-speed transmission of binary data over copper. It is well recognized that the benefits of balanced data transmission begin to outweigh the costs over single-ended techniques when signal transition times approach 10 ns. Thi ...
Time-to-digital converter
In electronic instrumentation and signal processing, a time to digital converter (abbreviated TDC) is a device for recognizing events and providing a digital representation of the time they occurred. For example, a TDC might output the time of arrival for each incoming pulse. Some applications wish to measure the time interval between two events rather than some notion of an absolute time.In electronics time-to-digital converters (TDCs) or time digitizers are devices commonly used to measure a time interval and convert it into digital (binary) output. In some cases interpolating TDCs are also called time counters (TCs).TDCs are used in many different applications, where the time interval between two signal pulses (start and stop pulse) should be determined. Measurement is started and stopped, when either the rising or the falling edge of a signal pulse crosses a set threshold. These requirements are fulfilled in many physical experiments, like time-of-flight and lifetime measurements in atomic and high energy physics, experiments that involve laser ranging and electronic research involving the testing of integrated circuits and high-speed data transfer.