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JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 12, NO. 6, DECEMBER 2003
A Wafer-Scale Membrane Transfer Process
for the Fabrication of Optical Quality, Large
Continuous Membranes
Eui-Hyeok Yang, Associate Member, IEEE, and Dean V. Wiberg
Abstract—This paper describes a new fabrication technique
developed for the construction of large area mirror membranes
via the transfer of wafer-scale continuous membranes from one
substrate to another. Using this technique, wafer-scale silicon
mirror membranes have been successfully transferred without
the use of sacrificial layers such as adhesives or polymers. This
transfer technique has also been applied to the fabrication and
thick corrugated membrane actuators. These
transfer of 1
membrane actuators consist of several concentric-ring-type corrugations constructed within a polysilicon membrane. A typical
polysilicon actuator membrane with an electrode gap of 1.5
,
fabricated using the wafer-scale transfer technique, shows a
vertical deflection of 0.4
at 55 V. The mirror membranes
are constructed from single-crystal silicon, 10 cm in diameter,
and have been successfully transferred in their entirety. Using a
white-light interferometer, the measured average peak-to-valley
surface figure error for the transferred single-crystal silicon
mirror membranes is approximately 9 nm as measured over a
2 membrane area. The wafer-scale membrane transfer
1
technique demonstrated in this paper has the following benefits
over previously reported transfer techniques: 1) No postassembly
release process to remove sacrificial polymers is required. 2) The
bonded interface is completely isolated from any acid, etchant, or
solvent during the transfer process, ensuring a clean and uniform
membrane surface. 3) Our technique is capable of transferring
large, continuous membranes onto substrates.
[993]
m
m
m
mm
Index Terms—Adaptive optics, conitnuous membrane, deformable mirror, electrostatic actuator, membrane transfer, singlecrystal silicon, surface quality, wafer-scale.
I. BACKGROUND
F
UTURE ultralarge telescopes are currently envisioned
by the National Aeronautics and Space Administration
(NASA) and other academic institutions [1]. The primary
optics for these systems could be as large as 30 m in diameter.
The development of extremely large telescopes is scientifically driven by the need to achieve high-contrast imaging
and spectroscopic capabilities to enable the detection and
characterization of extra-solar planetary systems and their
precursor disk material. By significantly improving image
quality over the state-of-the-art, it is hoped that these future
telescopes will be capable of detecting faint objects in close
Manuscript received January 17, 2003; revised May 28, 2003. This work was
supported by the JPL’s Director’s Research and Development Fund. Subject
Editor D.-I. Cho.
The authors are with the Jet Propulsion Laboratory, California Institute
of Technology, Pasadena, CA 91109 USA (e-mail: Eui-Hyeok.Yang@
jpl.nasa.gov).
Digital Object Identifier 10.1109/JMEMS.2003.818454
proximity to bright sources. Ultimately, in order to achieve
the necessary high-contrast imaging of extra-solar planetary
systems, the development of advanced deformable mirror
technologies for higher-order wavefront correction is essential.
These deformable mirrors will be large, approximately 30 cm
individual actuators,
in diameter, with an array of
required for correcting the wavefront errors (see Fig. 1). Thus,
an optical quality, scalable, large deformable mirror with a
low influence function (negligible inter-actuator coupling) is
required for higher-order wavefront error correction over large
areas.
Conventional deformable mirrors have smooth, continuous
surfaces with low influence functions [2]. The conventional
mirrors, however, are manually fabricated and assembled, and
are therefore not scalable. Micromachined continuous-membrane deformable mirrors have been reported previously [3],
[4]. These approaches are scalable, however, they suffer from
having high influence functions. A surface-micromachined
continuous-membrane deformable mirror [5] has also been
demonstrated previously. The constraints imposed by the
surface micromachining process result in design limitations
and marginal mirror surface quality, compromising the ultimate applicability of this approach. Our proposed approach
overcomes the above limitations and is aimed at the fabrication
and assembly of optical quality, large area deformable mirrors
[6] as illustrated in Fig. 2. A continuous mirror membrane,
with a diameter of several tens of centimeters, constitutes the
single “large” deformable mirror surface, which is mounted
over an array of microactuators. The actuators themselves [see
Fig. 2(b)] form a deformable membrane and are attached to an
immobile base substrate. There are several possible schemes
for driving the deformable membrane actuator array, including
electrostatic actuation using electrodes on the substrate surface,
piezoelectric actuation via thin-film piezoelectric material
deposited on top of the actuator membrane, and electromagnetic actuation using micromachined coils patterned on top
of the actuator membrane. The specific actuator design to be
selected (taking into account the mechanism, size, and force
of the actuator) depends ultimately on the requirements set by
the optical system. For a reliable operation of the large-membrane/actuator-array combination, the large mirror membrane
needs to be fabricated on an array of actuators previously
mounted to a substrate. This requires that the entire mirror
membrane with diameters of as large as several tens of centimeters be manufactured and transferred as a single entity onto the
1057-7157/03$17.00 © 2003 IEEE
YANG AND WIBERG: WAFER-SCALE MEMBRANE TRANSFER PROCESS
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Fig. 1. Conceptual diagram of an adaptive optics system with a large deformable mirror requiring 10 000 microactuators for extremely large telescope
applications. The diameter of the large deformable mirror will be approximately 30 cm for a 30 m telescope.
actuator membrane. Previously developed deformable mirror
fabrication technologies [2]–[5] are not capable of meeting this
stringent requirement. Therefore, the development of a new
wafer-scale technique for the transfer of mirror membranes is
needed.
Several wafer-scale transfer techniques have been developed
to transfer devices or thin films over other substrates [7]–[10].
Some of these techniques are capable of transferring thin-film
microstructures, however such transfer processes have been
successful only for small device geometries. Wafer-scale
transfer techniques utilizing adhesives and/or molding materials have also been developed, [11]–[14]. However, the
use of intermediate sacrificial polymers is not suited for
the wafer-scale transfer of large format continuous mirror
membranes, because complete, residue-free removal of the
sacrificial polymeric materials is required. Polymer-etching
processes often leave residues on the transferred membrane,
and would therefore degrade the high surface quality required
for the mirror membranes. The development of an “intermediate-sacrificial-layer-free”, large-scale, membrane transfer
technique is essential for the realization of large deformable
mirrors for future large telescope applications.
In this paper, our novel approach to wafer-scale transfer is described, along with some of the results of the performance characterization. We have successfully demonstrated the membrane
transfer process using 10 cm diameter silicon wafers. Scaling
the transfer process to much larger diameters is easily achieved
and is essentially a matter of selecting larger silicon wafers. Our
focus in this paper is primarily to demonstrate the proof-ofprinciple for a new wafer-scale membrane transfer fabrication
technique capable of meeting the demanding requirements for
surface quality and scalability for future large area deformable
mirror applications.
II. WAFER-SCALE MEMBRANE TRANSFER PROCESS
In this section, the wafer-scale membrane transfer process
as applied to the fabrication of corrugated actuator membranes
and flat mirror membranes is presented. Section II-A describes
the wafer-scale transfer process and the subsequent fabrication required for polysilicon-based actuator membranes with
concentric-ring-type corrugations. The deflection performance
of the corrugated membrane actuators under electrostatic
actuation has been demonstrated, showing the feasibility of the
membrane transfer process as a reliable method of fabricating
microstructures with complicated geometries. Section II-B
describes the wafer-scale transfer process of single-crystal
silicon mirror membranes and the results of surface figure
characterization for these membranes. Although, in this paper,
silicon-on-insulator (SOI) wafers are used for the membrane
fabrication, this process can be adopted to transfer the membranes constructed from other materials such as silicon nitride,
silicon carbide, and nano-laminate [15].
A. Wafer-Scale Transfer of Corrugated Polysilicon Actuator
Membranes
A 1- -thick polysilicon membrane, 10 cm in diameter, was
successfully transferred onto a substrate wafer. This membrane
contains several concentric-ring-type corrugations, designed
both for accommodating the intrinsic stress in the as-deposited
polysilicon film and also for the low “influence function”
requirement.
The polysilicon actuator membrane is fabricated using
two silicon wafers. A corrugated polysilicon membrane is
fabricated on a SOI “carrier” wafer. The actuator membrane is
subsequently transferred to a substrate wafer. Fig. 3 shows the
process sequence for the generic (applicable to both actuator
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JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 12, NO. 6, DECEMBER 2003
(a)
(b)
Fig. 2. Conceptual schematic of the wafer-scale transfer for a large deformable mirror membrane onto a substrate wafer containing an actuator array membrane
on its surface. (a) Concept of a wafer-scale transfer process. (b) Cross-sectional view of the assembled, deformable mirror structure. The deformable membrane
actuators can be driven by several possible schemes such as electrostatic, magnetic, or piezoelectric actuation.
and mirror membranes) wafer-scale membrane transfer process
with the additional steps required for the fabrication of the
corrugated actuator membrane. A 0.5- -thick thermal oxide
is grown on the substrate silicon wafer [see Fig. 3(a)]. Subsequently, chromium/platinum/gold (Cr/Pt/Au) metal layers
are deposited by a thermal evaporation on the substrate wafer.
These metal layers are patterned using a lift-off process to form
electrode and bonding pad arrays [see Fig. 3(b)]. A 1- -thick
indium (In) layer is then deposited by a thermal evaporation,
after patterning photoresist to expose Au bonding pads. Since
In adheres only to the Au layer and not the thermal oxide, the
Au pad “localizes” the In deposit for subsequent thermo-compression bonding. Indium (In) oxidizes instantly upon exposure
to air, hindering bond formation. Thus, a preventive measure of
in situ deposition of a 100-angstrom-thick Au layer, “capping”
the indium surface, is performed. These deposited In/Au layers
for bonding are subsequently defined using a lift-off process
[see Fig. 3(c)].
The SOI carrier wafer, with a 5- -thick top silicon layer, is
prepared as illustrated in Fig. 3(d). The top silicon layer is then
YANG AND WIBERG: WAFER-SCALE MEMBRANE TRANSFER PROCESS
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(b)
(c)
Fig. 3. Process schematic showing the major steps in the two-wafer fabrication and transfer of corrugated polysilicon actuator membranes. (a) A silicon substrate
wafer is first thermally oxidized. (b) The electrode metal layers (Cr/Pt/Au) are deposited and patterned on the oxide surface. (c) The bonding material (In/Au) is
deposited and patterned using a lift-off process.
patterned and etched using a deep-reactive ion etcher (DRIE)
to define a 5- -thick corrugation profile [see Fig. 3(e)]. Subsequently a thermal oxidation step results in the growth of a
0.5- -thick oxide layer on the corrugation profile. A 1-thick polysilicon film is then deposited over the thermal oxide
layer, which is followed by a Cr/Pt/Au metal layer deposition
and patterning. Subsequently, the In/Au bonding metallization
is formed by the deposition and patterning using a lift off process
[see Fig. 3(f)].
The carrier wafer containing the corrugated polysilicon actuator membrane is subsequently bonded to the substrate wafer.
An Electronic Visions aligner and thermocompression bonder
are used to align and bond the two wafers. The bonder chamber
torr prior to the bonding operation.
is pumped down to 1
in the vacuum
A piston pressure of 4 kPa is applied at 156
chamber to provide the necessary thermo-compression bonding
force. The 100-angstrom-thick Au layers dissolves completely
to the indium layers during the bonding process. The bonding
corresponds to the melting point of
temperature of 156
indium, so the opposing indium posts on both wafers are
completely fused together. This thermo-compression bonding
process is an important step prior to the final membrane release
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JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 12, NO. 6, DECEMBER 2003
(d)
(e)
(f)
(g)
Fig. 3. (Continued.) Process schematic showing the major steps in the two-wafer fabrication and transfer of corrugated polysilicon actuator membranes. (d) An
SOI carrier wafer with a 5-m-thick top silicon layer is used to define a 5-m-deep corrugation profile. (e) The corrugation profile is patterned and etched on the
top silicon layer using a DRIE process. (f) Thermal oxide and polysilicon layers are subsequently deposited and patterned. The bonding metallization is deposited
and patterned on the carrier wafer using a lift-off process. (g) The carrier wafer is then bonded to the substrate wafer. The thermo-compression bonding is performed
at 1 10 torr with a piston pressure of 4 kPa at 156 C.
2
step by backside etching of the carrier SOI wafer [see Fig. 3(g)].
The backside etching is conducted in a 25 wt% solution of
until the
Tetramethylammonium hydroxide (TMAH) at 80
buried oxide is exposed. A specially designed Teflon fixture
is used to protect both the backside of the bonded substrate
wafer as well as the bonded interface [see Fig. 3(h)]. The
exposed oxide is first cleaned by oxygen
plasma ashing
and then removed by using dilute hydrofluoric acid (49% HF)
YANG AND WIBERG: WAFER-SCALE MEMBRANE TRANSFER PROCESS
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(h)
(i)
(j)
Fig. 3. (Continued.) Process schematic showing the major steps in the two-wafer fabrication and transfer of corrugated polysilicon actuator membranes. (h) The
backside of the SOI carrier wafer is etched in a 25 wt% Tetramethylammonium hydroxide (TMAH) bath until the buried oxide is exposed. (i) The buried oxide is
removed in a timed etch using dilute hydrofluoric acid (49% HF) droplets. (j) The SOI top silicon layer is subsequently etched using a SF plasma, followed by
removal of the thermal oxide.
droplets. The etching time is critically controlled since only the
0.5- -thick buried SOI oxide needs to be removed; the oxide
on the corrugated polysilicon layer, deposited in Fig. 3, step (f),
has to remain intact [see Fig. 3(i)]. The SOI top silicon layer
embedded within the corrugation is then etched away using a
plasma. The HF droplet etching
sulphur hexafluoride
process for removing the remaining thermal oxide follows the
silicon removal step. Finally, the exposed membrane surface
plasma ashing to remove any organic
is cleaned using
residues remaining on the membrane surface [see Fig. 3(j)].
plasma etch could be incorporated if necessary, with
An
a shadow mask, to selectively etch the polysilicon membrane
in order to release specific membrane structures (not shown in
this diagram).
Fig. 4 contains cross-sectional view for scanning electron
microscopy (SEM) micrographs of a 1- -thick polysilicon
membrane, which has been successfully transferred onto a substrate wafer. The gap between the membrane and the substrate
Fig. 4. Cross-sectional view SEM micrograph of the 1-m-thick transferred
polysilicon membrane.
is very uniform (
across a wafer diameter of 10 cm,
achieved by optimizing the bonding control). Fig. 5(a) contains
an SEM micrograph of a transfer-fabricated corrugated polysilicon membrane, electrostatic actuator array. Electrostatic actuation of the transfer-fabricated corrugated polysilicon mem-
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JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 12, NO. 6, DECEMBER 2003
(a)
(b)
Fig. 5. Wafer-scale transfer-fabricated corrugated polysilicon membrane actuator. (a) Cross-sectional schematic and corresponding SEM micrograph of the
electrostatic actuator configuration for the corrugated membrane. (b) Deflection characteristics of a single membrane actuator.
brane has been successfully demonstrated. For an electrode gap
(i.e., the gap between the membrane and substrate electrodes)
, a vertical deflection of approximately 0.4
is obof 1.5
tained at 55 V as shown in Fig. 5(b).
B. Single-Crystal Silicon Mirror Membrane Fabrication and
Characterization
As in the previous case, SOI carrier wafers are used for
the fabrication of the wafer-scale single-crystal silicon mirror
membrane. The mirror membrane transfer process involves the
transfer of the single-crystal silicon layer from the SOI wafer
following the metallization, bonding and etching processes
as shown in Fig. 6. Additional processing steps such as the
patterning of corrugations and the deposition of polysilicon
membrane are not required in this case. The thickness of the
transferred membrane is determined by the thickness of the
SOI top silicon layer.
A wafer-scale, 10- -thick single-crystal silicon mirror
membrane is transferred onto a bare substrate wafer. The substrate silicon wafer is prepared [see Fig. 6(a)]. Cr/Pt/Au metal
layers are deposited and patterned to form bonding pad arrays.
A 1- -thick In layer and a 100-angstrom thick Au layer are
subsequently deposited and patterned using a lift-off process
[see Fig. 6(b)]. The SOI carrier wafer, with a 10- -thick top
silicon layer, is prepared [see Fig. 6(c)]. Cr/Pt/Au metal layers
are deposited and patterned. Subsequently, the In/Au metal
layers are deposited and patterned [see Fig. 6(d)]. The SOI
YANG AND WIBERG: WAFER-SCALE MEMBRANE TRANSFER PROCESS
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(b)
(c)
(d)
Fig. 6. Process schematic for fabrication and transfer of single crystal silicon mirror membranes. The mirror membrane diameter is determined by the starting
wafer size. In this paper, we have used SOI wafers with 10 cm in diameter. (a) The silicon substrate wafer (bare, with no actuator membrane) is prepared for
thermo-compression bonding metallization. (b) The bonding material is deposited and patterned on the substrate. (c) An optically polished SOI carrier wafer is
used. (d) The electrode and bonding metallization is deposited and patterned on the carrier wafer surface.
carrier wafer is subsequently bonded to the substrate wafer
[see Fig. 6(e)]. The backside etching is conducted until the
buried oxide is exposed [see Fig. 6(f)]. The exposed oxide is
removed by using 49% HF droplets [see Fig. 6(g)]. An
plasma etch is incorporated, if necessary, to selectively etch the
transferred membrane in order to release membrane structures
[see Fig. 6(h)].
Fig. 7 contains photographs of a transferred, 10 cm in diameter, single crystal silicon mirror membrane. Fig. 8 contains
the results of interferometric surface figure measurements.
Fig. 8(a) shows the three dimensional surface figure for a
portion of the transferred 10
thick single crystal silicon
membrane taken immediately after the wafer bonding step
[e.g., Fig. 6, step (g)]. As bonded, the mirror membrane
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JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 12, NO. 6, DECEMBER 2003
(e)
(g)
(f)
(h)
Fig. 6. (Continued.) Process schematic for fabrication and transfer of single crystal silicon mirror membranes. The mirror membrane diameter is determined by
the starting wafer size. In this paper, we have used SOI wafers with 10 cm in diameter. (e) The carrier wafer is then thermo-compression bonded to the substrate
wafer. (f) The backside of the carrier wafer is etched until the etch stop layer (SOI buried oxide) is exposed. (g) The buried oxide is etched using 49% HF droplets,
exposing the top silicon layer of the SOI wafer (transferred membrane). (h) Additional patterning and etching can be performed, as necessary, to define smaller
mirror membranes.
(a)
(b)
Fig. 7. A 10-cm-diameter silicon mirror membrane was successfully transferred from an SOI carrier wafer to a substrate wafer. (a) Photograph of the wafer-scale
transferred silicon mirror membrane. (b) Patterned sector of the silicon mirror membrane for high-order “local” surface figure characterization.
hermetically seals the space above the substrate wafer and thus
exhibits atmospheric pressure-induced deflection. The transferred membrane is subsequently patterned and etched in order
to “flatten” the membrane by eliminating the encapsulated
vacuum resulting from the hermetic sealing. The high-order
surface figure of these flat membranes was characterized using
a white light interferometer (WYKO RST Plus interferometer).
The measured average peak-to-valley surface figure error for
YANG AND WIBERG: WAFER-SCALE MEMBRANE TRANSFER PROCESS
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(a)
(b)
2
Fig. 8. High-order peak-to-valley surface figure error measured at only 9 nm for the transferred mirror membrane (measured area of 1 mm 1 mm). The surface
figure measurement was made using the WYKO RST Plus white-light interferometer. (a) 3-D surface profile obtained from a local area of the transferred membrane
in the as-bonded condition, showing deflections resulting from the gauge pressure differential due to the hermetic seal. (b) Surface error profile for a “flat” membrane
produced by the further processing to break the encapsulated vacuum. The observed surface error can be attributed to the stress mismatch between the membrane
and the underlying indium bonding posts.
the mirror membrane (area 1
) is approximately 9 nm
as shown in Fig. 8(b). The observed surface error can be
attributed to the stress mismatch between the membrane and
the underlying indium bonding posts. These measurements
are made on a mirror membrane bonded to a bare substrate
wafer. Bonding to an actuator array in order to yield the final
device configuration will be part of the future development.
The surface profile of the transferred single crystal silicon
membrane is measured and compared with that for a typical
silicon wafer. Fig. 9 shows the power spectral density (PSD)
for the two silicon surfaces. The PSD plot obtained from the
transferred membrane [see Fig. 9(a)] is almost identical to that
from a typical silicon wafer [see Fig. 9(b)], and shows excellent
surface quality. Thus, this work has clearly demonstrated
that it is possible to successfully transfer a large area, optical
quality mirror membrane. The transferred mirror membrane
is essentially a replica of the carrier wafer in terms of surface
quality. Conventional optical-quality deformable mirrors are
typically specified to have a root-mean-square (rms) surface
, over 1 square inch area, at
, after
figure of
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JOURNAL OF MICROELECTROMECHANICAL SYSTEMS, VOL. 12, NO. 6, DECEMBER 2003
high surface quality for the transferred mirror membrane. The
surface figure of the entire membrane transferred on actuator
arrays will be characterized in the future.
These applications of this technique extend to the fabrication
of many other microdevices such as actuators, optical connectors, and RF switches in addition to deformable mirrors. The
deformable mirror concept described in this paper is targeted
for insertion into adaptive optics systems for future ultra-large
telescope systems.
ACKNOWLEDGMENT
(a)
The authors would like to thank Dr. T. George for valuable
technical comments. The authors would also like to thank Dr.
Y. Hishinuma for his assistance during the transfer process. The
research described in this paper was carried out at the Jet Propulsion Laboratory (JPL), California Institute of Technology, under
a contract with the National Aeronautics and Space Administration (NASA).
REFERENCES
(b)
Fig. 9. Average power spectral density (PSD) plots. The PSD plot obtained
from the transferred membrane is almost identical to that from a typical silicon
wafer, showing excellent surface quality. The transferred mirror membrane is
essentially a replica of the carrier wafer in terms of surface quality. (a) PSD plot
for a transferred silicon membrane. (b) PSD plot for a polished typical silicon
wafer.
performing an active compensation using underlying lead
magnesium niobate (PMN) actuators [2]. The locally measured
high-order surface figure error of 9 nm from the transferred,
wafer-scale, silicon mirror membrane far exceeds the surface
quality of state-of-the-art deformable mirrors.
III. CONCLUSION
A new wafer-scale silicon membrane transfer technique has
been successfully demonstrated. A 1- -thick polysilicon
membrane, 10 cm in diameter, has been successfully fabricated
and transferred to produce an array of electrostatic actuators
. A 10- -thick single crystal silicon
with a pitch of 200
mirror membrane has also been transferred onto a bare substrate
(without the actuator membrane layer) and its surface figure has
been determined. The high-order peak-to-valley surface figure
error for the transferred mirror membrane is 9 nm across an area
. The wafer-scale transfer technique demonstrated in
of 1
this paper does not involve the use of sacrificial adhesives or
polymers (i.e., wax, epoxy, or photoresist), thereby ensuring
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YANG AND WIBERG: WAFER-SCALE MEMBRANE TRANSFER PROCESS
Eui-Hyeok Yang (A’95) received the B.S, M.S., and
Ph.D. degree in the Department of Control and Instrumentation Engineering from Ajou University, Korea,
in 1990, 1992, and 1996, respectively.
He joined the Fujita MEMS research group
at Institute of Industrial Science, The University
of Tokyo, Japan, as a Visiting pPostdoctoral Researcher. He received a research fellowship from
the Japan Society for the Promotion of Science,
Japan, from 1996 to 1998. Since 1999, he has been
employed at NASA’s Jet Propulsion Laboratory
(JPL), Pasadena, CA, where he initiated the development of MEMS adaptive
optical devices. He has recently been granted several competitive proposals.
He is actively leading an adaptive optics and microfluidics thrust at JPL to
develop deformable mirrors, microactuators, and microvalves. He was involved
with the technical evaluation of MEMS mirror array technologies being
developed for NASA’s Multi Object Spectrometer (MOS) project for James
Webb Space Telescope (JWST). He was a technical monitor of a NASA SBIR
project for the development of active optical mirror devices. He has worked on
several electrostatic, thermo-pneumatic, piezoelectric, and shape memory alloy
devices for microfluidics systems, inertial microsensors and optical MEMS
devices. His current research interests are focused on microactuators, fluidic
microsystems and adaptive optics for Space applications. He is the author and
coauthor for over 70 refereed papers, conferences and invited papers.
Dr. Yang is a member of the program committee of SPIE micromachining and
microfabrication conference. He is currently a Senior Member of Engineering
Staff and the task manager for several technology development projects at JPL.
815
Dean V. Wiberg received the B.S. degree in
chemistry from Weber State University, Ogden, UT,
and the M.S. degree in chemical engineering from
Brigham Young University, Provo, UT, and has done
additional graduate work in Business Administration
and Materials Science at Utah State University,
Logan, and the University of Utah, Salt Lake City,
respectively.
He is a Senior Member Engineering Staff at
NASA’s Jet Propulsion Laboratory, Pasadena, CA.
He currently leads projects in the development
of microelectromechanical sytems (MEMS)-based devices and instruments
including miniature vacuum pumps, high precision gyroscopes, fuel cells,
turbine electric power generators and quadrupole mass filters. He has a broad
background which includes performing instrumental chemical analysis at the
U.S. Department of Labor-Occupational Safety and Health Administration
(OSHA), process engineering for alloy electroplating of thin film recording
heads at IBM, process development for industrial scale processing of Hafnium,
Zirconium and Titanium at Westinghouse, project engineering on battery and
propellant systems for U.S. Air Force Intercontinental Ballistic Missile Systems
at TRW and project leader for development of micro accelerometers, pressure
sensors and optical beam steering devices at Sarcos Research/University of
Utah. He has also been involved with several technology start-up companies
including, VaporFab, which was involved with chemical vapor deposition of
metals on high performance fibers and fabrics (e.g., graphite, Astroquartz) and
was sold to International Nickel Company (INCO).