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International Electrical Engineering Journal (IEEJ) Vol. 5 (2014) No.7, pp. 1484-1489 ISSN 2078-2365 http://www.ieejournal.com/ Performance Analysis of Diode Clamped 3 Level MOSFET Based Inverter Dnyaneshwar D. Khairnar and V. M. Deshmukh Department of Electronics and Telecommunication, COET Bambhori, Jalgaon, India Email: [email protected], [email protected] Abstract— At present, multilevel inverters are extensively used in industries for high power and high voltage applications. Two categories into which inverters can be broadly classified are two level inverters and multilevel inverters. The multilevel began with the three level converters. One advantage that multilevel inverters have compared to two level inverters is minimum harmonic distortion. This paper deals with study and analysis of three level diode clamped MOSFET based inverters and its applications in industries. The main purpose of the paper is to study and implement 3 level diode clamped inverter using MOSFET’s, the PWM signals used to switch these MOSFET’s has been generated using PWM IC HEF4752VP. However, the output voltage is smoother with a three level converter, these results in smaller harmonics, but on the other hand it has more components and it is little complex to control in hardware. Index Terms—multilevel, diode clamped, MSFET, PWM, harmonics. I. INTRODUCTION In our previous paper, we have studied the different topologies of multilevel inverters and compare their advantages and disadvantages. The short summary of these topologies has been explained in next section [7]. II. The basic three types of multilevel topologies used are: 1. Diode clamped multilevel inverters 2. Flying capacitors multilevel inverter or capacitor clamped multilevel inverter 3. Cascaded inverter with separate DC sources. We have chosen the diode clamped multilevel inverter topology to study and implement just because of its numerous advantages over other topologies and some of them are given as [6], [7], a. In recent years, industry has begun to demand higher power equipment. Multi-level inverters have been attracting increasing attention for power conversion in high-power applications due to their lower harmonics, higher efficiency, and lower voltage stress compared to two-level inverters [1], [13]. Multilevel inverter is based on the fact that sine wave can be approximated to a stepped waveform having large number of steps [6]. The steps being supplied from different DC levels supported by series connected batteries or capacitors. The unique structure of multi- level inverter allows them to reach high voltages and therefore lower voltage rating device can be used. As the number of levels increases, the synthesized output waveform has more steps, producing a very fine stair case wave and approaching very closely to the desired sine wave [3][9]. It can be easily understood that as motor steps are included in the waveform the harmonic distortion of the output wave decrease, approaching zero as the number of levels approaches infinity. Hence Multi- level inverters offer a better choice at the high power end because the high volt- ampere ratings are possible with these inverters without the problems of high dv/dt and the other associated ones [2]. DIFFERENT TOPOLOGIES OF MULTILEVEL INVERTERS b. c. d. e. f. III. When the number of levels is high enough, the harmonic content is Low to avoid the filters. Inverter efficiency is high because all devices are switching at the Fundamental frequency. The control method in diode clamped inverter is simple. The capacitors can be pre-charged as a group. Common Mode Voltage: Diode clamped produced a common mode voltage which reduce the stress on motor and protect it from the damage. It can draw current with low distortions [16]. DIODE CLAMPED MULTILEVEL INVERTER The most commonly used multilevel topology is the diode clamped inverter, in which the diode is used as the clamping device to clamp the dc bus voltage so as to achieve steps in the output voltage [11]. A three-level diode clamped inverter consists of two pairs of switches and two diodes [5]. Each switch pairs works in complimentary mode and the diodes used to provide access to mid-point voltage [4]. In a three-level inverter each of the three phases of the inverter shares a common dc bus, which has been subdivided by two capacitors into three levels. The DC bus voltage is split into three voltage levels by using two series connections of DC capacitors, C1 and C2. The voltage stress across each switching device is limited to Vdc through the clamping diodes Dc1 and Dc2. It is assumed that the total dc link voltage is Vdc and mid point is regulated at half of the dc link 1484 Khairnar and Deshmukh Performance Analysis of Diode Clamped 3 Level MOSFET Based Inverter International Electrical Engineering Journal (IEEJ) Vol. 5 (2014) No.7, pp. 1484-1489 ISSN 2078-2365 http://www.ieejournal.com/ voltage, the voltage across each capacitor is Vdc/2 (Vc1 = Vc2 = Vdc/2). In a three level diode clamped inverter, there are three different possible switching states which apply the stair case voltage on output voltage relating to DC link capacitor voltage rate. For a three-level inverter, a set of two switches is on at any given time and in a five-level inverter, a set of four switches is on at any given time and so on. Figure1 shows the circuit for a diode clamped inverter for a three-level [14]. Figure 1. Topology of diode clamped 3 level Inverter 2. 3. Voltage level Van= 0, turn on the switches S2 and S1′. Voltage level Van= - Vdc/2 turn on the switches S1′, S2′. IV. PWM CONCEPT Pulse width modulation (PWM) is the technique of using switching devices to produce the effect of continuously varying analog signals; this PWM conversion generally has a very high electrical efficiency [3]. In controlling either a three phase synchronous motor or a three phase induction motor it is desirable to receive a perfectly sinusoidal current waveform in motor windings, with relative phase displacements of 120 [8]. The production of sine wave power via a linear amplifier system would have low efficiency, at best 64%. If instead of linear circuitry, fast electronic switching devices are used, and then the efficiency can be greater than 95%, depending on the characteristics of the semiconductor power switch. The half bridge switching circuit in Figure 3 is given as an example: the switches can be any suitable switching semiconductors [3], [11]. Figure 2 shows the phase voltage and line voltage of the three-level inverter in the balanced condition. The line voltage Vab consists of a phase-leg a voltage and a phase-leg b voltage. The resulting line voltage is a 5-level staircase waveform for three-level inverter and 9- level staircase waveform for a five-level inverter. This means that an N-level diode-clamped inverter has an N-level output phase voltage and a (2N-1)-level output line voltage [13], [14]. Figure 3. Half Bridge Switching Converter A. Types of PWM: Figure 2. Output voltage of three-level diode- clamped inverter A. OPERATION OF DCMLI: Figure 1 shows a three-level diode-clamped converter in which the dc bus consists of two capacitors, C1, C2. For dc-bus voltage Vdc, the voltage across each capacitor is Vdc/2 and each device voltage stress will be limited to one capacitor voltage level Vdc/2 through clamping diodes. To explain how the staircase voltage is synthesized, the neutral point n is considered as the output phase voltage reference point. There are three switch combinations to synthesize three-level voltages across a and n [4][12]. 1. Voltage level Van= Vdc/2, turn on the switches S1andS2. There are various types of pulse width modulation that can be employed. The types have been classified based on method of generation and nature of PWM waveform. 1. Square wave PWM This scheme is popular only for economical inverters for voltage control, as it gives large harmonics at low voltages. It can be implemented online. 2. NSPWM ( Natural sampled PWM) The harmonic spectrum of this implementation is superior to all the PWM schemes. It gives the best results with analogue control but is not suitable for online implementation. 3. Regularly sampled symmetrical PWM ( RSPWM, Symmetric) The harmonic spectrum is inferior to NSPWM but it can easily be implemented online as it is governed by simple algebraic equations. 1485 Khairnar and Deshmukh Performance Analysis of Diode Clamped 3 Level MOSFET Based Inverter International Electrical Engineering Journal (IEEJ) Vol. 5 (2014) No.7, pp. 1484-1489 ISSN 2078-2365 http://www.ieejournal.com/ V. HARDWARE IMPLEMENTATION The hardware implementation of Diode clamped 3 level inverter mainly consist of two sections and they are, A. Power Section: The power section consists of a power rectifier, filter capacitor, and three phase diode clamped multilevel inverter. B. Control Section: The control circuit using PWM technique with VCO and Opto-isolator circuitry, signal amplifier to generate 12 gating pulses to drive MOSFET based power inverter circuit [14]. phase induction motor can be generated by a use of a Pulse Width Modulated (PWM) inverter. The system consists of a rectified single phase A.C. supply, which is usually smoothed to provide the D.C. supply rails for the main switching devices [10]. The picture of the hardware will be clearer after observing the image of the actual hardware given as, An AC input voltage is fed to a three phase diode bridge rectifier, in order to produce dc output voltage across a capacitor filter. A capacitor filter, removes the ripple contents present in the dc output voltage. The pure dc voltage is applied to the three phase multilevel inverter through capacitor filter. The multilevel inverter has 12 MOSFET switches that are controlled in order to generate an ac output voltage from the dc input voltage. The various sections of the hardware are explained below. 1. 2. 3. 4. 5. 6. 7. PWM IC: The CMOS based PWM Pulse Generator IC HEF4752VP is the heart of control circuit. This IC generates three sets of 120° out of phase signals that are Pulse Width Modulated to behave as sinusoidal signals. It is provide with six PWM output signals. VCO: Voltage controller IC NE566 is used to generate the clock frequency to provide external clock to PWM IC. Regulated Supply Sections: The +5V and +12V regulated supply has been achieved using IC 7805 and 7812 to provide supply to the PWM IC and VCO IC respectually. Opto-Darlington: Opto-isolators are used to electrically isolate the control circuit from the power circuit in order to protect the control circuit from potentially fatal power surge from the power circuit. Next, we use Darlington pair transistors after each isolator to boost current to level that is required to trigger the Power MOSFET without loading on the opto-isolators. The outputs of the Darlington pairs are suitably connected to the Power MOSFET switches for correct operation of the inverter. Four winding Transformers: It is a specially design transformers consist of four secondary windings used to provide 12 separate, +12V supply to the section of 12 opto-Darlington pairs. D.C. Supply to Inverter: The D.C. supply to the inverter is derived from single phase 230V A.C. Mains supply given to bridge rectifier along with 100 microfarad, 6A capacitor which is capable to provide 350V D.C. supply to the inverter. PWM Voltage Source Inverter: A variable voltage, variable frequency three phase supply for three Khairnar and Deshmukh Figure 4. Hardware Setup The implementation of the hardware includes the procedure of layout planning for PCB, Artwork, Painting, Etching, Drilling, Mounting of various components like Resistors, Capacitors, RF coils, Transistors, MOSFET’s and IC’s, after mounting finally we solder all the components. The HEF4752V is a circuit for A.C. motor speed control utilizing LOCMOS technology. The circuit synthesizes Three 120° out of phase signals, of which the average voltage varies sinusoidally with time in the frequency range 0 to 200 Hz. The method employed is based upon the pulse width modulation principle, in order to achieve a sufficient accuracy of the output voltages over the whole frequency range. A pure digital waveform generation is used. Input group consist of the following signals. FCT = frequency clock VCT = voltage clock RCT = reference clock OCT = output delay clock All outputs are of the push-pull type. Inputs and outputs are protected against electrostatic effects in a wide variety of device-handling situations. However, to be totally safe, it is desirable to take handling precautions into account. VI. RESULTS The reading (Phase voltages and Line voltages) of the inverter is obtained over the oscilloscope and digital multimeter, but before that the test waveforms of external clock signals (FCT, RCT, OCT and VCT) has been measured 1486 Performance Analysis of Diode Clamped 3 Level MOSFET Based Inverter International Electrical Engineering Journal (IEEJ) Vol. 5 (2014) No.7, pp. 1484-1489 ISSN 2078-2365 http://www.ieejournal.com/ over oscilloscope to evaluate their amplitudes and frequencies. The oscilloscope snaps of all external clock signals and phase voltages and line voltages are given with their amplitudes and frequencies. Figure 8. Voltage Clock Signal After these clock signals given to the PWM digital controller IC, the controller produces a output set of six signals. Figure 5. Frequency Clock Signal Figure 5. shows the FCT signal having Amplitude of 6V with Variable frequency. And figure 6, 7 and 8 shows the RCT, OCT and VCT signals with Amplitude 4V with approximately equal to 127 KHz frequency. Figure 9. PWM signals Figure 6. Reference Clock Signal The figure 9 shows the two of six signals produces by PWM IC, these signals cannot be assign directly to the power MOSFET’s in order to protect the control circuit from potentially fatal power surge from the power circuit. To provide the isolation optoisolators are used along with Darlington transistor pair to amplify the current of PWM signals. Figure 7. Output delay Clock Signal Figure 10. PWM signals after isolation The little bit amplification can be observed in figure 10 as compared to the PWM signals before isolation. So these signals are applied to the power MOSFET’s of inverter for switching depending upon which inverter generates output. 1487 Khairnar and Deshmukh Performance Analysis of Diode Clamped 3 Level MOSFET Based Inverter International Electrical Engineering Journal (IEEJ) Vol. 5 (2014) No.7, pp. 1484-1489 ISSN 2078-2365 http://www.ieejournal.com/ capacitor charge and discharge can be balanced. Such a converter, when serving for reactive power compensation is called Static Var Generator [16]. The multi-level structure allows the entire converter to be directly connected to a high voltage distribution or transmission system without the need of a step down transformer. All the three Multi – level inverters can be used in reactive power compensation without having voltage unbalanced problem [15]. 2. Figure 11. Output voltage RN Figure 11 shows the 3 levels phase voltage produced by inverter with 400V amplitude and 43Hz frequency. The other phase voltages YN and BN have same amplitude and frequency as of RN. Inter connection of two Multi-level inverter with a DC link in between is called as a Back to back intertie. In this type of circuit the left hand side converter servers as rectifier, while the right hand side serves as the inverter. The purpose of the back to back intertie is to connect to synchronous systems of different frequencies. It can be treated as a) frequency connector b) phase shifter c) a power flow controller [15], [16]. 3. Figure 12. Output voltage RY TABLE I. Line VOLTAGES and Phase VOLTAGES ON DMM Phase Voltages VRY : 232 V VRN : 144 V VRB : 232 V VYN : 143 V VYB : 231 V VBN : 144 V Utility compatible adjustable speed drives An ideal utility compatible adjustable speed drives requires unity power factor, negligible harmonics and high efficiency. By extended the back to back intertie, the multi-level inverter can be used for a utility compatible adjustable speed drive with the input as constant frequency AC source and the output has the variable frequency AC source. The major differences when using as a utility compatible adjustable speed drives and for back to back intertie, is the control design and size of capacitor [14], [16]. Figure 12 shows 3 level Line voltage of inverter with 600V amplitude and 40Hz frequency. The other line voltages YB and BR have same amplitude and frequency as that of RY. The readings of line voltages and phase voltages also measured on digital multimeter Line Voltages Back to Back intertie VIII. CONCLUSION This paper provides a comprehensive analysis on the three-level diode clamped inverter, which also known as neutral-point clamped (NPC) inverter. The diode-clamped inverter provides multiple voltage levels through connection of the phases to a series of capacitors. Because of industrial developments over the past several years, the three level inverter is now used extensively in industrial application. The performance of the three-phase three-level twelve switch inverter has been explained and improved by employing PWM control scheme. The use of three-level inverters reduces the harmonic components of the output voltage compared with the two-level inverter at the same switching frequency. It needs no additional reactors or transformers to reduce the harmonic components. Then, it is suitable for high voltage and high power systems. REFERENCES VII. 1. APPLICATIONS [1] Reactive power compensator When a Multi-level inverter draws pure reactive power, the phase voltage and current are 90 degrees apart, and the [2] Jan A. Ferreira, “The Multilevel Modular DC Converters” IEEE Transactions on Power Electronics, vol. 28, no. 10, pp. 4460-4465, Oct. 2013 Xiaoming Yaun, Ivo Barbi, “Fundamentals of New Diode Clamping Multilevel Inverters” IEEE Transactions on Power Electronics, vol.15, no. 04, pp. 711-718, July 2000. 1488 Khairnar and Deshmukh Performance Analysis of Diode Clamped 3 Level MOSFET Based Inverter International Electrical Engineering Journal (IEEJ) Vol. 5 (2014) No.7, pp. 1484-1489 ISSN 2078-2365 http://www.ieejournal.com/ [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] Brenden Peter McGrath, Donald Graheme Holmes, “Multicarrier PWM Strategies for Multilevel Inverters” IEEE Transactions on Industrial Electronics, vol. 49, no. 04, pp. 858-867, Aug 2012. Congzhe Gao, Xinjian Jiang, Yongdong Li, “A DC link Voltage Self Balance Method for Diode Clamped Modular Multilevel Converter with Minimum numbers of Voltage Sources” IEEE Trans. on Power Electron.,vol.28,issue no.05, pp 2115-2139, May 2013. Ritu Chaturvedi, “A Single Phase Diode Clamped Multilevel Inverter and its Switching Functions”, International Journal of Innovative trends in Science, Pharmacy & Technology, vol. 01, pp. 63-66, 2014. A.Naveen Kumar, Kiran Kumar Ch, R.H.Vardan & B.Basavaraja, “Multilevel Power Converters: A Survey”, International Journal of Power System Operation and Energy Management, Vol-2, Issue-1,2 pp. 2231 – 4407. D. D. Khairnar, V. M. Deshmukh, “Review study on Topologies of Multilevel Inverters”, International journal of Innovative Research and Development, Vol. 03, Issue 05, May 2014, pp. 19-24. Won-Sik Oh, Sang-Kyoo Han, Seong-Wook Choi and Gun-Woo Moon, “A Three Phase Three-level PWM Switched Voltage Source Inverter with Zero Neutral Point Potential”, Journal of Power Electronics, Vol. 5, No. 3, pp. 224- 232, July 2005. M. Venu Madhav, K.S. Ravi Kumar, “MATLAB based Analysis and Simulation of Multilevel Inverters”, International Journal of Computer Applications (0975 – 8887) Volume 39– No.4, pp. 17-19, Feb 2012. G. Laxminarayana, K.pradeep, “Comparative Analysis of 3-, 5- and 7-Level Inverter Using Space Vector PWM”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering Vol. 2, Issue 7, pp. 3233- 3243, July 2013. Kapil Jain, Pradyumn Chaturvedi, “Matlab -based Simulation & Analysis of Three -level SPWM Inverter” , International Journal of Soft Computing and Engineering (IJSCE)ISSN: 2231-2307, Volume-2, Issue-1, pp. 56-59, March 2012. Maheshkumar. K and S. Ravivarman, “High Step up Switched Capacitor Inductor DC-DC Converter for UPS System with Renewable Energy Source”, International Electrical Engineering journal Vol. 3, Issue No. 2, pp. 89-94, April, 2013. Janyavula Deepthi, Dr S N Saxena, “Study of Variation of THD in a Diode Clamped Multilevel Inverter with respect to Modulation Index and Control Strategy”, presented at 2nd International Conference and workshop on Emerging Trends in Technology (ICWET), pp. 37-42, 2011. Iqbal Messaïf, El-Madjid Berkouk, Nadia Saadia, “A Study of DTC-Power Electronic Cascade Fed by Photovoltaic Cell-Three-Level NPC Inverter”, Smart Grid and Renewable Energy, pp. 109-118, 2010. Yashobanta Panda “Analysis of Cascaded Multilevel Inverter Induction Motor Drives” M.Tech thesis, Dept. of Elect. Engg. National Institute of Technology Rourkela. Muhammad H. Rashid, “Power Electronics: Circuit, Devices and Applications,” 3rd ed, Pearson, Ch no. 9, pp. 226-237. 1489 Khairnar and Deshmukh Performance Analysis of Diode Clamped 3 Level MOSFET Based Inverter