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Transcript
applying differential drive to the AD7352 is to use a differential
amplifier such as the AD8138. This part can be used as a singleended-to-differential amplifier or as a differential-to-differential
amplifier. The AD8138 also provides common-mode level
shifting. Figure 1 shows how the AD8138 can be used as a
single-ended-to-differential amplifier in a dc-coupled application.
The positive and negative outputs of the AD8138 are connected
to the respective inputs on the ADC through a pair of series
resistors to minimize the loading effects of the switched capacitor
inputs of the ADC. The architecture of the AD8138 results in
outputs that are very highly balanced over a wide frequency
range without requiring tightly matched external components.
The single-ended-to-differential gain of the circuit in Figure 1 is
equal to RF/RG, where RF = RF 1 = R F2 and RG = RG1 = RG 2.
CIRCUIT FUNCTION AND BENEFITS
The circuit described in this document provides a dc-coupled,
single-ended-to-differential conversion of a bipolar input signal
to the AD7352 dual, 3 MSPS, 12-bit SAR ADC. This circuit is
designed to ensure maximum performance of the AD7352 by
providing adequate settling time and low impedance.
CIRCUIT DESCRIPTION
Differential operation requires VINx+ and VINx− of the ADC to be
driven simultaneously with two equal signals that are 180° out
of phase and are centered around the proper common-mode
voltage. Because not all applications have a signal preconditioned
for differential operation, there is often a need to perform a
single-ended-to-differential conversion. An ideal method of
CF1
2.048V
1.024V
0V
RF1
+5V
RG1
VOCM
+2.048V
GND
–2.048V
RG2
CF2
VDD
VDRIVE
AD7352
RS*
10kΩ
10µF
VINx+
AD8138
–5V
RF2
+1.024V
R S*
+2.5V +2.5V TO +3.6V
VINx–
REFA/REFB
2.048V
1.024V
0V
AGND AGND
+5V
OP177
+2.048V
10µF
10kΩ
*MOUNT AS CLOSE TO THE AD7352 AS POSSIBLE.
RS = 33Ω; RG1 = RG2 = RF1 = RF2 = 499Ω; C F1 = CF2 = 39pF.
08449-001
–5V
Figure 1. AD8138 as a DC-Coupled, Single-Ended-to-Differential Converter Driving the AD7352 Differential Inputs
(Simplified Schematic: Decoupling and All Connections Not Shown)
www.BDTIC.com/ADI
If the analog inputs source being used has zero impedance, all
four resistors (RG1, RG2, RF 1, and RF 2) should be the same as
shown in Figure 1. If the source has a 50 Ω impedance and a 50 Ω
termination, for example, the value of RG 2 should be increased
by 25 Ω to balance this parallel impedance on the input and
thus ensure that both the positive and negative analog inputs
have the same gain. This also requires a small increase in R F1
and RF 2 to compensate for the gain loss caused by increasing
RG1 and RG 2. Complete analysis for the terminated source
condition is found in the ADIsimDiffAmp interactive design
tool and in MT-076 Tutorial.
The AD7352 requires a driver that has a very fast settling time
due to the very short acquisition time required to achieve 3 MSPS
throughput with a serial interface. The track-and-hold amplifier
on the front end of the AD7352 enters track mode on the rising
edge of the 13th SCLK period during a conversion. The ADC
driver must settle before the track-and-hold returns to hold (68 ns
later for 3 MSPS throughput on the AD7352 using a 48 MHz
SCLK). The AD8138 has a specified 16 ns settling time that
satisfies this requirement.
The voltage applied to the VOCM pin of the AD8138 sets up the
common-mode voltage. In Figure 1, VOCM is connected to 1.024 V,
which is a divided version of the internal 2.048 V reference on
the AD7352. If the on-chip 2.048 V reference on the AD7352 is
to be used elsewhere in a system (as illustrated in Figure 1), the
output from REFA or REFB must first be buffered. The OP177
features the highest precision performance of any op amp
currently available and is a perfect choice for a reference buffer.
Note that the AD8138 operates on dual 5 V supplies whereas
the AD7352 is specified for power supply voltages of 2.5 V to
3.6 V. Care must be taken to ensure that the input maximum
input voltage limits of the AD7352 are not exceeded during
transient or power-on conditions (see MT-036 Tutorial). In
addition, the circuit must be constructed on a multilayer PC
board with a large area ground plane. Proper layout, grounding,
and decoupling techniques must be used to achieve optimum
performance (see MT-031 Tutorial, MT-101 Tutorial, and the
AD7352 evaluation board layout).
COMMON VARIATIONS
The OP07D, an ultralow offset voltage op amp, is a lower cost
alternative to the OP177. It offers similar performance with the
exception of the offset voltage specification. Alternatively, the
AD8628 or the AD8638 offers very high precision with very low
drift with time and temperature.
LEARN MORE
MT-031 Tutorial, Grounding Data Converters and Solving the
Mystery of "AGND" and "DGND," Analog Devices.
MT-036 Tutorial, Op Amp Output Phase-Reversal and Input
Over-Voltage Protection, Analog Devices.
MT-074 Tutorial, Differential Drivers for Precision ADCs,
Analog Devices.
MT-075 Tutorial, Differential Drivers for High Speed ADCs
Overview, Analog Devices.
MT-076 Tutorial, Differential Driver Analysis, Analog Devices.
MT-101 Tutorial, Decoupling Techniques, Analog Devices.
John Ardizonni and Jonathan Pearson, "Rules of the Road" for
High-Speed Differential ADC Drivers, Analog Dialogue,
Volume 43, May 2009, Analog Devices.
ADIsimDiffAmp (Differential Amplifier Tool), Analog Devices.
Data Sheets and Evaluation Boards
AD7352 Data Sheet.
AD7352 Evaluation Board.
AD8138 Data Sheet.
OP177 Data Sheet.
OP07D Data Sheet.
REVISION HISTORY
11/09—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Circuit Note Title ..........................................................1
10/08—Revision 0: Initial Release
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CN08449-0-11/09(A)
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