Download NDT2955 P-Channel Enhancement Mode Field Effect Transistor April 2002

NDT2955
P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
This 60V P-Channel MOSFET is produced using
Fairchild Semiconductor’s high voltage Trench process.
It has been optimized for power management
plications.
• –2.5 A, –60 V. RDS(ON) = 300mΩ @ VGS = –10 V
RDS(ON) = 500mΩ @ VGS = –4.5 V
• High density cell design for extremely low RDS(ON)
Applications
• High power and current handling capability in a widely
used surface mount package.
•
DC/DC converter
•
Power management
D
D
D
D
S
S
D
G
SOT-223
G
D
SOT-223 *
G
S
(J23Z)
Absolute Maximum Ratings
Symbol
S
G
TA=25oC unless otherwise noted
Parameter
Ratings
Units
VDSS
Drain-Source Voltage
–60
V
VGSS
Gate-Source Voltage
±20
V
ID
Drain Current
–2.5
A
– Continuous
(Note 1a)
– Pulsed
PD
–15
Maximum Power Dissipation
(Note 1a)
3.0
(Note 1b)
1.3
(Note 1c)
TJ, TSTG
W
1.1
–55 to +150
°C
(Note 1a)
42
°C/W
(Note 1)
12
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
NDT2955
NDT2955
13’’
12mm
2500 units
2002 Fairchild Semiconductor Corporation
NDT2955 Rev. C
NDT2955
April 2002
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Avalanche Ratings
W DSS
Drain-Source Avalanche Energy
Single Pulse, VDD = 30 V, ID = 2.5 A
174
mJ
Off Characteristics
ID = –250 µA
VGS = 0 V,
ID = –250 µA, Referenced to 25°C
–60
V
BVDSS
∆BVDSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
VDS = –60 V,
VGS = 0 V
–10
µA
IGSSF
Gate–Body Leakage, Forward
VGS = –20 V,
VDS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
VGS = –20 V,
VDS = 0 V
–100
nA
ID = –250 µA
On Characteristics
–60
mV/°C
(Note 2)
–2
–2.6
VGS(th)
Gate Threshold Voltage
VDS = VGS,
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = –250 µA, Referenced to 25°C
5.7
95
163
153
–4
V
mV/°C
ID(on)
On–State Drain Current
VGS = –10 V, ID = –2.5 A
VGS = –4.5 V, ID = –2 A
VGS=–10 V, ID =–2.5 A, TJ=125°C
VGS = –10 V, VDS = –5 V
gFS
Forward Transconductance
VDS = –10 V,
ID = –2.5 A
5.5
VDS = –30 V,
f = 1.0 MHz
V GS = 0 V,
601
pF
85
pF
35
pF
300
500
513
–12
mΩ
A
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
(Note 2)
Turn–On Delay Time
VDD = –30 V,
VGS = –10 V,
ID = –1 A,
RGEN = 6 Ω
12
21
ns
tr
Turn–On Rise Time
10
20
ns
td(off)
Turn–Off Delay Time
19
34
ns
tf
Turn–Off Fall Time
6
12
ns
Qg
Total Gate Charge
11
15
nC
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
VDS = –30 V,
VGS = –10 V
ID = –2.5 A,
2.4
nC
2.7
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
VSD
trr
Qrr
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
VGS = 0 V, IS = –2.5 A
Voltage
IF = –2.5 A,
Diode Reverse Recovery Time
diF/dt = 100 A/µs
Diode Reverse Recovery Charge
(Note 2)
–0.8
–2.5
A
–1.2
V
25
nS
40
nC
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 42°C/W when
2
mounted on a 1in
pad of 2 oz copper
b) 95°C/W when
mounted on a .0066
2
in pad of 2 oz
copper
c) 110°C/W when mounted on a
minimum pad.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
NDT2955 Rev. C
NDT2955
Electrical Characteristics
NDT2955
Typical Characteristics
2
12
-6.0V
-7.0V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
VGS = -10V
-5.0V
9
6
-4.5V
3
-4.0V
VGS=-4.5V
1.8
1.6
-5.0V
1.4
-6.0V
1.2
-7.0V
-10V
0.8
0
0
1
2
3
4
0
5
3
Figure 1. On-Region Characteristics.
9
12
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.35
1.8
ID = -1.3A
ID = -2.5A
VGS = -10V
1.6
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
6
-ID, DRAIN CURRENT (A)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
1.4
1.2
1
0.8
0.6
0.3
0.25
TA = 125oC
0.2
0.15
TA = 25oC
0.1
0.05
0.4
-50
-25
0
25
50
75
100
125
2
150
4
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation
withTemperature.
10
8
10
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
-IS, REVERSE DRAIN CURRENT (A)
25oC
TA = -55oC
VDS = -10V
6
-VGS, GATE TO SOURCE VOLTAGE (V)
o
-ID, DRAIN CURRENT (A)
-8.0V
1
125oC
8
6
4
2
0
VGS =0V
1
TA = 125oC
0.1
25oC
0.01
-55oC
0.001
0.0001
2.5
3.5
4.5
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
5.5
0
0.2
0.4
0.6
0.8
1
1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
NDT2955 Rev. C
NDT2955
Typical Characteristics
800
VDS = -20V
ID = -2.5A
-30V
-40V
6
4
600
400
COSS
200
2
CRSS
0
0
0
3
6
9
0
12
15
Qg, GATE CHARGE (nC)
30
60
Figure 8. Capacitance Characteristics.
100
P(pk), PEAK TRANSIENT POWER (W)
50
100µs
10
RDS(ON) LIMIT
1ms
10ms
100ms
1s
10s
1
VGS = -10V
SINGLE PULSE
RθJA = 110oC/W
0.1
DC
TA = 25oC
0.01
0.1
1
10
100
SINGLE PULSE
RθJA = 110°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
-VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
45
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
-ID, DRAIN CURRENT (A)
f = 1 MHz
VGS = 0 V
CISS
8
CAPACITANCE (pF)
-VGS, GATE-SOURCE VOLTAGE (V)
10
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
o
RθJA = 110 C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
t1
0.01
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.01
0.001
0.0001
SINGLE PULSE
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
NDT2955 Rev. C
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST â
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
I2C™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC â
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench â
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER â UHC™
SMART START™
UltraFET â
SPM™
VCX™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
STAR*POWER is used under license
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H5