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3.3 V Slew Rate Limited,
Half Duplex RS-485/RS-422 Transceiver
ADM3493
FUNCTIONAL BLOCK DIAGRAM
Operates with 3.3 V supply
Interoperable with 5 V logic
EIA RS-422 and RS-485 compliant over full CM range
Data rate: 250 kbps
Half duplex transceiver
Reduced slew rates for low EMI
2 nA supply current in shutdown mode
Up to 256 transceivers on a bus
−7 V to +12 V bus common-mode range
Specified over −40°C to +85°C temperature range
8 ns skew
Available in 8-lead SOIC
VCC
ADM3493
R
RO
A
RE
DE
DI
B
D
GND
05715-001
FEATURES
Figure 1.
APPLICATIONS
Low power RS-485 applications
EMI sensitive systems
DTE-DCE interfaces
Industrial control
Packet switching
Local area networks
Level translators
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GENERAL DESCRIPTION
The ADM3493 is a low power, differential line transceiver
designed to operate using a single 3.3 V power supply. Low
power consumption, coupled with a shutdown mode, makes it
ideal for power-sensitive applications. The ADM3493 is suitable
for communication on multipoint bus transmission lines.
The device contains one driver and one receiver. Designed for
half-duplex communication, the ADM3493 features a slew rate
limited driver that minimizes EMI and reduces reflections
caused by improperly terminated cables, allowing error-free
data transmission at data rates up to 250 kbps.
The receiver input impedance is 96 kΩ, allowing up to 256
transceivers to be connected on the bus. A thermal shutdown
circuit prevents excessive power dissipation caused by bus
contention or by output shorting. If a significant temperature
increase is detected in the internal driver circuitry during fault
conditions then the thermal shutdown circuit forces the driver
output into a high impedance state. The receiver contains a failsafe feature that results in a logic high output state, if the inputs
are unconnected (floating).
The ADM3493 is fully specified over the commercial and
industrial temperature ranges and is available in an 8-lead SOIC.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2005 Analog Devices, Inc. All rights reserved.
ADM3493
TABLE OF CONTENTS
Features .............................................................................................. 1
Switching Characteristics .................................................................8
Applications....................................................................................... 1
Typical Performance Characteristics ..............................................9
Functional Block Diagram .............................................................. 1
Circuit Description......................................................................... 11
General Description ......................................................................... 1
Reduced EMI and Reflections .................................................. 11
Revision History ............................................................................... 2
Low Power Shutdown Mode..................................................... 11
Specifications..................................................................................... 3
Driver Output Protection.......................................................... 11
Timing Specifications .................................................................. 4
Propagation Delay ...................................................................... 11
Absolute Maximum Ratings............................................................ 5
Typical Applications................................................................... 11
ESD Caution.................................................................................. 5
Outline Dimensions ....................................................................... 12
Pin Configurations and Function Descriptions ........................... 6
Ordering Guide .......................................................................... 12
Test Circuits....................................................................................... 7
REVISION HISTORY
10/05—Rev. 0: Initial Version
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Rev. 0 | Page 2 of 12
ADM3493
SPECIFICATIONS
VCC = 3.3 V ±0.3 V, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
DRIVER
Differential Output Voltage, VOD
Δ |VOD| for Complementary Output States 1
Common-Mode Output Voltage, VOC
Δ |VOC| for Common-Mode Output Voltage1
DRIVER INPUT LOGIC
CMOS Input Logic Threshold Low, VIH
CMOS Input Logic Threshold High, VIL
CMOS Logic Input Current, IN1
Min
Typ
Units
Test Conditions/Comments
2.0
V
1.5
1.5
V
V
0.2
3
0.2
V
V
V
RL = 100 Ω (RS-422), Vcc = 3.3 V
±5% (see Figure 3)
RL = 54 Ω (RS-485) (see Figure 3)
RL = 60 Ω (RS-485), Vcc = 3.3 V
(see Figure 4)
RL = 54 Ω or 100 Ω (see Figure 3)
RL = 54 Ω or 100 Ω (see Figure 3)
RL = 54 Ω or 100 Ω (see Figure 3)
0.8
V
V
μA
DE, DI, RE
DE, DI, RE
DE, DI, RE
60
μA
VIN = 12 V
−60
μA
VIN = −7 V
V
mV
V
2.0
±2
Input Current (A, B), IN2
RECEIVER
Differential Input Threshold Voltage, VTH
Input Hysteresis, Δ VTH
CMOS Output Voltage High, VOH
Max
−0.2
0.2
DE = 0 V
VCC = 0 V or 3.6 V
0.4
V
±1
μA
kΩ
−7V < VCM < + 12 V
VCM = 0 V
IOUT = −1.5 mA, VID = 200 mV
(see Figure 5)
IOUT = 2.5mA, VID = 200mV
(see Figure 5)
Vcc = 3.6 V, 0 V ≤ VOUT ≤ Vcc
−7 V < VCM < + 12 V
1.1
2.2
mA
DE = VCC
0.95
1.9
mA
50
Vcc – 0.4
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CMOS Output Voltage Low, VOL
Three-State Output Leakage Current, IOZR
Input Resistance, RIN
POWER SUPPLY CURRENT
Supply Current
96
RE = 0 V or VCC
DE = VCC
No load,
DI = 0 V or VCC
RE = 0 V
Supply Current in Shutdown Mode, ISHDN
0.002
Driver Short-Circuit Output Current, IOSD
Receiver Short-Circuit Output Current, IOSR
1
±8
ΔVOD and ΔVOC are the changes in VOD and VOC, respectively, when DI input changes state.
Rev. 0 | Page 3 of 12
1
μA
−250
250
±60
mA
mA
mA
DE = 0 V, RE = VCC, DI = VCC or 0 V
VOUT = −7 V
VOUT = 12 V
0 V < VRO < VCC
ADM3493
TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
DRIVER
Differential Output Delay, tDD
Differential Output Transition Time, tTD
Propagation Delay, Low-to-High Level, tPLH
Propagation Delay, High-to-Low Level, tPHL
|tPLH – tPHL| Propagation Delay Skew1, tPDS
DRIVER OUTPUT ENABLE/DISABLE TIMES
Output Enable Time to Low Level, tPZL
Output Enable Time to High Level, tPZH
Output Disable Time from High Level, tPHZ
Min
Typ
Max
Units
Test Conditions/Comments
600
400
700
700
900
700
1000
1000
100
1400
1200
1500
1500
ns
ns
ns
ns
ns
RL = 60 Ω (see Figure 6 and Figure 12)
RL = 60 Ω (see Figure 6 and Figure 12)
RL = 27 Ω (see Figure 7 and Figure 13)
RL = 27 Ω (see Figure 7 and Figure 13)
RL = 27 Ω (see Figure 7 and Figure 13)
1300
800
80
ns
ns
ns
RL = 110 Ω (see Figure 9 and Figure 15)
RL = 110 Ω (see Figure 8 and Figure 14)
RL = 110 Ω (see Figure 8 and Figure 14)
900
600
50
Output Disable Time from Low Level, tPLZ
50
80
ns
Output Enable Time from Shutdown to
Low Level, tPSL
Output Enable Time from Shutdown to
High Level, tPSH
RECEIVER
Time to Shutdown2, tSHDN
Propagation Delay, Low-to-High Level, tRPLH
1.9
2.7
μs
RL = 110 Ω (see Figure 9 and Figure 15)
RL = 110 Ω (see Figure 9 and Figure 15)
2.2
3.0
μs
RL = 110 Ω (see Figure 8 and Figure 14)
80
25
190
75
300
180
ns
ns
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
and Figure 16)
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
and Figure 16)
VID = 0 V to 3.0 V, CL = 15 pF (see Figure 10
and Figure 16)
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Propagation Delay, High-to-Low Level, tRPHL
25
75
180
ns
50
ns
25
25
25
25
720
50
50
45
45
1400
ns
ns
ns
ns
ns
CL = 15 pF (see Figure 11 and Figure 17)
CL = 15 pF (see Figure 11 and Figure 17)
CL = 15 pF (see Figure 11 and Figure 17)
CL = 15 pF (see Figure 11 and Figure 17)
CL = 15 pF (see Figure 11 and Figure 17)
720
1400
ns
CL = 15 pF (see Figure 11 and Figure 17)
|tPLH – tPHL| Propagation Delay Skew, tRPDS
RECEIVER OUTPUT ENABLE/DISABLE TIMES
Output Enable Time to Low Level, tPRZL
Output Enable Time to High Level, tPRZH
Output Disable Time from High Level, tPRHZ
Output Disable Time from Low Level, tPRLZ
Output Enable Time from Shutdown to
Low Level, tPRSL
Output Enable Time from Shutdown to
High Level, tPRSH
1
2
Measured on |tPLH (A) − tPHL (A)| and |tPLH (B) − tPHL (B)|.
The transceivers are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 300 ns, the parts are guaranteed to enter shutdown.
Rev. 0 | Page 4 of 12
ADM3493
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter
VCC to GND
Digital I/O Voltage (DE, RE, DI)
Digital I/O Voltage (ROUT)
Driver Output/Receiver Input Voltage
Operating Temperature Range
Storage Temperature Range
θJA Thermal Impedance
8-Lead SOIC
Lead Temperature
Soldering (10 seconds)
Vapor Phase (60 seconds)
Infrared (15 seconds)
ESD CAUTION
Rating
7V
−0.3 V to VCC + 0.3 V
VCC − 0.5 V to VCC + 0.5 V
−7.5 V to +12.5 V
−40°C to +85°C
−65°C to +125°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
121°C/W
300°C
215°C
220°C
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ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 12
ADM3493
RO 1
RE 2
DE 3
DI 4
ADM3493
TOP VIEW
(Not to Scale)
8
VCC
7
B
6
A
5
GND
05715-002
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2. Pin Configuration
Table 4. . Pin Function Descriptions
Pin No.
1
Mnemonic
RO
2
RE
3
DE
4
DI
5
6
7
8
GND
A
B
VCC
Description
Receiver Output. When enabled, if A > B by 200 mV, then RO = high.
If A < B by 200 mV, then RO = low.
Receiver Output Enable. A low level enables the receiver output, RO. A high level
places it in a high impedance state. If RE is high and DE is low, the device enters a low
power shutdown mode.
Driver Output Enable. A high level enables the driver differential Outputs A and B.
A low level places it in a high impedance state. If RE is high and DE is low, the device
enters a low power shutdown mode.
Driver Input. When the driver is enabled, a logic low on DI forces A low and B high
while a logic high on DI forces A high and B low.
Ground.
Noninverting Receiver Input A and Noninverting Driver Output A.
Inverted Receiver Input B and Inverted Driver Output B.
Power Supply, 3.3 V ± 0.3 V.
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Rev. 0 | Page 6 of 12
ADM3493
TEST CIRCUITS
S1
A
0V OR 3V
OUT
CL = 50pF2
VOD
VOC
GENERATOR1
05715-003
RL/2
B
RL = 110Ω
50Ω
VOM =
VOH + VOL
Figure 3. Driver VOD and VOC
2
≈ 1.5V
05715-008
RL/2
D
1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω.
R
O
2C INCLUDES PROBE AND STRAY CAPACITANCE.
L
375Ω
Figure 8. Driver Enable and Disable Times (tPZH, tPSH, tPHZ)
VOD
RL
VCC
VCC
RL = 110Ω
05715-004
D
VCM =
–7V TO +12V
375Ω
S1
0V OR 3V
OUT
D
CL = 50pF2
Figure 4. Driver VOD with Varying Common-Mode Voltage
GENERATOR1
VID
50Ω
R
IOL
(+)
VOH
IOH
(–)
1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω.
R
O
2C INCLUDES PROBE AND STRAY CAPACITANCE.
L
05715-005
VOL
Figure 9. Driver Enable and Disable Times (tPZL, tPSL, tPLZ)
Figure 5. Receiver VOH and VOL
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CL
VID
RL =
OUT
60Ω
D
GENERATOR1
R
50Ω
OUT
CL = 15pF2
50Ω
CL = 15pF2
1.5V
1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω.
R
O
2C INCLUDES PROBE AND STRAY CAPACITANCE.
L
VOM =
0
VCC
2
1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω.
R
O
2C INCLUDES PROBE AND STRAY CAPACITANCE.
L
Figure 6. Driver Differential Output Delay and Transition Times
05715-010
VCC
05715-006
GENERATOR1
05715-009
0
Figure 10. Receiver Propagation Delay
VOM
+1.5V
RL = 27Ω
S1
S3
VID
–1.5V
R
S1
CL = 15pF2
50Ω
GENERATOR1
VCC
VOH + VOL
2
≈ 1.5V
1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω.
R
O
2C INCLUDES PROBE AND STRAY CAPACITANCE.
L
05715-007
VOM =
50Ω
1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω.
R
O
2C INCLUDES PROBE AND STRAY CAPACITANCE.
L
Figure 7. Driver Propagation Delays
Figure 11. Receiver Enable and Disable Times
Rev. 0 | Page 7 of 12
05715-011
GENERATOR1
S2
CL2
OUT
D
VCC
1kΩ
ADM3493
SWITCHING CHARACTERISTICS
3V
+3V
IN
1.5V
1.5V
1.5V
0
0
50%
10%
90%
90%
tTD
VCC
≈ +2V
50%
10%
tTD
≈ –2V
tPLZ
OUT
VOM
0.25V
VOL
Figure 15. Driver Enable and Disable Times (tPZL, tPSL, tPLZ)
Figure 12. Driver Differential Output Delay and Transition Times
3V
3V
IN
1.5V
1.5V
IN
1.5V
1.5V
0
0V
tPLH
tRPLH
tPHL
tRPHL
VOH
A
OUT
VOM
VCC
VOM
VOM
OUT
VOM
VOL
tPHL
0
tPLH
Figure 16. Receiver Propagation Delay
VOM
VOM
VOL
05715-013
VOH
B
OUT
+3V
+1.5V
IN
tPRZH
tPRSH
Figure 13. Driver Propagation Delays
OUT
1.5V
+3V
IN
+1.5V
VOH
+3V
IN
+1.5V
0
tPHZ
+1.5V
VOL
S1 OPEN
S2 CLOSED
S3 = +1.5V
IN
tPRHZ
VOH
VOM
0
OUT +0.25V
05715-014
0.25V
+3V
+1.5V
0
VCC
OUT
+0.25V
Figure 17. Receiver Enable and Disable Times
Rev. 0 | Page 8 of 12
S1 CLOSED
S2 OPEN
S3 = –1.5V
tPRLZ
VOH
0
Figure 14. Driver Enable and Disable Times (tPZH, tPSH, tPHZ)
S1 CLOSED
S2 OPEN
S3 = –1.5V
VCC
OUT
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tPZH
0
tPRZL
tPRSL
0
1.5V
0
OUT
S1 OPEN
S2 CLOSED
S3 = +1.5V
+1.5V
3V
IN
0
VOL
05715-017
OUT
tPSL
tDD
05715-012
tDD
05715-015
1.5V
05715-016
IN
ADM3493
TYPICAL PERFORMANCE CHARACTERISTICS
30
0.8
0.7
0.6
OUTPUT VOLTAGE (V)
20
15
10
0.5
0.4
0.3
0.2
5
05715-018
0
0.1
0
0.5
1.0
1.5
2.0
2.5
0
–40 –30 –20 –10
3.5
3.0
05715-021
OUTPUT CURRENT (mA)
25
0
OUTPUT VOLTAGE (V)
10
20
30
40
50
60
70
80
TEMPERATURE (°C)
Figure 18. Output Current vs. Receiver Output Low Voltage
Figure 21. Receiver Output Low Voltage vs. Temperature, IO = 2.5 mA
–16
100
90
–14
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
80
–12
–10
–8
70
60
50
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–6
–4
40
30
05715-019
0
0
0.5
1.0
1.5
2.0
2.5
10
0
3.5
3.0
05715-022
20
–2
0
0.5
1.0
OUTPUT VOLTAGE (V)
1.5
2.0
2.5
3.0
3.5
OUTPUT VOLTAGE (V)
Figure 19. Output Current vs. Receiver Output High Voltage
Figure 22. Driver Output Current vs. Differential Output Voltage
3.30
2.6
2.5
2.4
OUTPUT VOLTAGE (V)
3.20
3.15
3.10
2.2
2.1
2.0
1.9
1.8
05715-020
3.05
3.00
–40 –30 –20 –10
2.3
0
10
20
30
40
50
60
70
1.7
1.6
–40 –30 –20 –10
80
TEMPERATURE (°C)
Figure 20. Receiver Output High Voltage vs. Temperature, IO = 1.5 mA
05715-023
OUTPUT VOLTAGE (V)
3.25
0
10
20
30
40
50
60
70
80
TEMPERATURE (°C)
Figure 23. Driver Differential Output Voltage vs. Temperature, RI = 54 Ω
Rev. 0 | Page 9 of 12
ADM3493
140
1.2
1.1
120
SUPPLY CURRENT (mA)
OUTPUT CURRENT (mA)
1.0
100
80
60
40
0.9
0.8
0.7
DE = RE = X*
0.6
0.5
05715-024
0
2
4
6
8
0.3
12
10
DE = RE = GND
0.2
–40 –30 –20 –10
*X = DON’T CARE
0
OUTPUT VOLTAGE (V)
30
40
50
60
70
80
70
80
Figure 26. Supply Current vs. Temperature
–125
100
–115
90
–105
80
SHUTDOWN CURRENT (nA)
–95
–85
–75
–65
–55
–45
70
60
50
40
30
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–35
–25
20
10
–15
05715-025
OUTPUT CURRENT (mA)
20
TEMPERATURE (°C)
Figure 24. Output Current vs. Driver Output Low Voltage
–5
–7
10
–6
–5
–4
–3
–2
–1
0
1
2
05715-027
0
05715-026
0.4
20
0
–10
–40 –30 –20 –10
3
OUTPUT VOLTAGE (V)
0
10
20
30
40
50
60
TEMPERATURE (°C)
Figure 27. Shutdown Current vs. Temperature, VCC = 3.3 V
Figure 25. Output Current vs. Driver Output High Voltage
Rev. 0 | Page 10 of 12
ADM3493
CIRCUIT DESCRIPTION
The ADM3493 is a low power transceiver for RS-485 and
RS-422 communications. The ADM3493 can transmit and
receive at data rates up to 250 kbps in a half duplex
configuration. Driver Enable (DE) and Receiver Enable (RE)
pins are included when disabled; the driver and receiver
outputs are high impedance.
Table 5. Transmitting Truth Table
Transmitting Inputs
2
DE
DI
X1
X1
0
1
1
1
0
0
1
0
X1
X1
0
1
High-Z2
High-Z2
Mode
DRIVER OUTPUT PROTECTION
1
0
High-Z2
High-Z2
Normal
Normal
Normal
Shutdown
X = Don’t care.
High-Z = High Impedance.
Table 6. Receiving Truth Table
Receiving Inputs
RE
DE
A-B
Receiving
Outputs
RO
0
0
0
1
0
0
0
0
≥+0.2 V
≤−0.2 V
Inputs Open
X1
1
0
1
High-Z2
A low power shutdown mode is initiated by bringing both RE
high and DE low. The ADM3493 does not shut down unless
both the driver and receiver are disabled (high impedance). In
shutdown, the ADM3493 typically draws only 2 nA of supply
current. For the ADM3493, the tPSH and tPSL enable times assume
the part was in the low power shutdown mode; the tPZH and tPZL
enable times assume the receiver or driver was disabled, but the
part was not shut down.
Mode
Normal
Normal
Normal
Shutdown
Two methods are implemented to prevent excessive output
current and power dissipation caused by faults or by bus
contention. Current limit protection on the output stage
provides immediate protection against short circuits over the
whole common-mode voltage range (see Typical Performance
Characteristics). In addition, a thermal shutdown circuit forces
the driver outputs into a high impedance state if the die
temperature rises excessively.
PROPAGATION DELAY
Skew time is simply the difference between the low-to-high and
high-to-low propagation delay. Small driver/receiver skew times
help maintain a symmetrical mark-space ratio (50% duty cycle).
The receiver skew time, |tPRLH - tPRHL|, is 20 ns for the ADM3493.
The driver skew time is typically under 100 ns.
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1
X = Don’t care.
2
High-Z = High Impedance
REDUCED EMI AND REFLECTIONS
The ADM3493 is a slew rate limited transceiver, minimizing
EMI and reducing reflections caused by improperly terminated
cables.
R
The ADM3493 transceiver is designed for bidirectional data
communications on multipoint bus transmission lines. Figure
22 shows a typical network application’s circuits. To minimize
reflections, the line should be terminated at both ends in its
characteristic impedance, and stub lengths off the main line
should be kept as short as possible. The slew rate limited
ADM3493 is tolerant of imperfect termination.
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS = 256
ADM3493
RO
TYPICAL APPLICATIONS
ADM3493
VCC
A
R1
A
R
RO
RE
RT
RE
RT
DE
DI
DE
D
B
B
R2
A
A
B
ADM3493
R
R
D
RE
DI
B
ADM3493
RO
D
DE
RO
DI
D
RE
DE
DI
NOTES
1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE.
Figure 28. ADM3493 Typical Half Duplex RS-485 Network
Rev. 0 | Page 11 of 12
05715-028
1
RE
Transmitting
Outputs
B
A
LOW POWER SHUTDOWN MODE
ADM3493
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
4.00 (0.1574)
3.80 (0.1497) 1
5
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
6.20 (0.2440)
4 5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
COPLANARITY
SEATING 0.31 (0.0122)
0.10
PLANE
0.50 (0.0196)
× 45°
0.25 (0.0099)
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 29. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
ADM3493ARZ1
Temperature Range
−40°C to +85°C
Package Description
8-Lead Standard Small Outline Package [SOIC_N]
Package Options
R-8
ADM3493ARZ-REEL71
−40°C to +85°C
8-Lead Standard Small Outline Package [SOIC_N]
R-8
1
Z = Pb-free part.
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registered trademarks are the property of their respective owners.
D05715-0-10/05(0)
Rev. 0 | Page 12 of 12
Ordering
Quantity
1,000