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® INA INA133 INA2133 213 3 INA 133 For most current data sheet and other product information, visit www.burr-brown.com High-Speed, Precision DIFFERENCE AMPLIFIERS FEATURES APPLICATIONS ● DESIGNED FOR LOW COST ● SINGLE, DUAL VERSIONS ● DIFFERENTIAL INPUT AMPLIFIER BUILDING BLOCK ● DIFF IN / DIFF OUT AMPLIFIER ● LOW OFFSET VOLTAGE DRIFT: ±450µV max, ±5µV/°C max ● LOW GAIN ERROR: 0.05% max ● UNITY-GAIN INVERTING AMPLIFIER ● GAIN = +1/2 OR G = +2 AMPLIFIER ● WIDE BANDWIDTH: 1.5MHz ● HIGH SLEW RATE: 5V/µs ● SUMMING AMPLIFIER ● SYNCHRONOUS DEMODULATOR ● FAST SETTLING TIME: 5.5µs to 0.01% ● LOW QUIESCENT CURRENT: 950µA ● CURRENT/DIFFERENTIAL LINE RECEIVER ● VOLTAGE-CONTROLLED CURRENT SOURCE ● WIDE SUPPLY RANGE: ±2.25V to ±18V ● SO-8 and SO-14 PACKAGES ● BATTERY POWERED SYSTEMS ● LOW COST AUTOMOTIVE DESCRIPTION The differential amplifier is the foundation of many commonly used circuits. The low cost INA133 and INA2133 provide this precision circuit function without using an expensive precision network. The INA133 and INA2133 are high slew rate, unitygain difference amplifiers consisting of a precision op amp with a precision resistor network. The on-chip resistors are laser trimmed for accurate gain and high common-mode rejection. Excellent TCR tracking of the resistors maintains gain accuracy and common-mode rejection over temperature. They operate over a wide supply range, ±2.25V to ±18V (+4.5V to +36V single supply), and input common-mode voltage range extends beyond the positive and negative supply rails. The single version, INA133, package is the SO-8 surface mount. The dual version, INA2133, package is the SO-14 surface mount. Both are specified for operation over the extended industrial temperature range, –40°C to +85°C. Operation is from –55°C to +125°C. V+ 11 –In A 2 25kΩ 25kΩ 12 Sense A V+ 7 –In 2 25kΩ 25kΩ 5 Sense +In A 6 +In 3 25kΩ 13 A 25kΩ 1 Output –In B 3 6 25kΩ 25kΩ 25kΩ 25kΩ Ref 14 10 9 B Out A Ref A Sense B Out B INA133 4 +In B 5 25kΩ 25kΩ 8 Ref B V– INA2133 4 V– www.BDTIC.com/TI International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ©1999 Burr-Brown Corporation SBOS115 PDS-1530A Printed in U.S.A. June, 1999 SPECIFICATIONS: VS = ±15V At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. INA133U INA2133U PARAMETER CONDITIONS OFFSET VOLTAGE(1) Initial(1) vs Temperature vs Power Supply vs Time Channel Separation (dual) MIN TYP MAX ±450 ±5 ±30 dc ±150 ±2 ±10 0.3 120 VCM = 0V 50 25 RTO VCM = 0V TA = –40°C to +85°C VS = ±2.25V to ±18V INPUT IMPEDANCE(2) Differential Common-Mode INPUT VOLTAGE RANGE Common-Mode Voltage Range Positive Negative Common-Mode Rejection Ratio VCM VO = 0V VO = 0V = –27V to +27V, RS = 0Ω OUTPUT VOLTAGE NOISE(3) f = 0.1Hz to 10Hz f = 10Hz f = 100Hz f = 1kHz 2(V+) –3 2(V–) +3 80 MIN ✻ ✻ 74 2(V+) –2 2(V–) +2 90 TYP MAX UNITS ✻ ±900 See Typical Curve 900 ±50 ✻ ✻ µV µV/°C µV/V µV/√mo dB ✻ ✻ kΩ kΩ ✻ ✻ ✻ V V dB ✻ ✻ ✻ ✻ µVp-p nV/√Hz nV/√Hz nV/√Hz RTO 2 80 60 57 GAIN Initial Error vs Temperature Nonlinearity 1 ±0.02 ±1 ±0.0001 VO = –14V to +13.5V TA = –40°C to +85°C VO = –14V to +13.5V OUTPUT Voltage Output Positive Negative Positive Negative Current Limit, Continuous-to-Common Capacitive Load (stable operation) FREQUENCY RESPONSE Small-Signal Bandwidth Slew Rate Settling Time: 0.1% 0.01% Overload Recovery Time Gain Error < 0.1% RL = 10kΩ to Ground RL = 10kΩ to Ground R L = 100kΩ to Ground R L = 100kΩ to Ground (V+) –1.5 (V–) +1 –3dB 10V Step, CL = 100pF 10V Step, CL = 100pF 50% Overdrive POWER SUPPLY Rated Voltage Operating Voltage Range Dual Supplies Single Supply Quiescent Current (per amplifier) TEMPERATURE RANGE Specification Operation Storage Thermal Resistance SO-8 Surface Mount SO-14 Surface Mount INA133UA INA2133UA ✻ ✻ ±0.1 ✻ ±0.002 V/V % ppm/°C % of FS ✻ ✻ ✻ ✻ ✻ ✻ V V V V mA pF 1.5 5 4 5.5 4 ✻ ✻ ✻ ✻ ✻ MHz V/µs µs µs µs ±15 ✻ V (V+)–1.3 (V–)+0.8 (V+)–0.8 (V–)+0.3 –25/+32 1000 ±2.25 +4.5 ±0.95 IO = 0 ✻ ✻ ✻ ✻ ±0.05 ±10 ±0.001 –40 –55 –55 ±18 +36 ±1.2 ✻ ✻ +85 +125 +125 ✻ ✻ ✻ ✻ θJA 150 100 ✻ ✻ ✻ ✻ ✻ V V mA ✻ ✻ ✻ °C °C °C °C/W °C/W ✻ Specifications the same as INA133U, INA2133U. NOTES: (1) Includes the effects of amplifier’s input bias and offset currents. (2) 25kΩ resistors are ratio matched but have ±20% absolute value. (3) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® www.BDTIC.com/TI INA133, INA2133 2 SPECIFICATIONS: VS = ±5V At TA = +25°C, VS = ±5V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. INA133U INA2133U PARAMETER CONDITIONS OFFSET VOLTAGE(1) Initial(1) vs Temperature MIN RTO VCM = 0V INPUT VOLTAGE RANGE Common-Mode Voltage Range Positive Negative Common-Mode Rejection Ratio VCM GAIN Initial Gain Error Nonlinearity VO = 0V VO = 0V = –7V to +7V, RS = 0Ω 2(V+) – 3 2(V–) + 3 80 OUTPUT Voltage Output Positive Negative Positive Negative Gain Error < 0.1% RL = 10kΩ to Ground RL = 10kΩ to Ground R L = 100kΩ to Ground R L = 100kΩ to Ground POWER SUPPLY Rated Voltage Operating Voltage Range Dual Supplies Single Supply Quiescent Current (per amplifier) TYP MAX ±300 ±2 ±750 (V+) –1.5 (V–) +1 MIN ✻ ✻ 74 2(V+) –2 2(V–) + 2 90 1 ±0.02 ±0.0001 VO = –4V to 3.5V VO = –4V to 3.5V INA133UA INA2133UA (V+) (V–) (V+) (V–) ±0.92 UNITS ✻ ✻ ±1500 µV µV/°C ✻ ✻ ✻ ✻ ✻ ±15 IO = 0 MAX ✻ ✻ ✻ ±0.05 ±0.001 –1.3 +0.8 –0.8 +0.3 ±2.25 +4.5 TYP ±18 +36 ±1.2 V V dB ±0.1 ±0.002 V/V % % of FS ✻ ✻ ✻ ✻ V V V V ✻ V ✻ ✻ ✻ ✻ ✻ ✻ V V mA ✻ Specifications the same as INA133U, INA2133U. NOTES: (1) Includes the effects of amplifier’s input bias and offset currents. ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC DISCHARGE SENSITIVITY Supply Voltage, V+ to V– .................................................................... 36V Input Voltage Range ........................................................................ 2 • VS Output Short-Circuit (to ground)(2) .......................................... Continuous Operating Temperature .................................................. –55°C to +125°C Storage Temperature ..................................................... –55°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) One channel per package. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION PRODUCT Single INA133U " INA133UA " Dual INA2133U " INA2133UA " PACKAGE PACKAGE DRAWING NUMBER(1) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER(2) TRANSPORT MEDIA SO-8 Surface Mount 182 –40°C to +85°C INA133U " " " " SO-8 Surface Mount 182 –40°C to +85°C INA133UA " " " " INA133U INA133U/2K5 INA133UA INA133UA/2K5 Rails Tape and Reel Rails Tape and Reel SO-14 Surface Mount 235 –40°C to +85°C INA2133U " " " " SO-14 Surface Mount 235 –40°C to +85°C INA2133UA " " " " INA2133U INA2133U/2K5 INA2133UA INA2133UA/2K5 Rails Tape and Reel Rails Tape and Reel NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces of “INA133UA/2K5” will get a single 2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book. www.BDTIC.com/TI 3 INA133, INA2133 ® PIN CONFIGURATIONS Top View SO-8 Top View SO-14 INA2133 INA133 1 Ref 8 NC NC 1 –In A 2 14 Ref A 13 Out A A +In A 3 12 Sense A Output V– 4 11 V+ Sense +In B 5 10 Sense B –In 2 7 V+ +In 3 6 V– 4 5 B –In B 6 9 Out B NC 7 8 Ref B NC = No Connection NC = No Connection ® www.BDTIC.com/TI INA133, INA2133 4 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. GAIN vs FREQUENCY 10 COMMON-MODE REJECTION vs FREQUENCY Common-Mode Rejection (dB) +25°C 0 Closed-Loop Gain (dB) 100 +125°C –55°C –10 –20 –30 –40 VS = ±15V or ±5V 90 80 70 60 50 VS = ±15V or ±5V –50 40 10k 100k 1M 10M 100 1k 10k Frequency (Hz) 1M CHANNEL SEPARATION vs FREQUENCY POWER SUPPLY REJECTION vs FREQUENCY 130 120 100 Channel Separation (dB) Power Supply Rejection (dB) 100k Frequency (Hz) –PSRR 80 60 +PSRR 40 120 110 100 INA2133 90 20 1 10 100 1k 10k 100k 100 10k Frequency (Hz) INPUT COMMON-MODE VOLTAGE vs OUTPUT VOLTAGE TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY 40 100k 0.1 VS = ±15V 500kHz Filter 30 20 10 THD+N (%) Common-Mode Voltage (V) 1k Frequency (Hz) 0 –10 –20 0.01 VS = ±5V –30 –40 0.001 –15 –10 –5 0 5 10 15 20 Output Voltage (V) 100 1k 10k 20k Frequency (Hz) www.BDTIC.com/TI 5 INA133, INA2133 ® TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. 0.1Hz TO 10Hz PEAK-TO-PEAK VOLTAGE NOISE VOLTAGE NOISE DENSITY vs FREQUENCY 1µV/div Voltage Noise (nV/√Hz) 1000 100 10 1 10 100 1k 10k 500µs/div Frequency (Hz) QUIESCENT CURRENT vs TEMPERATURE SLEW RATE vs TEMPERATURE 1400 7 VS = ±15V VS = ±5V Per Amplifier –SR 6 Slew Rate (V/µs) 1200 1100 1000 900 5 +SR 4 800 3 700 –75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 Temperature (°C) 75 (V+) VS = ±15V VS = ±5V 100 125 –40°C (V+) –5 Output Voltage (V) +ISC 30 –ISC 25 +ISC 20 50 OUTPUT VOLTAGE SWING vs OUTPUT CURRENT SHORT-CIRCUIT CURRENT vs TEMPERATURE 35 25 Temperature (°C) 40 Short-Circuit |mA| Quiescent Current (µA) 1300 25°C 85°C (V+) –10 0 85°C (V–) +10 25°C (V–) +5 –40°C –ISC 15 –75 –50 –25 0 V– 25 50 75 100 0 125 ® ±5 ±10 ±15 ±20 Output Current (mA) Temperature (°C) www.BDTIC.com/TI INA133, INA2133 6 ±25 ±30 ±35 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. OFFSET VOLTAGE PRODUCTION DISTRIBUTION VS = ±5V OFFSET VOLTAGE PRODUCTION DISTRIBUTION VS = ±15V OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION VS = ±15V OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION VS = ±5V 60 Typical production distribution of packaged units. Singles and duals included. 40 35 30 25 20 15 10 1400 Typical production distribution of packaged units. Singles and duals included. 50 Percent of Units (%) 45 1200 800 Offset Voltage (µV) 1000 600 –1400 Offset Voltage (µV) 50 Percent of Units (%) 400 0 0 0 –200 5 –900 –800 –700 –600 –500 –400 –300 –200 –100 0 100 200 300 400 500 600 700 800 900 5 200 10 –400 10 15 –600 15 20 –800 20 –1000 25 Typical production distribution of packaged units. Singles and duals included. 25 Percent of Units (%) 30 Percent of Units (%) 30 Typical production distribution of packaged units. Singles and duals included. –1200 35 40 30 20 10 5 0 0 0 1 2 3 4 5 6 7 8 9 10 0 Offset Voltage Drift (µV/°C) 4 5 6 7 8 9 10 SETTLING TIME vs LOAD CAPACITANCE –Overshoot VS = ±15V VS = ±5V 12 Settling Time (µs) +Overshoot Overshoot (%) 3 14 VS = ±5V VS = ±15V 50 2 Offset Voltage Drift (µV/°C) SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 60 1 40 –Overshoot 30 20 10 8 0.01% 6 4 +Overshoot 10 10V Step 0.1% 2 0 0 100 1k 10k 100 100k 1k 10k Capacitive Load (pF) Load Capacitance (pF) www.BDTIC.com/TI 7 INA133, INA2133 ® TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, RL = 10kΩ connected to ground, and reference pin connected to ground, unless otherwise noted. LARGE-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE CL = 100pF 2V/div 100mV/div CL = 1000pF CL = 1000pF 2.5µs/div 2.5µs/div MAXIMUM OUTPUT VOLTAGE vs FREQUENCY Peak-to-Peak Output Voltage (V) 32 28 VS = ±15V 24 20 16 12 VS = ±5V 8 4 0 10k 100k 1M Frequency (Hz) ® www.BDTIC.com/TI INA133, INA2133 8 APPLICATIONS INFORMATION changed, pins 2 and 5 must also be interchanged to maintain proper ratio matching. The INA133 and INA2133 are high-speed difference amplifiers suitable for a wide range of general purpose applications. Figure 1 shows the basic connections required for operation of the INA133. Decoupling capacitors are strongly recommended in applications with noisy or high impedance power supplies. The capacitors should be placed close to the device pins as shown in Figure 1. All circuitry is completely independent in the dual version assuring lowest crosstalk and normal behavior when one amplifier is overdriven or short-circuited. OPERATING VOLTAGE The INA133 and INA2133 operate from single (+4.5V to +36V) or dual (±2.25V to ±18V) supplies with excellent performance. Specifications are production tested with ±5V and ±15V supplies. Most behavior remains unchanged throughout the full operating voltage range. Parameters which vary significantly with operating voltage are shown in the Typical Performance Curves. As shown in Figure 1, the differential input signal is connected to pins 2 and 3. The source impedances connected to the inputs must be nearly equal to assure good commonmode rejection. A 5Ω mismatch in source impedance will degrade the common-mode rejection of a typical device to approximately 80dB (a 10Ω mismatch degrades CMR to 74dB). If the source has a known impedance mismatch, an additional resistor in series with the opposite input can be used to preserve good common-mode rejection. INPUT VOLTAGE The INA133 and INA2133 can accurately measure differential signals that are above and below the supply rails. Linear common-mode range extends from 2 • (V+)–3V to 2 • (V–) +3V (nearly twice the supplies). See the typical performance curve, “Input Common-Mode Voltage vs Output Voltage.” OFFSET VOLTAGE TRIM The INA133’s internal resistors are accurately ratio trimmed to match. That is, R1 is trimmed to match R2 and R3 is trimmed to match R4. However, the absolute values may not be equal (R1 + R2 may be slightly different than R3 + R4). Thus, large series resistors on the input (greater than 250Ω), even if well matched, will degrade common-mode rejection. The INA133 and INA2133 are laser trimmed for low offset voltage and drift. Most applications require no external offset adjustment. Figure 2 shows an optional circuit for trimming the output offset voltage. The output is referred to the output reference terminal (pin 1), which is normally grounded. A voltage applied to the Ref terminal will be summed with the output signal. This can be used to null offset voltage as shown in Figure 2. The source impedance of a signal applied to the Ref terminal should be less than 10Ω to maintain good common-mode rejection. Circuit board layout constraints might suggest possible variations in connections of the internal resistors. For instance, it appears that pins 1 and 3 could be interchanged. However, because of the ratio trimming technique used (see paragraph above) CMRR will be degraded. If pins 1 and 3 are inter- INA133 V+ V– 1µF 1µF 2 V2 R1 R2 7 4 5 6 VO INA133 –In V2 2 R1 25kΩ R2 25kΩ 10Ω 5 V3 3 R3 R4 6 +In V3 3 R3 25kΩ R4 25kΩ 1 +15V VOUT = V3 – V2 Gain Error = ±0.01% CMR = 90dB Nonlinearity = ±0.0001% V O = V3 – V 2 Offset Adjustment Range = ±1mV 1 150kΩ 100kΩ 10Ω –15V FIGURE 1. Precision Difference Amplifier (Basic Power Supply and Signal Connections). FIGURE 2. Offset Adjustment. www.BDTIC.com/TI 9 INA133, INA2133 ® TYPICAL APPLICATIONS V1 INA133 –In V+ A1 V+ 3 2 INA133 5 2 R2 5 6 R1 VO R2 7 6 1 3 VO = (V+)/2 A2 V2 +In VO = (1 + 2R2/R1) (V2 –V1) Common 4 1 Common The INA133 can be combined with op amps to form a complete instrumentation amplifier with specialized performance characteristics. Burr-Brown offers many complete high performance IAs. Products with related performances are shown at the right in the table below. FIGURE 5. Pseudoground Generator. A1, A2 SIMILAR COMPLETE BURR-BROWN IA FEATURE OPA2227 Low Noise INA103 OPA129 Ultra Low Bias Current (fA) INA116 OPA2277 Low Offset Drift, Low Noise INA114, INA128 OPA2130 Low Power, FET-Input (pA) INA121 OPA2234 Single Supply, Precision, Low Power INA122, INA118 OPA2237 Single Supply, Low Power, MSOP-8 INA122, INA126 INA133 V2 2 5 6 FIGURE 3. Precision Instrumentation Amplifier. VO = –V2 INA133 2 5 1 100Ω(1) 1% 6 V– 3 Gain Error = 0.05% maximum Nonlinearity = 0.001% maximum Gain Drift = 1ppm/°C V0 0 to 2V 100Ω(1) 1% 1 3 FIGURE 6. Precision Unity-Gain Inverting Amplifier. IIN 0 to 20mA NOTE: (1) Input series resistors should be less than 250Ω (1% max mismatch) to maintain excellent CMR. With 100Ω resistors, gain error is increased to 0.5%. FIGURE 4. Current Receiver with Compliance to Rails. ® www.BDTIC.com/TI INA133, INA2133 10 INA133 INA133 2 5 2 5 6 VO = 2 • V1 1 6 V3 V1 VO = 3 V3 2 ±0.05% max 3 1 Gain Error = 0.025% maximum Gain Drift = 2ppm/°C FIGURE 7. Precision Gain = 2 Amplifier. FIGURE 8. Precision Gain = 1/2 Amplifier. INA133 INA133 2 2 5 6 VO = 1 V1 6 (V1 + V3) 2 ±0.05% max V3 3 VO = V1 + V3 1 V1 ±0.05% max V3 5 3 FIGURE 9. Precision Average Value Amplifier. FIGURE 10. Precision Summing Amplifier. INA133 2 5 R1 R2 Output 6 (1) 1 2 5 INA133 3 Ref Device VFC320 VFC100 DAC80 DAC703 XTR110 Output 0-10kHz 0-FCLOCK/2 0-FS (12 bits) 0-FS (16 bits) 4-20mA 6 V1 V3 OPA277 Voltage Source 1 3 ( Ref must be driven by low impedance. VO VO = 1 + R2 R1 )( V 1 + V3 2 ) For G = 10, See INA143. NOTE: (1) Unipolar Input Device. www.BDTIC.com/TI FIGURE 11. Precision Bipolar Offsetting. FIGURE 12. Precision Summing Amplifier with Gain. 11 INA133, INA2133 ® 1 Noise (60Hz hum) INA115 4 A1 2 Transducer or Analog Signal 25kΩ Feedback 12 3 25kΩ 25kΩ A3 RG 11 14 25kΩ G=1+ 25kΩ 15 A2 25kΩ 5 Noise (60Hz hum) 100kΩ Shield 13 V+ 7 8 10 Ref V– 3 INA133 2 5 6 1 FIGURE 13. Instrumentation Amplifier Guard Drive Generator. 1/2 INA2133 2 12 1/2 INA2133 3 V1 V2 A 6 13 14 V3 V4 10 B 5 9 VO = V3 + V4 – V1 – V2 8 FIGURE 14. Precision Summing Instrumentation Amplifier. ® www.BDTIC.com/TI INA133, INA2133 12 Output 50kΩ RG INA133 1/2 INA2133 5 2 V2 R 2 12 6 R V1 13 A V1 1 3 V01 14 3 IO = (V1 – V2) (1/25k + 1/R) Load IO V2 1/2 INA2133 FIGURE 15. Precision Voltage-to-Current Converter with Differential Inputs. 6 10 INA133 V2 9 B 5 2 V02 8 5 6 R V3 3 V01 – V02 = 2 (V2 – V1) OPA131 1 FIGURE 18. Differential Output Difference Amplifier. IO Load IO = (V3 – V2)/R FIGURE 16. Differential Input Voltage-to-Current Converter for Low IOUT. V2 2 INA133 5 6 INA133 V2 2 R (R ≥ 200Ω) 5 V3 3 1 Gate can be +VCC –5V R 6 R < 200Ω R V3 IO = (V3 – V2) (1/25k + 1/R) IO = Gate can be +VS –5V 1 3 Load (V3 – V2) Load IO R FIGURE 19. Isolating Current Source with Buffering Amplifier for Greater Accuracy. IO www.BDTIC.com/TI FIGURE 17. Isolating Current Source. 13 INA133, INA2133 ® +5V 7 VS INA133 2 5 Transducer or Analog Signal 6 0V-4V Input 1 3 12 Bits Out ADS7806 4 –5V Eliminates errors due to different grounds. FIGURE 20. Differential Input Data Acquisition. INA133 2 5 V1 DG188 6 VO 3 1 Logic In Logic In VO 0 –V1 1 +V1 1 FIGURE 21. Digitally Controlled Gain of ±1 Amplifier. INA133 2 D1 R2 5 10pF 3 D2 V1 Input R1 OPA130 R3 6 V0 = |V1| R4 1 R5 2kΩ www.BDTIC.com/TI FIGURE 22. Precision Absolute Value Buffer. ® INA133, INA2133 14 +15V 2 +10V Out 6 REF102 –In INA133 2 5 BUF634 inside feedback loop contributes no error. INA133 2 5 –10V Out 6 BUF634 4 VO 6 1 +In RL 1 3 3 FIGURE 23. ±10V Precision Voltage Reference. FIGURE 24. High Output Current Precision Difference Amplifier. V+ 0V to 10V In 12.5kΩ 1kΩ 7 50kΩ INA133 2 OPA227 +15V V2 2 5 25kΩ 25kΩ 6 REF102 6 10V For 4-20mA applications, the REF102 sets the 4mA low-scale output for 0V input. R1 50.1Ω 2N3904 Set R1 = R2 V3 3 25kΩ 25kΩ 1 R2 50.1Ω 4 4 IO = 4 to 20mA IO = V3 – V2 RLOAD 1 1 + 25kΩ R2 FIGURE 25. Precision Voltage-to-Current Conversion. www.BDTIC.com/TI 15 INA133, INA2133 ® PACKAGE OPTION ADDENDUM www.ti.com 4-Sep-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty INA133U ACTIVE SOIC D 8 INA133U/2K5 ACTIVE SOIC D INA133U/2K5E4 ACTIVE SOIC INA133UA ACTIVE INA133UA/2K5 75 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR SOIC D 8 Call TI Level-3-260C-168 HR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA133UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA133UAE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HR INA133UE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2133U ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2133U/2K5E4 OBSOLETE SOIC D 14 TBD Call TI INA2133UA ACTIVE SOIC D 14 Green (RoHS & no Sb/Br) CU NIPDAU INA2133UA/2K5E4 OBSOLETE SOIC D 14 TBD Call TI INA2133UAE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2133UAG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2133UE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR INA2133UG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR 75 50 Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HR Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. www.BDTIC.com/TI Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 4-Sep-2009 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. www.BDTIC.com/TI Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 3-Sep-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant INA133U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 INA133UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 www.BDTIC.com/TI Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 3-Sep-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA133U/2K5 SOIC D 8 2500 346.0 346.0 29.0 INA133UA/2K5 SOIC D 8 2500 346.0 346.0 29.0 www.BDTIC.com/TI Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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