Download STY112N65M5

STY112N65M5
N-channel 650 V, 0.019 Ω, 96 A, MDmesh™ V Power MOSFET
in Max247 package
Datasheet — production data
Features
Order code
VDSS
@TjMAX
RDS(on) max
ID
STY112N65M5
710 V
< 0.022 Ω
96 A
■
Higher VDSS rating
■
Higher dv/dt capability
■
Excellent switching performance
■
Easy to drive
■
100% avalanche tested
1
2
3
Max247
Applications
■
Switching applications
Figure 1.
Internal schematic diagram
Description
$
This device is an N-channel MDmesh™ V Power
MOSFET based on an innovative proprietary
vertical process technology, which is combined
with STMicroelectronics’ well-known
PowerMESH™ horizontal layout structure. The
resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially
suitable for applications which require superior
power density and outstanding efficiency.
'
3
!-V
Table 1.
Device summary
Order code
Marking
Package
Packaging
STY112N65M5
112N65M5
Max247
Tube
May 2012
Doc ID 15321 Rev 3
This is information on a product in full production.
www.bdtic.com/ST
1/
www.st.com
12
Contents
STY112N65M5
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/
.............................................. 8
Doc ID 15321 Rev 3
www.bdtic.com/ST
STY112N65M5
1
Electrical ratings
Electrical ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
Gate- source voltage
VGS
Value
Unit
± 25
V
ID
Drain current (continuous) at TC = 25 °C
96
A
ID
Drain current (continuous) at TC = 100 °C
61
A
IDM (1)
Drain current (pulsed)
384
A
PTOT
Total dissipation at TC = 25 °C
625
W
IAR
Max current during repetitive or single pulse avalanche
(pulse width limited by TJMAX)
17
A
EAS
Single pulse avalanche energy
(starting Tj = 25°C, ID = IAR, VDD = 50V)
2400
mJ
15
V/ns
- 55 to 150
°C
150
°C
Value
Unit
Rthj-case Thermal resistance junction-case max
0.2
°C/W
Rthj-amb Thermal resistance junction-ambient max
30
°C/W
300
°C
dv/dt(2)
Tstg
Peak diode recovery voltage slope
Storage temperature
Tj
Max. operating junction temperature
1. Pulse width limited by safe operating area.
2. ISD ≤ 96 A, di/dt = 400 A/µs, VDD = 400 V, peak VDS < V(BR)DSS.
Table 3.
Symbol
Tl
Thermal data
Parameter
Maximum lead temperature for soldering purpose
Doc ID 15321 Rev 3
www.bdtic.com/ST
3/
Electrical characteristics
2
STY112N65M5
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 4.
Symbol
V(BR)DSS
On /off states
Parameter
Test conditions
Drain-source
breakdown voltage
ID = 1 mA, VGS = 0
Min.
Typ.
Max.
Unit
650
V
IDSS
Zero gate voltage
VDS = 650 V
drain current (VGS = 0) VDS = 650 V, TC=125 °C
10
100
µA
µA
IGSS
Gate-body leakage
current (VDS = 0)
±100
nA
4
5
V
0.019
0.022
Ω
Min.
Typ.
Max.
Unit
VGS = ± 25 V
VGS(th)
Gate threshold voltage VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source on
resistance
Table 5.
Symbol
3
VGS = 10 V, ID = 48 A
Dynamic
Parameter
Test conditions
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 100 V, f = 1 MHz,
VGS = 0
-
16870
365
7
-
pF
pF
pF
Co(tr)(1)
Equivalent
capacitance time
related
VGS = 0, VDS = 0 to 520 V
-
1333
-
pF
Co(er)(2)
Equivalent
capacitance energy
related
VGS = 0, VDS = 0 to 520 V
-
350
-
pF
RG
Intrinsic gate
resistance
f = 1 MHz open drain
-
1.26
-
Ω
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 520 V, ID = 48 A,
VGS = 10 V
(see Figure 15)
-
350
97
118
-
nC
nC
nC
Ciss
Coss
Crss
1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0
to 80% VDSS.
2. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0
to 80% VDSS.
4/
Doc ID 15321 Rev 3
www.bdtic.com/ST
STY112N65M5
Electrical characteristics
Table 6.
Symbol
Switching times
Parameter
Test conditions
Voltage delay time
Voltage rise time
Current fall time
Crossing time
td(v)
tr(v)
tf(i)
tc(off)
Table 7.
VDD = 400 V, ID = 64 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 16)
(see Figure 19)
Parameter
ISD
ISDM (1)
Source-drain current
Source-drain current (pulsed)
VSD (2)
Forward on voltage
IRRM
trr
Qrr
IRRM
Typ.
-
267
79
53
140
Min.
Typ.
Max. Unit
-
ns
ns
ns
ns
Source drain diode
Symbol
trr
Qrr
Min.
Test conditions
Max. Unit
-
96
384
A
A
ISD = 96 A, VGS = 0
-
1.5
V
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 96 A, di/dt = 100 A/µs
VDD = 100 V (see Figure 16)
-
570
17
60
ns
µC
A
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 96 A, di/dt = 100 A/µs
VDD = 100 V, Tj = 150 °C
(see Figure 16)
-
695
26
73
ns
µC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Doc ID 15321 Rev 3
www.bdtic.com/ST
5/
Electrical characteristics
STY112N65M5
2.1
Electrical characteristics (curves)
Figure 2.
Safe operating area
Figure 3.
Thermal impedance
AM09125v1
AM08892v1
ID
(A)
O
p
Li era
m
ite tion
d
by in t
m his
ax
a
R rea
D
S( is
on
)
Tj=150°C
Tc=25°C
Single pulse
100
10
K
δ=0.5
0.2
0.1
100µs
1ms
0.05
-1
10
0.02
10ms
0.01
Zth=k Rthj-c
δ=tp/τ
Single pulse
1
tp
τ
0.1
0.1
Figure 4.
-2
10
1
100
VDS(V)
Output characteristics
10 -4
10
Figure 5.
AM08893v1
ID (A)
VGS=10V
300
-2
-3
-1
10
10
tp (s)
10
Transfer characteristics
AM08894v1
ID
(A)
VDS=30V
300
7V
250
250
200
6V
200
150
150
100
100
50
50
5V
0
0
Figure 6.
5
10
15
Normalized VDS vs temperature
AM10399v1
VDS
0
0
VDS(V)
(norm)
Figure 7.
2
8
6
10
VGS(V)
Static drain-source on resistance
AM08896v1
RDS(on)
(Ω)
1.08
ID = 1mA
4
VGS=10V
0.022
1.06
1.04
0.020
1.02
1.00
0.018
0.98
0.96
0.016
0.94
0.92
-50 -25
6/
0
25
50
75 100
TJ(°C)
0.014
0
20
40
60
Doc ID 15321 Rev 3
www.bdtic.com/ST
80
ID(A)
STY112N65M5
Figure 8.
Electrical characteristics
Gate charge vs gate-source voltage Figure 9.
AM08897v1
VGS
(V) VDS
12
VDS (V)
VDD=520V
ID=48A
Capacitance variations
!-V
#
P&
500
400
300
#ISS
10
8
#OSS
6
200
100
4
2
0
0
100
200
300
400
AM08899v1
VGS(th)
(norm)
6$36
Figure 11. Normalized on resistance vs
temperature
AM08900v1
RDS(on)
(norm)
ID=250µA
1.10
0
Qg(nC)
Figure 10. Normalized gate threshold voltage
vs temperature
#RSS
VGS=10V
2.1
1.00
1.7
0.90
1.3
0.80
0.9
0.70
-50 -25
0
25
50
75 100
TJ(°C)
Figure 12. Output capacitance stored energy
0.5
-50 -25
0
25
50
75 100
TJ(°C)
Figure 13. Switching losses vs gate resistance
(1)
AM08902v1
AM08901v1
Eoss
(µJ)
70
E (μJ)
6000
60
Eoff
ID=64A
VDD=400V
TJ=25°C
5000
50
4000
Eon
40
3000
30
2000
20
1000
10
0
0
100
200 300
400 500 600
VDS(V)
0
0
10
20
30
40
RG(Ω)
1. Eon including reverse recovery of a SiC diode
Doc ID 15321 Rev 3
www.bdtic.com/ST
7/
Test circuits
3
STY112N65M5
Test circuits
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
μF
2200
RL
μF
VGS
IG=CONST
VDD
100Ω
Vi=20V=VGMAX
VD
RG
2200
μF
D.U.T.
D.U.T.
VG
2.7kΩ
PW
47kΩ
1kΩ
PW
AM01468v1
AM01469v1
Figure 16. Test circuit for inductive load
Figure 17. Unclamped inductive load test
switching and diode recovery times
circuit
A
A
D.U.T.
FAST
DIODE
B
B
L
A
D
G
VD
L=100μH
S
3.3
μF
B
25 Ω
1000
μF
D
VDD
2200
μF
3.3
μF
VDD
ID
G
RG
S
Vi
D.U.T.
Pw
AM01470v1
Figure 18. Unclamped inductive waveform
V(BR)DSS
AM01471v1
Figure 19. Switching time waveform
#ONCEPTWAVEFORMFOR)NDUCTIVE,OAD4URNOFF
)D
VD
6DS
)D
4DELAYOFF
OFF
IDM
6GS
6GS
ON
ID
6GS)T
VDD
VDD
6DS
)D
6DS
4R ISE
AM01472v1
8/
4FALL
4CROSS OVER
Doc ID 15321 Rev 3
www.bdtic.com/ST
!-V
STY112N65M5
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Table 8.
Max247 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
4.70
5.30
A1
2.20
2.60
b
1.00
1.40
b1
2.00
2.40
b2
3.00
3.40
c
0.40
0.80
D
19.70
20.30
e
5.35
5.55
E
15.30
15.90
L
14.20
15.20
L1
3.70
4.30
Doc ID 15321 Rev 3
www.bdtic.com/ST
9/
Package mechanical data
STY112N65M5
Figure 20. Max247 drawing
0094330_Rev_D
10/
Doc ID 15321 Rev 3
www.bdtic.com/ST
STY112N65M5
5
Revision history
Revision history
Table 9.
Document revision history
Date
Revision
Changes
20-Jan-2009
1
First release.
20-May-2011
2
Document status pomoted from preliminary data to datasheet.
03-May-2012
3
Section 4: Package mechanical data has been updated.
Doc ID 15321 Rev 3
www.bdtic.com/ST
11/
STY112N65M5
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY TWO AUTHORIZED ST REPRESENTATIVES, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2012 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
12/
Doc ID 15321 Rev 3
www.bdtic.com/ST