Download Chapter 7 Lecture Presentation

Final Chapter
Packet-Switching and
Circuit Switching
7.3. Statistical Multiplexing and
Packet Switching:
Datagrams and Virtual Circuits
4. 4 Time Division Multiplexing and
Circuit Switching
5.7.1 Statistical Multiplexing



Multiplexing concentrates bursty traffic onto a shared line
information flow should include source address and destination
address
Greater efficiency and lower cost
Header
Data payload
Input lines
A
B
Buffer
Output line
C
Statistical Multiplexing Asynchronous Time Division Multiplexing



Statistical Multiplexing involves the sharing of transmission channels
(resource) by several connections A, B, ···, Z or information flows
which will be transmitted (served) on demand (statistically). Thus
Significant economies of scale can be achieved
Ports A, B, ···, Z in the multiplexer should provide sufficient number of
buffers; information packets will be stored and forward, thus cause
delay
The shared channel would be E-carrier (T-carrier) or SDH (SONET)
A2
A1
Shared
Channel
B1
MUX
B2
DeMUX
Z1
Statistical Multiplexing
Z2
3
Multiplexer/Demultiplexer inherent in
Packet Switches
Multiplexer
1
1
2
2
DeMultiplexer



N





N
Packets/frames forwarded to buffer prior to transmission from switch
Multiplexing occurs in these buffers
Multiplexer Modeling
Input lines
A
Output line
B
Buffer
C





Arrivals: What is the packet interarrival pattern?
Service Time: How long are the packets?
Service Discipline: What is order of transmission?
Buffer Discipline: If buffer is full, which packet is dropped?
Performance Measures: Delay Distribution; Packet Loss Probability;
Line Utilization
Chapter 7
Packet-Switching
Networks
7.3 Datagrams and Virtual
Circuits
The Packet Switching Function




Store and then forward packet by switching it to an appropriate
output port according to a routing table. Notice that the routing
table could be updated dynamically, depending on the traffic
condition
Dynamic interconnection of input ports to output ports
Enables dynamic sharing of transmission resource
Two fundamental approaches:


Connectionless
Connection-Oriented: Call setup control, Connection control, Connection
release
Switch
Access Network
Backbone Network
Packet Switching Network
Packet switching network

User
Transmission
line


Network
Packet
switch
Transfers packets between
users
Transmission lines + packet
switches (routers)
Origin in message switching
Two modes of operation:


Connectionless
Virtual Circuit
Packet Switching - Datagram





Messages are broken into smaller
units (packets)
Source & destination addresses
included in the packet header
Datagram: Connectionless,
where packets are routed
independently, no dedicated
path for the data transfer
phase
Packets may arrive out of order
Pipelining of packets across
network can induce out of order,
but increase system throughput
Packet 1
Packet 1
Packet 2
Packet 2
Packet 2
Routing Tables in Datagram Networks
Destination
address
Output
port


0785
7
1345
12
1566
6


2458
12
Route determined by table
lookup
Routing decision involves
finding the next hop in the
route to the given destination
Routing table has an entry for
each destination specifying
output port that leads to the
next hop
Size of table becomes
impractical for very large
number of destinations
Example: Internet Routing

Internet protocol uses datagram packet switching across
networks


Hosts have two-port IP address:


Network address + Host address
Routers do table lookup on network address


Networks are treated as data links
This reduces size of routing table
In addition, network addresses are assigned so that they
can also be aggregated

Discussed as §8.2.5 Classless Interdomain Routing (CIDR) in
Chapter 8
Packet Switching – Virtual Circuit
Packet
Packet
Packet
Packet
Virtual circuit






Call set-up phase establishes a fixed path along network before the
data transfer phase
All packets for the connection follow the same path
Abbreviated header identifies connection on each link
Packets queue for transmission
Variable bit rates possible, negotiated during call set-up
Delays are still variable, but will not be less than circuit switching
Connection Setup
Connect
request
Connect
confirm





SW
1
Connect
request
Connect
confirm
SW
2
…
SW
n
Connect
request
Connect
confirm
Signaling messages propagate as route is selected
Signaling messages identify connection and setup tables in switches
Typically a connection is identified by a local tag, Virtual Circuit
Identifier (VCI)
Each switch only needs to know how to relate an incoming tag in
one input to an outgoing tag in the corresponding output
Once tables are setup, packets can flow along the path
Connection Setup Delay
t
Connect
request
CC
CR
CC
CR



Connect
confirm
1
2
3
1
2
Release
3
t
t
1
2
3
Connection setup delay is incurred before any
packet can be transferred
Delay is acceptable for sustained transfer of large
number of packets
This delay may be unacceptably high if only a few
packets are being transferred
t
Virtual Circuit Forwarding Tables
Input
VCI
Output
port
Output
VCI


12
13
44

15
15
23
27
13
16


58
7
34
Each input port of packet
switch has a forwarding table
Lookup entry for VCI of
incoming packet
Determine output port (next
hop) and insert VCI for next
link
Very high speeds are possible
Table can also include priority
or other information about how
packet should be treated
Cut-Through switching
Source
Switch 1
Switch 2
t
2
1
3
t
2
1
t
1
Destination
3
2
3
Minimum delay = 3 + T
t

Some networks perform error checking on header only, so packet can
be forwarded as soon as the header is received & processed

Delays reduced further with cut-through switching
Chapter 7
Packet-Switching
Networks
Datagrams and Virtual Circuits
Structure of a Packet Switch
1
1
2
2



N



•••
•••
•••
Packet Switch: Intersection where
Traffic Flows Meet



N
Input ports contain multiplexed flows from access muxs & other
packet switches
Flows are demultiplexed at input ports, routed and/or forwarded to
output ports
Packets buffered, prioritized, and multiplexed on output ports
Generic Packet Switch
“Unfolded” View of Switch
 Ingress Line Card (input port)
Controller


N
Line card
1
Line card
2
Line card
3

Controller




Line card
N

Data path
Control path
Output ports
(a)
Transfer packets between line
cards
Egress Line Card (output port)


Input ports
Routing in small switches
Signalling & resource allocation
Interconnection Fabric
…
Line card
Line card
…
…
3
Line card
Interconnection
fabric
2
Line card
…
1

Header processing
Demultiplexing
Routing in large switches
Scheduling & priority
Multiplexing
Line Cards
Framer
Network
processor
Transceiver
To
physical
ports
Backplane
transceivers
Framer
To
switch
fabric
Folded View
 1 circuit board is ingress/egress line card
 Physical layer processing
 Data link layer processing
 Network header processing
 Physical layer across fabric + framing
To
other
line
cards
Interconnection
fabric
Transceiver
Shared Memory Packet Switch
Ingress
Processing
Connection
Control
Output
Buffering
1
1
Queue
Control
2
2
3
N
Shared
Memory
…
…
3
N
Small switches can be built by reading/writing into shared memory
Crossbar Switches
(b) Output buffering
(a) Input buffering
Inputs
Inputs
1
3
1
2
83
2
3
…
…
3
N
N
…
1



2 3
Outputs
…
N
1
2 3
Outputs
N
Large switches built from crossbar & multistage space switches
Requires centralized controller/scheduler (who sends to whom when)
Can buffer at input, output, or both (performance vs complexity)
Self-Routing Switches
Inputs
Outputs
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
Stage 1



Stage 2
Stage 3
Self-routing switches do not require controller
Output port number determines route
101 → (1) lower port, (2) upper port, (3) lower port
Time-Division Multiplexing

High-speed digital channel like E-carrier and SDH, where
the channel is divided into fixed number of time slots and
dedicated to some ports
A1
(a) Each signal
transmits 1 unit
every 3T
seconds
0
T
B1
…
B2
6
T
3T
0
T
0
T
1T 2T
C1 A2
3T 4T


t
t
6
T
B2
t

…
C2
3T
A1 B1
0T
6
T
3T
C1
(b) Combined
signal transmits
1 unit every T
seconds
…
A2
C2
…
Framing required
Telephone digital
transmission
Digital
transmission in
backbone network
t
5T 6T
24
Circuit Switches


Circuits consist of dedicated resources in sequence of
links & switches across network for data transfer phase
Circuit switch connects input links to output links
Network
Switch
Control
Switch
User n
1
2
3
…
User n – 1
User 1
N
Connection
of inputs
to outputs
1
2
3
…
Link
N
25
Crossbar Space Switch



N x N array of
crosspoints
Connect an input to
an output by closing a
crosspoint
Nonblocking (internal
blocking) : Any input
can connect to idle
output
Complexity: N2
crosspoints
1
2
…

N
1
2
…
N –1 N
26
Multistage Space Switch
2(N/n)nk + k (N/n)2 crosspoints
nk
1
N
inputs
nk
N/n  N/n
1
2
N/n  N/n
nk
2
3
1
kn
2
kn
N
outputs
3
kn
nk
N/n
kn
…

…

Large switch is built with multiple stages
The n inputs to a first-stage switch share k paths through intermediate
crossbar switches
Larger k (more intermediate switches) means more paths to output
…

N/n  N/n
k
N/n
27
謝 謝 聆 聽
謝 謝 合 作