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Course Administration Instructor: Yanyong Zhang [email protected] Core 518 Hours: TF 10:30 –11:30 am TAs: TBD Labs: Everyone will be using your ece account. Texts: Computer Organization and Design: The Hardware/Software Interface, Third Edition, Patterson and Hennessy VHDL Starter’s Guide, Yalamanchili 331 W01.2 Spring 2006 Course Administration Course web page http://www.ece.rutgers.edu/~yyzhang/spring06 Class mailing list [email protected] 331 W01.3 Please check the course web page regularly (at least once before class) for announcements, assignments, and more importantly, lecture notes. By default, I will use your eden account. If you prefer another email account, please send me emails. Please post emails on this list only when you want to talk to the whole class. If you only want to talk to the instructor, or a TA, please send him/her individual emails. I will be using the list to distribute the announcements and answer some common questions. I will send test messages before Friday’s lecture. Please talk to me on Friday if you haven’t got anything. WebCT is available for you to check your grades and conduct group discussion. Please do not expect the instructor to participate. Spring 2006 Convention Please check your email and the course web page regularly. Every class Instructor vs. TA vs. students 331 W01.4 First 10-15 minutes, review of last class Students will be randomly picked to answer questions Class participation will be based on this Discussion-oriented Instructors are responsible for answering questions related to the lectures and exams TAs are responsible for answering questions related to homework, projects, and grades If TAs cannot answer the students, they will contact the instructor directly. Spring 2006 Course Goals and Structure Fundamentals of assembly language programming Introduction to the major components of a computer system. To bridge the gap between high level programming and low level digital design. 14:332:231 Digital Logic Design 14:332:252 Programming Methodology Corequisites 331 W01.5 VHDL design simulation using the Synopsys VSS tools Prerequisite (required): MIPS assembler programming using the spim system 14:332:333 Computer Architecture Lab Spring 2006 spim Assembler and Simulator spim is a self-contained assembler and simulator for the MIPS R2000/R3000 It provides a simple assembler, debugger and a simple set of operating system services It implements both a simple, terminal-style interface and a visual windowing interface Available as xspim on unix - installed on the Sun machines in EE bldg, /usr/local/spim/bin/xspim PCSpim on Windows - can be downloaded and installed on your own PC from www.cs.wisc.edu/~larus/spim.html 331 W01.6 Sorry, there is no Macintosh version of spim Spring 2006 vhdl Analyzer and Simulator VSS is Synopsys’s VHDL system simulator It provides a vhdl analyzer that translates vhdl code into the binary required by the vhdl simulator It provides a vhdl simulator and a source code debugger with a graphical user interface for monitoring the simulation It provides a waveform viewer for observing the results of the simulation as signal waveforms Available as vhdlan (text based) or gvan (graphical) vhdlsim (text based) or vhdldbx (graphical) waves - The entire (almost) Synopsys tool set is installed on the Sun machines in the EE bldg 331 W01.7 Spring 2006 Grading Information Grade determinates 331 W01.8 Midterm Exam #1 Midterm Exam #2 Final Exam Homework Assignments In-class pop quizzes Class Participation ~21% ~23% ~26% ~20% ~ 5% ~ 5% Please let me know about exam conflicts ASAP Spring 2006 Grading Policies Assignments will be submitted via email (mostly) and must be turned in by 5:00pm on the due date. No late assignments will be accepted. All the assignments should be completed individually. Duplicate assignments will receive duplicate grades of zero. Second offenses will result in a final course grade of F. Grades will be posted on the WebCT 331 W01.9 See TAs about grading questions on the assignments; see instructor (me) about grading questions on the exams Spring 2006 About 14:332:333 14:332:333 will start from the week of 1/30 (the week after next) Enrollment: Section: 01 Section: 02 Section: 04 Section: 05 Section: 07 Time: M 12:00-3:00 PM Time: M 3:20-6:20 PM Time: W 12:00-3:00 PM Time: W 3:20-6:20 PM Time: F 3:20-6:20 PM 12 8 17 4 6 I would like to cancel Sections 05 and 07. 331 W01.10 Spring 2006 Head’s Up This week’s material Course introduction - Reading assignment – PH 1.1 through 1.3 and A.9 through A.10 Reminders 14:332:333 will start from next week Question/comments about the system go to [email protected]; questions about the programming assignments go to the course TAs. Next week’s material Introduction to MIPS assembler - Reading assignment - PH 3.1 through 3.3, 3.4, and 3.7 331 W01.11 Spring 2006 What You Should Already Know How to write, compile and run programs in a higher level language (C, C++, Java, …) How to create, organize, and edit files and run programs on Unix How to represent and operate on positive and negative numbers in binary form (two’s complement, sign magnitude, etc.) Logic design 331 W01.12 How to design combinational and sequential components (Boolean algebra, logic minimization, technology mapping, decoders and multiplexors, latches and flipflops, registers, mealy/moore finite state machines, state assignment and minimization, etc.) How to use a logic schematic capture and simulation tool (e.g., LogicWorks) Spring 2006 Below the Program High-level language program (in C) swap (int v[], int k) (int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; ) Assembly language program (for MIPS) swap: sll add lw lw sw sw jr C compiler $2, $5, 2 $2, $4,$2 $15, 0($2) $16, 4($2) $16, 0($2) $15, 4($2) $31 Machine (object) code (for MIPS) assembler 000000 00000 00101 0001000010000000 000000 00100 00010 0001000000100000 . . . 331 W01.14 Spring 2006 Advantages of Higher-Level Languages Higher-level languages Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, …) Improve programmer productivity – more understandable code that is easier to debug and validate Improve program maintainability Allow programmers to be independent of the computer on which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine) Emergence of optimizing compilers that produce very efficient assembly code optimized for the target machine As a result, very little programming is done today at the assembler level 331 W01.15 Spring 2006 Major Components of a Computer Processor Control Datapath 331 W01.17 Devices Memory Input Output Spring 2006 Computer Types Notebook computer Sony Vaio, IBM Thinkpad, etc Mobile users Desktop Workstation Dell Dimension, Dell OptiPlex Most widely used in everyday life Dell Precision, Sun Blade, IBM IntelliStation Same dimensions as desktop computers High-resolution graphics I/O capability, more computational power servers ~ supercomputers 331 W01.18 HP Integrity Superdome, IBM eServer Computing power and storage Spring 2006 Computer Organization Processor Control Datapath 331 W01.19 Devices Memory Input Output Spring 2006 Instruction vs. Data void main (){ int a,b,c; c = a + b; // instruction // data // instruction } Instructions (machine instructions) Govern the transfer of information within a computer (e.g., load, store) Specify the arithmetic and logic operations to be performed (e.g., add, sub, mul) Data Operands of the instruction Both instructions and data are in binary format 331 W01.20 Spring 2006 Input Device Inputs Object Code 000000 000000 100011 100011 101011 101011 000000 Processor Control 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 Devices Memory Input Input devices Datapath Output 331 W01.21 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Keyboard Mouse Network Joysticks, trackballs, etc Spring 2006 Object Code Stored in Memory Memory Processor Control Datapath 331 W01.22 000000 000000 100011 100011 101011 101011 000000 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Devices Input Output Spring 2006 Memory Unit: to store the program Primary storage: fast memory that operates at electronic speed Programs must be stored in fast memory when they are being executed The memory contains a large number of semiconductor storage cells, each containing a bit The unit of memory access is a byte or a word, not a bit To provide easy access to any byte/word, a distinct address is associated with each byte location The number of bits in each word is called word length of the computer. That is also the length of instructions. RAM: random access memory. Access time to any location is uniform Memory hierarchy: L-1 cache, L-2 cache, main memory Secondary storage 331 W01.23 Magnetic disks, tapes, optical disks Spring 2006 How to execute a program? Sequential execution Fetch Exec 331 W01.24 Decode Spring 2006 Processor Organization Control needs to have the Ability to input instructions from memory Logic and means to control instruction sequencing Logic and means to issue signals that control the way information flows between datapath components Logic and means to control what operations the datapath’s functional units perform Datapath needs to have the 331 W01.25 Components - functional units (e.g., adder) and storage locations (e.g., register file) - needed to execute instructions Components interconnected so that the instructions can be accomplished Ability to load data from and store data to memory Spring 2006 Instruction Fetch How do you know which instruction next? PC (Program Counter) Where to store PC? (disk, memory, cache, register) How to update PC? (sequential, branch) 331 W01.26 Spring 2006 Processor Fetches an Instruction Processor fetches an instruction from memory PC Memory Processor Control Datapath 331 W01.27 000000 000000 100011 100011 101011 101011 000000 00000 00100 00010 00010 00010 00010 11111 00101 00010 01111 10000 10000 01111 00000 0001000010000000 0001000000100000 0000000000000000 0000000000000100 0000000000000000 0000000000000100 0000000000001000 Devices Input Output Spring 2006 Control Decodes the Instruction Control decodes the instruction to determine what to execute Processor Devices Control 000000 00100 00010 0001000000100000 Memory Input Datapath Output 331 W01.28 Spring 2006 Datapath Executes the Instruction Datapath executes the instruction as directed by control Processor Devices Control 000000 00100 00010 0001000000100000 Memory Input Datapath contents Reg #4 ADD contents Reg #2 results put in Reg #2 331 W01.29 Output Spring 2006 Output Data Stored in Memory At program completion the data to be output resides in memory Processor Memory Control Datapath 331 W01.30 Devices Input 00000100010100000000000000000000 00000000010011110000000000000100 00000011111000000000000000001000 Output Spring 2006 Output Device Outputs Data Processor Control Datapath Devices Memory Input Output 00000100010100000000000000000000 00000000010011110000000000000100 00000011111000000000000000001000 331 W01.31 Spring 2006 Hardware/Software Interface Application software Instruction set architecture includes everything programmers need to know to make a binary program to work System software Instruction Arithmetic and Logic Unit (ALU), registers, etc hardware Instruction set architecture (architecture) 331 W01.32 Spring 2006 The Instruction Set Architecture software instruction set architecture hardware The interface description separating the software and hardware. 331 W01.33 Spring 2006 MIPS R3000 Instruction Set Architecture Instruction Categories Registers Load/Store Computational Jump and Branch Floating Point R0 - R31 - coprocessor PC HI Memory Management Special LO 3 Instruction Formats: all 32 bits wide OP rs rt OP rs rt OP rd sa immediate jump target Q: How many already familiar with MIPS ISA? 331 W01.34 funct Spring 2006 How Do the Pieces Fit Together? Application Operating System Compiler Memory system Firmware Instr. Set Proc. Instruction Set Architecture I/O system Datapath & Control Digital Design Circuit Design Coordination of many levels of abstraction Under a rapidly changing set of forces Design, measurement, and evaluation 331 W01.35 Spring 2006 How Do the Pieces Fit Together? Application Operating System Compiler Memory system Firmware Instr. Set Proc. Instruction Set Architecture I/O system Datapath & Control Digital Design Circuit Design Coordination of many levels of abstraction Under a rapidly changing set of forces Design, measurement, and evaluation 331 W01.36 Spring 2006