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Ubiquitous - MP3 Player Ian Bratt Eric Lee David Lindstone John Pratt Wei-Shin Wang ECEN 4573 Capstone Lab Spring 2003 Globex Proprietary Competition Sensitive Presentation Outline Objectives Current Progress Hardware and Interfaces Software Processor Memory MP3 FPGA Above Baseline: Battery Charger, Compact Flash, USB Analog and FM Transmission PCB Layout Forth/SwiftX Parts List Schedule Responsibilities Globex Proprietary Competition Sensitive Project Objectives Baseline FM MP3 Transmission Above the Baseline MP3 Recording Battery Controller USB Interface Compact Flash Globex Proprietary Competition Sensitive Current Progress Proto-board Downloading Code Interface between Processor/MP3 I2C Parallel Analog Design Most of the components except for FM transmission Schematics Parts done Globex Proprietary Competition Sensitive Top Level Design Globex Proprietary Competition Sensitive MOTOROLA 68332 Globex Proprietary Competition Sensitive MOTOROLA 68332 3.3 V 16.78 MHz 144 pin PQFP Globex Proprietary Competition Sensitive CHIP SELECTS Chip Selects Define: • Block size • 8 or 16 bit bus size • R or W or R/W • AS or DS synch • 0-13 wait states • Internal DSACK Generation • User or Supervisor Globex Proprietary Competition Sensitive Timing Timing diagram for write. 14A) 45 ns 46) 150 ns Globex Proprietary Competition Sensitive Background Debug Module • Serial Interface • Provides external breakpoints • Halts the CPU allowing external code testing and debugging. • Allows bulk data transfers (block moves) Globex Proprietary Competition Sensitive Toshiba TC55W800FT Globex Proprietary Competition Sensitive SRAM 8Mbit 16-bit parallel interface 48 pin TSOP 3.3 V Write Access Time 55ns Read Access Time 30ns Globex Proprietary Competition Sensitive Sharp LH28F800BJE-PTTL90 Globex Proprietary Competition Sensitive FLASH 8Mbit 16-bit parallel interface 48 pin TSOP 3.3 V Write Access Time 90ns Read Access Time 90ns Globex Proprietary Competition Sensitive SRAM and FLASH Globex Proprietary Competition Sensitive SRAM and FLASH In-Circuit Programming of FLASH Download into SRAM through BDM Block Copy Command Call Function through BDM Function copies SRAM data -> FLASH Allows for surface mount, non-volatile EEPROM Globex Proprietary Competition Sensitive MICRONAS 3587F Globex Proprietary Competition Sensitive 3587F Block Diagram Globex Proprietary Competition Sensitive 3587F Timing Globex Proprietary Competition Sensitive 3587F Features Digital Volume Control Pan/Base/Treble Control Dynamic Bass Boost Globex Proprietary Competition Sensitive Xilinx XCV300 Globex Proprietary Competition Sensitive FPGA Xilinx XCV300E 166 I/O pins, 240 pins total 64k block RAM bits Handles glue logic between processor and components Globex Proprietary Competition Sensitive Texas Instruments BQ2018 Globex Proprietary Competition Sensitive Battery Charger Battery Charger TI BQ2018 Easy to use Extensive Documentation Globex Proprietary Competition Sensitive Sandisk Compact Flash Globex Proprietary Competition Sensitive Compact Flash Sandisk Memory Mapped 16 bit device Easy interaction 5 12 byte block transfers Globex Proprietary Competition Sensitive Cyprus CY7C68001 Globex Proprietary Competition Sensitive USB Cypress CY7C68001 Globex Proprietary Competition Sensitive Dave’s FM Transmitter Globex Proprietary Competition Sensitive CD4053BC Analog MUX Used to select audio signal (internal or external) to output and transmit. Globex Proprietary Competition Sensitive OPA3355 Operational Amplifier Used to amplify/buffer signals for output. Unity-Gain stability allows us to use the OPA3355 for several different purposes (amplification, active filtering, etc.). Globex Proprietary Competition Sensitive TPS60400 Voltage Inverter Used to obtain negative voltages for bipolar devices. If ground were used instead of a negative voltage, all audio signals would need to carry a DC offset. Globex Proprietary Competition Sensitive Audio Selection Circuit headphon e R C4 CA PACITOR V CC R2 RESISTOR UOPA3 355? C4 CA PACITOR 1 2 3 4 5 6 7 C4 CA PACITOR ENA ENB ENC V+ +InA -InA OutA OutC -InC +InC V+InB -InB OutB R6 RESISTOR 14 13 12 11 10 9 8 Inter nal R V CC -5V C .01uf CA PACITOR SW1 3 2 UCD4053BCM2 1 SW PUSHBUTTON- SPDT/SM Vdd b a ay ax A B C OPA 3355 headphon e L 16 15 14 13 12 11 10 09 R4 by bx cy c cx Inh Vee Vss C4 CA PACITOR R1 RESISTOR CD4053BCM 1 2 3 4 5 6 7 8 RESISTOR V CC Line in R Inter nal L -5V Line in L To FM Modulator Mode Select Globex Proprietary Competition Sensitive PLL Modulator PHASE COMPARATOR Loop Filter VCO + Audio Globex Proprietary Competition Sensitive PCB Layout OrCAD Capture OrCAD Layout Symbolic Schematics Parts Top-level Design Convert Symbolic (netlist) to Physical PCB Layout Part Placement Conversion to netlist Routing Debugging!!! Footprints Manual Routing Must be perfect Globex Proprietary Competition Sensitive PCB Layout Contingencies OrCAD Layout Lite Version P-CAD Z group Other software??? Worst Case Scenario…Wire Wrap Globex Proprietary Competition Sensitive Forth Virtual Machine Harvard Architecture 3 Stacks Globex Proprietary Competition Sensitive SwiftX Code Layers OS, Drivers, Libraries Globex Proprietary Competition Sensitive SwiftX Multitasking Non-preemptive Round Robin Globex Proprietary Competition Sensitive Parts List Processor Motorola MC68332 MP3 Micronas MAS3587F SRAM Toshiba TC55W800FT FLASH Flash LHF80J01 FPGA Xilinx XCV300 Analog Parts Various Battery Charger TI BQ2018 USB Cypress CY7C68001 Compact Flash Globex Proprietary Competition Sensitive Sandisk CF2 Schedule ID 1 Task Name Project Design 2 Component Selections 10 days Tue 1/21/03 Mon 2/3/03 3 Design Schematics 14 days Wed 1/22/03 Mon 2/10/03 4 PDR Presentation 5 days Thu 1/23/03 Wed 1/29/03 5 Preliminary Design Review 1 day Thu 1/30/03 Thu 1/30/03 6 Build Prototype Board 5 days Wed 2/5/03 Tue 2/11/03 7 Load and run code in Prototype 3 days Wed 2/12/03 Fri 2/14/03 8 Layout PCB 14 days Fri 2/7/03 Tue 2/25/03 9 Thu 3/6/03 Duration 14 days Start Thu 1/16/03 Finish W Tue 2/4/03 Build and Populate PCB 7 days Wed 2/26/03 10 Bring PCB online 7 days Mon 1/27/03 Tue 2/4/03 11 CDR Presentation 6 days Wed 2/19/03 Wed 2/26/03 12 Critical Design Review 1 day Thu 2/27/03 Thu 2/27/03 13 Code Development 54 days Sat 2/15/03 Wed 4/30/03 14 FPGA Design 50 days Wed 2/12/03 Mon 4/21/03 15 Design and Build Analog Amplif ier 14 days Wed 2/5/03 Fri 2/21/03 16 Desing and build FM transmitter 14 days Mon 2/24/03 Thu 3/13/03 17 Add Extras 14 days Thu 4/10/03 Tue 4/29/03 T F S Jan 19, '03 S M T W T F S Jan 26, '03 S M T W T Globex Proprietary Competition Sensitive F S Feb 2, '03 S M T W T F S Feb 9, '03 S M T W T F S Feb 16, '03 S M T W T F S Feb 23 S M Revised Schedule Currently behind schedule (schematics, FPGA programming) Milestone I PCB populated Milestone II MP3 playing from internal flash Globex Proprietary Competition Sensitive Resource Distribution Ian Processor (timing, chip select, etc.) Eric PCB Layout, Battery Charger Dave FM Transmission and Analog Aspects John Proto-board, USB, Compact Flash Wei-shin FPGA, Analog Everyone Software and debugging Globex Proprietary Competition Sensitive Conclusion Working proto-board is a good sign Software development shows promise PCB Schematics #1 priority right now Globex Proprietary Competition Sensitive
