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Exam 1 Review Chapters 1, 2, 9 1 e12 Charge, q q2 r12 Recall Coulomb’s Law q1 Force F1 on charge q2 due to charge q1 is given by q1q2 F1 e12 2 4 0 r12 1 1 4 0 107 c 2 8.99 109 Charge on an electron (proton) is negative (positive) and equal to 1.602 x 10-19 C e12 unit vector pointing from q1 to q2 r12 distance between charge q1and q2 Unit: Newton meter2 / coulomb2 volt meter / coulomb Note: Positive force is repulsive, negative force is attractive 2 Electric Current, i Current (in amperes) (A) is the time rate of change of charge q dq i dt 1 A = 1 C/s t q(t ) idt q(t0 ) t0 t Charge flowing past a point in the interval [t0, t] is qT (t ) t idt 0 Convention: Direction of current flow is that of positive charges, opposite to the direction of electron flow 3 Voltage The energy in joules (w) required to move a charge (q) of one coulomb through an element is 1 volt (V). dw v dq 1 volt = 1 joule/coulomb = 1 newton meter/coulomb 4 Power and Energy Power (p), in watts (W), is the time rate of expending or absorbing energy (w) in joules dw p dt dw dw dq p vi dt dq dt 5 Power and Energy Change in energy from time t1 to time t2 t2 t2 t1 t1 w pdt vidt Passive sign convention: i (t ) + p vi If p > 0 power is absorbed by the element v (t ) - If p < 0 power is supplied by the element 6 v R i + v i R v iR v i1 v i1R (i i1 ) - R + - i v R - + Ohm's Law Units of resistance, R, is Ohms (W) R = 0: short circuit R : open circuit 7 + 1 G R G v - i - + Conductance, G Unit of G is siemens (S), 1 S = 1 A/V i v G i Gv i G v 8 Power A resistor always dissipates energy; it transforms electrical energy, and dissipates it in the form of heat. Rate of energy dissipation is the instantaneous power 2 v (t ) 2 p(t ) v(t )i(t ) Ri (t ) 0 R 2 i (t ) 2 p(t ) v(t )i(t ) Gv (t ) 0 G 9 Elements in Series Two or more elements are connected in series if they carry the same current and are connected sequentially. I R1 V0 R2 10 Elements in Parallel Two or more elements are connected in parallel if they are connected to the same two nodes & consequently have the same voltage across them. I I1 V R1 I2 R2 11 Kirchoff’s Current Law (KCL) The algebraic sum of the currents entering a node (or a closed boundary) is zero. N i n 1 n 0 where N = the number of branches connected to the node and in = the nth current entering (leaving) the node. 12 Sign convention: Currents entering the node are positive, currents leaving the node are negative. N i n 1 n 0 i2 i1 i5 i3 i4 i1 i2 i3 i4 i5 0 13 Kirchoff’s Current Law (KCL) The algebraic sum of the currents entering (or leaving) a node is zero. Entering: i1 i2 i3 i4 i5 0 Leaving: i1 i2 i3 i4 i5 0 i2 i1 i5 i3 i4 The sum of the currents entering a node is equal to the sum of the currents leaving a node. i1 i2 i4 i3 i5 14 Kirchoff’s Voltage Law (KVL) The algebraic sum of the voltages around any loop is zero. M v m 1 m 0 where M = the number of voltages in the loop and vm = the mth voltage in the loop. 15 Sign convention: The sign of each voltage is the polarity of the terminal first encountered in traveling around the loop. I + R1 V1 + A V0 R2 The direction of travel is arbitrary. Clockwise: V0 V1 V2 0 V2 - Counter-clockwise: V2 V1 V0 0 V0 V1 V2 16 Series Resistors I + R1 V1 I R1 R2 + A V0 V0 V1 V2 IR1 IR2 R2 IRs V2 Rs R1 R2 - I V Rs 17 Voltage Divider V0 V0 I Rs R1 R2 I R1 V1 R2 V2 A V0 V0 V2 IR2 R2 R1 R2 R2 V2 V0 R1 R2 R1 Also V1 V0 R1 R2 18 Parallel Resistors I V V I I1 I 2 R1 R2 I1 R1 V R2 1 1 1 Rp R1 R2 I V I2 Rp 1 1 V R1 R2 V Rp R1 R2 Rp R1 R2 19 Current Division i + i1 i(t) R1 i2 R2 v(t) - R2 v(t ) i1 (t ) i (t ) R1 R1 R2 R1 v(t ) i2 (t ) i (t ) R2 R1 R2 R1 R2 v(t ) R p i (t ) i (t ) R1 R2 Current divides in inverse proportion to the resistances 20 Current Division N resistors in parallel 1 1 1 1 Rp R1 R2 Rn Current in jth branch is v(t ) R pi (t ) v(t ) R p i j (t ) i (t ) Rj Rj 21 Source Exchange ia ' ia + Rs DC vab vs - + vs Rs Rs v ab - We can always replace a voltage source in series with a resistor by a current source in parallel with the same resistor and vice-versa. Doing this, however, makes it impossible to directly find the 22 original source current. Source Exchange Proof ia ' ia + Rs DC RL vL vs + vs Rs Rs RL vL - - RL vL vs Rs RL Rs vs ia ' ia Rs RL Rs vs ia Rs RL RL vL ia ' RL vs Rs RL Voltage across and current through any load are the same23 3-bit R2-R Ladder Network KCL 2 B2 V2 IB2 IV2 1 2 V1 B1 IB1 IV1 1 2 B0 V0 IB0 2 IV0 IV 0 I B 0 IV 1 V0 B0 V0 V1 V0 2 2 1 V0 B0 V0 2V1 2V0 1 2V0 B0 V1 2 24 KCL V1 V0 B1 V1 V2 V1 1 2 1 2 B2 V2 IB2 IV2 1 2V1 2V0 B1 V1 2V2 2V1 2 V1 B1 IB1 IV1 1 2 B0 2V0 V0 IB0 2 IV 1 I B1 IV 2 IV0 1 B0 V1 2 1 2V1 B0 V1 B1 V1 2V2 2V1 2 1 1 2V1 B0 B1 V2 25 4 2 KCL V2 V1 B2 V2 1 2 2 B2 V2 IB2 IV2 1 2 V1 B1 IB1 IV1 1 2 B0 V0 IB0 2 IV 2 I B 2 IV0 2V2 2V1 B2 V2 1 1 2V1 B0 B1 V2 4 2 1 1 2V2 B0 B1 V2 B2 V2 4 2 1 1 1 V2 B0 B1 B2 8 4 2 26 1 1 1 V2 B0 B1 B2 8 4 2 2 B2 V2 IB2 IV2 1 2 V1 B1 IB1 IV1 1 2 B0 V0 IB0 2 IV0 Table 11.1 Output of R2-R ladder network in Fig. 11.6 B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 V2 0 1/8 1/4 3/8 1/2 5/8 3/4 7/8 27 Writing the Nodal Equations by Inspection v1 2A i1 v3 v2 R2 R1 i3 G1 G2 G2 0 R3 R4 is G2 G2 G3 G4 G3 i5 R5 0 v1 2 G3 v2 0 G3 G5 v3 is •The matrix G is symmetric, gkj = gjk and all of the off-diagonal terms are negative or zero. The gkk terms are the sum of all conductances connected to node k. The gkj terms are the negative sum of the conductances connected to BOTH node k and node j. The ik (the kth component of the vector i) = the algebraic sum of the independent currents connected to node k, with currents entering the 28 node taken as positive. Writing the Mesh Equations by Inspection R2 R1 + DC Vs2 i1 + R3 - v3 + + v2 - v1 - v5 - + v7 - R7 + v6 - R5 i3 R1 R5 R7 R7 R5 0 i2 R6 DC Vs1 i4 + v4 - R4 R7 R2 R6 R7 R5 0 0 R6 R3 R5 0 i1 Vs2 0 i2 i3 Vs1 0 R4 R6 R8 i4 Vs 1 0 R6 - v + 8 R8 •The matrix R is symmetric, rkj = rjk and all of the off-diagonal terms are negative or zero. The rkk terms are the sum of all resistances in mesh k. The rkj terms are the negative sum of the resistances common to BOTH mesh k and mesh j. The vk (the kth component of the vector v) = the algebraic sum of the independent voltages in mesh k, with voltage rises taken as positive. 29 Turning sources off Current source: a i is is We replace it by a current source where is 0 b An open-circuit Voltage source: + DC vs v vs - We replace it by a voltage source where vs 0 i An short-circuit 30 Thevenin's Theorem Thevenin’s theorem states that the two circuits given below are equivalent as seen from the load RL that is the same in both cases. i i a a RTh Linear Circuit RL DC RL VTh b b Rin Rin VTh = Thevenin’s voltage = Vab with RL disconnected (= ) = the open-circuit voltage = VOC 31 Thevenin's Theorem i i a a RTh Linear Circuit RL DC RL VTh b b Rin Rin RTh = Thevenin’s resistance = the input resistance with all independent sources turned off (voltage sources replaced by short circuits and current sources replaced by open circuits). This is the resistance seen at the terminals ab when all independent sources are turned off. 32 Example W DC 10V W VTh 5 RTh 2W iSC 2.5 a vOC W RTh 2W 2 10V 5V VTh 22 DC a VTh 5V b W DC 10V W a iSC W b 10 2 10 2.5A 23 4 2 3 W b W W a RTh 1 2 2 2W 22 33 b Maximum Power Transfer In all practical cases, energy sources have non-zero internal resistance. Thus, there are losses inherent in any real source. Also, in most cases the aim of an energy source is to provide power to a load. Given a circuit with a known internal resistance, what is the resistance of the load that will result in the maximum power being delivered to the load? Consider the source to be modeled by its Thevenin equivalent. i a RTh DC RL VTh b 34 i a RTh DC RL VTh b The power delivered to the load (absorbed by RL) is p i RL VTh 2 RTh RL 2 RL This power is maximum when p RL 0 p 2 3 2 VTh RTh RL 2 RL RTh RL 0 RL 35 p 2 3 2 VTh RTh RL 2 RL RTh RL 0 RL RTh RL 2RL RL RTh Thus, maximum power transfer takes place when the resistance of the load equals the Thevenin resistance RTh. Note also that pmax VTh RTh RL 2 RL RL RTh pmax VTh 2RTh RTh VTh 2 4 RTh 2 Thus, at best, one-half of the power is dissipated in the internal resistance and one-half in the load. 36 Ideal Op Amp i i 1) v v VDD VSS v0 VDD + vo - VSS v0 Av v v The open-loop gain, Av, is very large, approaching infinity. 2) i i 0 The current into the inputs are zero. 37 Ideal Op Amp with Negative Feedback v + v - vo Network Golden Rules of Op Amps: 1. The output attempts to do whatever is necessary to make the voltage difference between the inputs zero. 2. The inputs draw no current. 38 Non-inverting Amplifier v vi v R1 + vo Closed-loop voltage gain AF - vo vi R2 vi v v R1 vo R1 R2 vo R2 AF 1 vi R1 39 Inverting Amplifier R2 Current into op amp is zero v v 0 v 0 vi ii i R1 R1 0 v0 v0 ii R2 R2 vi ii ii R1 v v - vo + vi v0 R1 R2 AF vo R 2 vi R1 40