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Design and Implementation of VLSI Systems (EN1600) lecture02 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley – Rabaey Pearson] Impact of doping on silicon resistivity silicon 4.9951022 atoms in cm3 Resistivity 3.2 105 Ωcm dope with phosphorous or arsenic n-type 1 atom in billion 88.6 Ωcm 1 atom in million 0.114 Ωcm 1 atom in thousand 0.00174 Ωcm dope with boron p-type 1 atom in billion 266.14 Ωcm 1 atom in million 0.344 Ωcm 1 atom in thousand 0.00233 Ωcm Electrons are more mobile/faster than holes What happens if we sandwich p & n types? A Al p n B One-dimensional representation In equilibrium, the drift and diffusion components of current are balanced; therefore the net current flowing across the junction is zero. PN-junction regions of operation In reverse bias, the width of the depletion region increases. The diode acts as voltage-controlled capacitor. A forward bias decreases the potential drop across the junction. As a result, the magnitude of the electric field decreases and the width of the depletion region narrows. nMOS and pMOS transistors Each transistor consists of a stack of a conducting gate, an insulating layer of silicon dioxide and a semiconductor substrate (body or bulk) nMOS transistor pMOS transistor Source Source Gate Drain Gate Drain Polysilicon Polysilicon SiO2 SiO2 polysilicon gate n+ n+ p bulk Si W p+ p+ tox n+ L n+ SiO2 gate oxide (good insulator, ox = 3.9) n bulk Si p-type body Body is typically grounded Body is typically at supply voltage nMOS transistor Source Gate Drain Polysilicon SiO2 n+ n+ p g=0: When the gate is at a low voltage (VGS < VTN): p-type body is at low voltage source and drain-junctions diodes are OFF transistor is OFF, no current flows g=1: When the gate is at a high voltage (VGS ≥ VTN): negative charge attracted to body inverts a channel under gate to n-type transistor ON, current flows, transistor can be viewed as a resistor bulk Si nMOS pass ‘0’ more strongly than ‘1’ Source Gate Drain Polysilicon SiO2 n+ n+ p • Why does ‘1’ pass degraded? bulk Si pMOS transistor Source Gate Drain Polysilicon SiO2 p+ p+ n g=0: When the gate is at a low voltage (VGS < VTP): positive charge attracted to body inverts a channel under gate to p-type transistor ON, current flows g=1: When the gate is at a high voltage (VGS ≥ VTP): negative charge attracted to body source and drain junctions are OFF transistor OFF, no current flows bulk Si pMOS pass ‘1’ more strongly than ‘0’ Source Gate Drain Polysilicon SiO2 p+ p+ n • Why does ‘0’ pass degraded? bulk Si An nMOS and pMOS make up an inverter pMOS + nMOS = CMOS More CMOS gates B A B F = AB 0 What is this gate function? What’s wrong about this design? 3-input NANDs What are the advantages of CMOS circuit style? Series-Parallel Combinations What are the transistor schematics of the NOR gate? AOI Transmission gate