Download 27FCS147LECTURE3 - Department of Computer Science

Lecture 3. Error Detection
and Correction,
Logic
2x
Gates
Prof. Sin-Min Lee
Department of Computer
Science
Chapter Goals
• Error Detection and Correction
• Identify the basic gates and describe the
behavior of each
• Combine basic gates into circuits
• Describe the behavior of a gate or circuit using
Boolean expressions, truth tables, and logic
diagrams
4–2
Error Detection
EDC= Error Detection and Correction bits (redundancy)
D = Data protected by error checking, may include header fields
• Error detection not 100% reliable!
• protocol may miss some errors, but rarely
• larger EDC field yields better detection and correction
4–3
Parity Checking
Single Bit Parity:
Detect single bit errors
Two Dimensional Bit Parity:
Detect and correct single bit errors
0
0
4–4
Internet checksum
Goal: detect “errors” (e.g., flipped bits) in
transmitted segment (note: used at transport
layer only)
Receiver:
Sender:
• treat segment contents
as sequence of 16-bit
integers
• checksum: addition (1’s
complement sum) of
segment contents
• sender puts checksum
value into UDP
• compute checksum of received
segment
• check if computed checksum
equals checksum field value:
– NO - error detected
– YES - no error detected.
But maybe errors
nonetheless? More later ….
4–5
Checksumming: Cyclic Redundancy Check
• view data bits, D, as a binary number
• choose r+1 bit pattern (generator), G
• goal: choose r CRC bits, R, such that
– <D,R> exactly divisible by G (modulo 2)
– receiver knows G, divides <D,R> by G. If non-zero
remainder: error detected!
– can detect all burst errors less than r+1 bits
• widely used in practice (ATM, HDCL)
4–6
CRC Example
Want:
D.2r XOR R = nG
equivalently:
D.2r = nG XOR R
equivalently:
if we divide D.2r
by G, want
D.2r
remainder
R
R = remainder[
]
G
4–7
What is a gate?
• Combination of transistors that perform
•
binary logic
• So called because one logic state enables
•
or “gates” another logic state
• For each gate, the symbol, the truth table,
•
and the formula are shown
4–8
4–9
4–10
4–11
4–12
4–13
Computers
• There are three different, but equally
powerful, notational methods
for describing the behavior of gates
and circuits
– Boolean expressions
– logic diagrams
– truth tables
4–14
Boolean algebra
• Boolean algebra: expressions in this
algebraic notation are an elegant and
powerful way to demonstrate the activity of
electrical circuits
4–15
Truth Table
• Logic diagram: a graphical
representation of a circuit
– Each type of gate is represented by a specific
graphical symbol
• Truth table: defines the function of a gate
by listing all possible input combinations
that the gate could encounter, and the
corresponding output
4–16
Gates
• Let’s examine the processing of the
following
six types of gates
– NOT
– AND
– OR
– XOR
– NAND
– NOR
4–17
NOT Gate
• A NOT gate accepts one input value
and produces one output value
Figure 4.1 Various representations of a NOT gate
4–18
NOT Gate
• By definition, if the input value for a NOT
gate is 0, the output value is 1, and if the
input value is 1, the output is 0
• A NOT gate is sometimes referred to as an
inverter because it inverts the input value
4–19
AND Gate
• An AND gate accepts two input signals
• If the two input values for an AND gate are
both 1, the output is 1; otherwise, the
output is 0
Figure 4.2 Various representations of an AND gate
4–20
OR Gate
• If the two input values are both 0, the
output value is 0; otherwise, the output is 1
Figure 4.3 Various representations of a OR gate
4–21
XOR Gate
• XOR, or exclusive OR, gate
– An XOR gate produces 0 if its two inputs are
the same, and a 1 otherwise
– Note the difference between the XOR gate
and the OR gate; they differ only in one
input situation
– When both input signals are 1, the OR gate
produces a 1 and the XOR produces a 0
4–22
XOR Gate
Figure 4.4 Various representations of an XOR gate
4–23
NAND and NOR Gates
• The NAND and NOR gates are essentially the
opposite of the AND and OR gates, respectively
Figure 4.5 Various representations
of a NAND gate
Figure 4.6 Various representations
of a NOR gate
4–25
4–26
4–27
Gates with More Inputs
• Gates can be designed to accept three or more
input values
• A three-input AND gate, for example, produces
an output of 1 only if all input values are 1
Figure 4.7 Various representations of a three-input AND gate
4–28
3-Input And gate
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
Y
0
0
0
0
0
0
0
1
Y=A. B. C
4–29
Constructing Gates
• A transistor is a device that acts, depending on
the voltage level of an input signal, either as a
wire that conducts electricity or as a resistor that
blocks the flow of electricity
– A transistor has no moving parts, yet acts like
a switch
– It is made of a semiconductor material, which is
neither a particularly good conductor of electricity,
such as copper, nor a particularly good insulator, such
as rubber
4–30
Circuits
• Two general categories
– In a combinational circuit, the input values explicitly
determine the output
– In a sequential circuit, the output is a function of the
input values as well as the existing state of the circuit
• As with gates, we can describe the operations
of entire circuits using three notations
– Boolean expressions
– logic diagrams
– truth tables
4–31
Combinational Circuits
• Gates are combined into circuits by using the
output of one gate as the input for another
AND
OR
AND
Page 99
4–32
jasonm:
Redo to get
white space
around table
(p100)
Combinational Circuits
Page 100
• Because there are three inputs to this circuit, eight rows
are required to describe all possible input combinations
• This same circuit using Boolean algebra:
(AB + AC)
4–33
jasonm:
Redo table to
get white
space (p101)
Now let’s go the other way; let’s take a
Boolean expression and draw
• Consider the following Boolean expression: A(B + C)
Page 100
Page 101
• Now compare the final result column in this truth table to
the truth table for the previous example
• They are identical
4–34
Simple design problem
• A calculation has been done and its results
•
are stored in a 3-bit number
• Check that the result is negative by anding
•
the result with the binary mask 100
• Hint: a “mask” is a value that is anded with
•
a value and leaves only the important bit
4–35
Using And gates to mask
4–36
Shorthand way to draw this
• If the values shown had 32 bits, you would
•
•
have a lot of wires and and gates on
the
drawing.
• Here is a shorthand way to draw this:
4–37
Using And gates to mask
Masked value
4–38
& and && in Java, C, C++
• & means AND, bit-by-bit
• What we just did was the equivalent of
•
Y=A&B
• && means AND, on a word, boolean basis
• 101 && 010 is true
• 101 & 010 is zero
4–39
Now let’s go the other way; let’s take a
Boolean expression and draw
• We have therefore just demonstrated circuit
equivalence
– That is, both circuits produce the exact same output
for each input value combination
• Boolean algebra allows us to apply provable
mathematical principles to help us design
logical circuits
4–40
jasonm:
Redo table
(p101)
Properties of Boolean Algebra
Page 101
4–41
Adders
• At the digital logic level, addition is
performed in binary
• Addition operations are carried out
by special circuits called, appropriately,
adders
4–42
jasonm:
Redo table
(p103)
• The result of adding two
binary digits could
produce a carry value
Adders
(XOR) (AND)
• Recall that 1 + 1 = 10
in base two
• A circuit that computes
the sum of two bits
and produces the
correct carry bit is
called a half adder
• Notice the Sum & Carry
are NEVER both 1.
Page 103
4–43
Adders
• Circuit diagram
representing
a half adder
• Two Boolean
expressions:
sum = A  B
carry = AB
Page 103
4–44
Adders
• A circuit called a full adder takes the
carry-in value into account
Figure 4.10 A full adder
4–45
Adding Many Bits
• To add 2 8-bit values, we can duplicate a
full-adder circuit 8 times. The carry-out
from one place value is used as the carry
in for the next place value. The value of
the carry-in for the rightmost position is
assumed to be zero, and the carry-out of
the leftmost bit position is discarded
(potentially creating an overflow error).
4–46
How to use
NOR gate to build a NOT gate?
Truth Table
A B C Q
B
A
Q
C
0 0 0 1
1 1 1 0
Hint!
Link inputs B & C together (to a same source).
When A = 0, B = C = A = 0
When A = 1, B = C = A = 1
4–47
How to use
NOR gates to build an OR gate?
Truth Table
NOT
NOR
A
B
C
D
Q
E
A
0
0
1
1
B
0
1
0
1
C
1
0
0
0
D
1
0
0
0
E
1
0
0
0
Q
0
1
1
1
Hint 1 : Use 2 NOR gates
Hint 2 : From a NOR gate, build a NOT gate
Hint 3 : Put this “NOT” gate after a NOR gate
4–48
How to use
A
NOR gates to build an AND gate?
Truth Table
C
Q
B
D
A
0
0
1
1
B
0
1
0
1
Hint 1 : Use 3 NOR gates
Hint 2 : From 2 NOR gates, build 2 NOT gates
Hint 3 : Each “NOT” gate
is an input to the 3rd NOR gate
C
1
1
0
0
D
1
0
1
0
Q
0
0
0
1
4–49
How to use
A
B
NOR gates to build a NAND gate?
C
E
D
Hint 1 : Use 4 NOR gates
Hint 2 : Use 3 NOR gates
to build a NAND gate
Hint 3 :
(previous lesson)
Use the 4th NOR
Truth Table
Q
A
0
0
1
1
B
0
1
0
1
C
1
1
0
0
D
1
0
1
0
E
0
0
0
1
Q
1
1
1
0
gate to build a NOT gate
Hint 4 : Insert “NOT” gate after “NAND” gate
Hint 5 : NOT-NAND = AND
4–50
How to use
NAND gates to build a NOT gate?
Truth Table
B
Q
A
C
A
B
C
Q
0
0
0
1
1
1
1
0
Hint!
Link inputs B & C together (to a same source).
When A = 0, B = C = A = 0
When A = 1, B = C = A = 1
4–51
How to use
NAND gates to build an AND gate?
NOT
NAND
A
B
Truth Table
C
Q
A
B
C
Q
0
0
1
0
0
1
1
0
1
0
1
0
1
1
0
1
Hint 1 : Use 2 NAND gates
Hint 2 : From a NAND gate, build a NOT gate
Hint 3 : Put this “NOT” gate after a NAND gate
Hint 4 : NOT-NAND = AND
4–52
How to use
A
B
NAND gates to build an OR gate?
Truth Table
C
Q
D
A
B
C
D
Q
0
0
1
1
0
0
1
1
0
1
1
0
0
1
1
1
1
0
0
1
Hint 1 : Use 3 NAND gates
Hint 2 : Use 2 NAND gates to build 2 NOT gates
Hint 3 : Put the 3rd NAND gate
after the 2 “NOT” gates
4–53
How to use
A
B
C
D
NAND gates to build a NOR gate?
Truth Table
E
Q
A
B
C
D
E
Q
0
0
1
1
0
1
0
1
1
0
1
0
1
0
0
1
1
0
1
1
0
0
1
0
Hint 1 : Use 4 NAND gates
Hint 2 : Use 3 NAND gates to build an OR gate
Hint 3 : Use a NOR gate to build a NOT gate
Hint 4 : Put the “NOT” gate after “OR” gate
4–54
4–55
4–56
NAND and
NOR
as Universal Logic Gates
• Any logic circuit
can be built using
only NAND gates,
or only NOR
gates. They are
the only logic
gate needed.
• Here are the
NAND
equivalents:
4–57
NAND and NOR as Universal Logic Gates
(cont)
• Here are the
NOR
equivalents:
• NAND and
NOR can be
used to reduce
the number of
required gates
in a circuit.
4–58
Chapter Two
Appendix A
A.2,A.3,A.4, A.5
Practice Assignment
P.498 A.1,A.2,A.3,A.4,A.5,A.6
4–59