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MonolithIC 3D ICs RCAT Flow MonolithIC 3D Inc. , Patents Pending MonolithIC 3D Inc. , Patents Pending 1 Monolithic 3D ICs Using SmartCut technology - the ion cutting process that Soitec uses to make SOI wafers for AMD and IBM (million of wafers had utilized the process over the last 20 years) - to stack up consecutive layers of active silicon (bond first and then cut). Soitec’s Smart Cut Patented* Flow (access the link for video). *Soitec’s fundamental patent US 5,374,564 expired Sep. 15, 2012 MonolithIC 3D Inc. , Patents Pending 2 Monolithic 3D ICs Ion cutting: the key idea is that if you implant a thin layer of H+ ions into a single crystal of silicon, the ions will weaken the bonds between the neighboring silicon atoms, creating a fracture plane (Figure 3). Judicious force will then precisely break the wafer at the plane of the H+ implant, allowing you to in effect peel off very thin layer. This technique is currently being used to produce the most advanced transistors (Fully Depleted SOI, UTBB transistors – Ultra Thin Body and BOX), forming monocrystalline silicon layers that are less than 10nm thick. MonolithIC 3D Inc. , Patents Pending 3 Figure 3 Using ion-cutting to place a thin layer of monocrystalline silicon above a processed (transistors and metallization) base wafer Cleave using <400oC Hydrogen implant Oxide anneal or sideways Flip top layer and of top layer mechanical force. CMP. bond to bottom layer p- Si Top layer Oxide p- Si Oxide H p- Si H Oxide Oxide p- Si Oxide Oxide Bottom layer Similar process (bulk-to-bulk) used for manufacturing all SOI wafers today MonolithIC 3D Inc. , Patents Pending 4 MonolithIC 3D – The RCAT path The Recessed Channel Array Transistor (RCAT) fits very nicely into the hot-cold process flow partition RCAT is the transistor used in commercial DRAM as its 3D channel overcomes the short channel effect Used in DRAM production @ 90nm, 60nm, 50nm nodes Higher capacitance, but less leakage, same drive current The following slides present the flow to process an RCAT without exceeding the 400ºC temperature limit MonolithIC 3D Inc. , Patents Pending 5 RCAT – a monolithic process flow Using a new wafer, construct dopant regions in top ~100nm and activate at ~1000º C Oxide ~100nm Wafer, ~700µm PN+ P- MonolithIC 3D Inc. , Patents Pending 6 Implant Hydrogen for Ion-Cut H+ Oxide P~100nm N+ Wafer, ~700µm P- MonolithIC 3D Inc. Patents Pending 7 Hydrogen cleave plane for Ion-Cut formed in donor wafer Oxide P~100nm N+ Wafer, ~700µm H+ ~10nm P- MonolithIC 3D Inc. Patents Pending 8 Flip over and bond the donor wafer to the base (acceptor) wafer Donor Wafer, ~700µm N+ POxide H+ ~100nm 1µ Top Portion of Base Wafer Base Wafer, ~700µm MonolithIC 3D Inc. Patents Pending 9 Perform Ion-Cut Cleave ~100nm N+ POxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 10 Complete Ion-Cut ~100nm N+ POxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 11 Etch Isolation regions as the first step to define RCAT transistors ~100nm N+ POxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 12 Fill isolation regions (STI-Shallow Trench Isolation) with Oxide, and CMP ~100nm N+ P- Oxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 13 Etch RCAT Gate Regions Gate region ~100nm N+ P- Oxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 14 Form Gate Oxide ~100nm N+ P- Oxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 15 Form Gate Electrode ~100nm N+ POxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 16 Add Dielectric and CMP ~100nm N+ POxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 17 Etch Thru-Layer-Via and RCAT Transistor Contacts ~100nm N+ POxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 18 Fill in Copper ~100nm N+ P- Oxide 1µ Top Portion of Base Wafer MonolithIC 3D Inc. Patents Pending Base Wafer ~700µm 19 Add more layers monolithically ~100nm ~100nm N+ P- Oxide N+ P- Oxide 1µ Top Portion of Base (acceptor) Wafer Base Wafer ~700µm MonolithIC 3D Inc. Patents Pending 20