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A 24-GHz High-Isolation CMOS T/R Switch with Leakage Cancellation Technology Hong-Syuan Shen, Chen-Yu Ou, Hong-Ru Lin, Tzuen-Hsi Huang and Huey-Ru Chuang Institute of Computer and Communication Engineering, Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan, R.O.C [email protected] Abstract — This paper presents a 24-GHz single-poledouble-throw (SPDT) CMOS switch implemented in the 0.18-μm CMOS process (TSMC 1P6M). The design focuses on the technology to increase isolation between transmit (Tx) and receive (Rx) ports with leakage cancellation. In addition, in order to minimize the insertion loss of the switch, body-floating technology is added every transistor. The switch uses high (1.8 V) and low (0 V) digital control voltages for T/R mode selection. The measurements show that the isolation of switch is 34.3 dB, higher than the conventional series-shunt construction. The insertion loss of the Rx and Tx modes are 7.3 and 7.4 dB, respectively. The input 1-dB compression point and return loss are 18 dBm and 12.5 dB at 24 GHz, respectively. Index Terms —body-floating, CMOS, isolation, leakage cancellation, phase shifter, T/R switch. [email protected] VC2 RX M1 VC1 II. 24-GHz T/R Switch Design The schematic of the 24-GHz T/R switch with leakage cancellation technology is shown in Fig. 1. It is difficult to attain good isolation in traditional series-shunt construction, as illustrated in Fig.2, as isolation will be reduced isolation when the Tx signal leaks to the Rx port through the Cds of M2. In addition, isolation could be also worse when operating at millimeter-wave frequencies. However, leakage cancellation technology can avoid these problems, and it consists of two MOSFETs, phase shifters, and an absorption resistor [3]. TX M2 VC2 body-floating M3 M4 Rs 90° phase shifter Fig.1 Schematic of 24-GHz T/R switch with leakage cancellation technology I. Introduction The 24-GHz frequency band has been allocated for unlicensed industrial applications by the Federal Communications Commission (FCC), and recently, some research on 24-GHz RFICs has been published [1]-[2]. Most of the CMOS T/R switches were reported below 20 GHz [3]-[6]. At millimeter-wave frequencies, the design of T/R switches is more challenging due to signal losses of the substrate and parasitic effects of the MOS transistor. The 24-GHz T/R switch presented in this paper improves isolation with leakage cancellation technology. The isolation can be improved by the leakage propagating through two similar paths with 180° phase difference [3]. Moreover, insertion loss is reduced by adding a large resistor at the body of the MOSFET, using so called body-floating technology [4]. This paper consists of four sections, beginning with this introduction. The design of the switch is covered in Section II and the simulation and measurement results are presented in Section III. Finally, this paper is summarized in Section IV. VC1 Antenna Antenna leakage signal transmit signal Cds,M2 Tx ON M1 M2 Rx OFF M3 M4 OFF ON high voltage low voltage Fig. 2 Schematic of the CMOS conventional series-shunt T/R switch Insertion loss is also critical characteristic for T/R switch design. Recently, body-floating technology has come to be widely used to reduce the insertion loss in switch design by simply connecting a large resistor to ground at body of device [4]. A. Phase shifter design The phase shifter can be implemented in C-L-C or L-C-L T-type networks, as illustrated in Fig. 3(a). Fig. 3(b) shows the impedance and admittance equivalent circuits of the two types. The required values of the inductance and capacitance can be derived by a given phase delay and characteristic impedance Z0. Both C-L-C and L-C-L phase shifters could be analyzed by the ABCD matrix to get the value of inductance and capacitance. The derivational results of the ABCD matrix is given by [7] Z L - 0 tan( ) (1) 2 1 (2) Csin( ) Z0 L L C 200 C 30 C L ZL ZL YC YC YC ZL 20 100 10 50 0 0 -50 -10 -100 phase_C-L-C phase_L-C-L gain_C-L-C gain_L-C-L -150 Gain (dB) (a) Phase (degree) 150 -20 -200 -30 0 10 20 30 40 50 60 Fequency (GHz) (b) (c) Fig. 3 (a) Schematics of the C-L-C and L-C-L type phase shifter (b) impedance and admittance equivalent circuits (c) simulation results: phase and gain in C-L-C and L-C-L type phase shift networks at 24 GHz (L=0.33 nH, C= 0.13 pH) where Z0 is characteristic impedance, is the operating frequency and is the phase shifter angle. According to (1) and (2), the required inductance and capacitance of the 90° phase shifter at 24 GHz are 0.33 nH and 0.13 pF, respectively. It can also be verified that the insertion loss and phase shifter are 0 dB and 90° at 24 GHz in both C-L-C and L-C-L T-type networks, as shown in Fig. 3 (c). Therefore, 180° phase shifter can be achieved by two series T-type network phase shifters under lossless conditions. -1 -1.5 S21 (dB) Rx III. MEASUREMENT RESULTS This switch is fabricated with the 0.18-μm 1P6M RF CMOS process. Fig. 5 shows the microphotograph of the 24-GHz T/R switch, and the die size is 1.065 × 0.863 mm2. The switch uses high (1.8 V) and low (0 V) digital control voltages for T/R mode selection. This switch is analyzed using the electromagnetic simulation tool ADS Momentum, and the simulated and measured S-parameters are shown in Fig.6 (a)-(d). It is obvious that the output return loss is more than 10 dB at 24 GHz. Both the simulated insertion loss in the Rx and Tx modes are 2.7 dB. The simulated result of the isolation between Rx and Tx port is 45.6 dB. M1 -2 -2.5 -3 B. Transistor determination Decreasing insertion loss and promoting isolation are two main goals in T/R switch design. The insertion loss of the transistor is dominated by its on-resistance (Ron) written as 1 Ron (3) W μCox Vgs - Vt L To improve the insertion loss, Ron should be small. Enlarging the transistor’s width is one method to reduce the insertion loss. However, widening the transistor’s width would increase junction capacitances, so the width needs to be chosen carefully. In addition, series arm transistors (M1 and M2) affect insertion loss more obviously than shunt arm transistors (M3 and M4). As shown Fig. 4, from simulation of insertion loss of series arm transistors, the optimal finger 40 is determined. For the isolation consideration, the switch has the best isolation between Rx and Tx port as the leakage propagating through two similar paths with 180° phase difference. As a result, the all transistor’s size should be the same. Antenna M2 Tx finger_16 finger_24 finger_32 finger_40 finger_48 finger_56 finger_64 -3.5 15 20 25 30 35 Frequency (GHz) Fig. 4 The chosen size of the series transistors, M1 and M2 , is 40 of finger values (W = 1.5 μm, L = 0.18 μm) Fig. 5 Chip micrograph. On-wafer measurement of the T/R switch designed in this work is conducted. Output return loss is better than 10 dB at 24 GHz. The measured insertion loss in the Rx mode and Tx mode are 7.3 dB and 7.4 dB, respectively. The measured isolation between Rx and Tx port is 34.3 dB. The measured input 1-dB compression point and third order intercept point are 18 dBm and 28.5 dBm , respectively, as shown in Fig. 7 (e) and Fig. 7 (f). These results have good power handling, and this can be increased by replacing low voltage control with negative voltage to widen the large-signal swing [6]. Table I is a performance comparison with the reported CMOS switches. The switch presented in this work exhibits a better isolation. Since the insertion loss has much to do with the CMOS process, that of the proposed switch would be improved when fabricated in a more advanced 130- or 90-nm CMOS processes. IV. CONCLUSIONS The design of a 24 GHz T/R switch with leakage cancellation technology has been presented in this paper. In this circuit, signal leakage can be reduced by propagating through two similar paths with 180° phase difference. In addition, body-floating technology is introduced into this work to alleviate the insertion loss. The 24 GHz switch fabricated in 0.18-μm CMOS technology exhibits the insertion loss of 7.4 dB and 7.3 dB in the Tx and Rx modes, respectively, the isolation of 34.3 dB between the Rx and Tx port, and an input 1-dB compression point of 18 dBm. Better performance can be expected if enhanced CMOS technology is used, such as 90 nm CMOS. REFERENCES [1] H. Krishnaswamy and H. Hashemi, “A Fully Integrated 24GHz 4-Channel Phased-Array Transceiver in 0.13 μm CMOS Based in a Variable-Phase Ring Oscillator and PLL Architecture,” ISSCC 2007 Digest of Technical Paper, pp.124-125. [2] A. Natarajan, A. Komijani, and A. Hajimiri, “A 24 GHz Phased Array Transmitter in 0.18μm CMOS,” ISSCC 2005 Digest of Technical Paper, pp.212-213. [3] S.-C. Chang, S.-F. Chang, T.-Y. Chih, and J.-A. Tao, “An internally-matched high-isolation CMOS SPDT switch using leakage cancellation technique,” IEEE Micro. Wireless Compon. Lett., vol.17, no.7, July 2007. [4] F.-J. Huang and K.O, “A 0.5 μm CMOS T/R switch for 900-MHz wireless application,” IEEE Journal of Solid-State Circuits, vol.36, no.3, pp.486-492, Mar. 2001. [5] M.-C. Yeh, Z.-M. Tsai, R.-C. Liu, K.-Y. Lin, Y.-T. Chang, and H. Wang, “Design and analysis for a miniature CMOS SPDT switch using body-floating technique to improve power performance,” IEEE Transactions Microwave Theory Tech., vol.54, no.1, pp.31-39 Jan. 2006. [6] Y. Jin and C. Nguyen, “Ultra-compact high-linearity high-power fully integrated DC–20-GHz 0.18-μm CMOS T/R switch,” IEEE Transaction on Microwave Theory and Techniques, vol. 55, no. 1, pp.30-36, Jan. 2007. [7] T. M. Hancock and G. M. Rebeiz, “A 12-GHz SiGe phase shifter with integrated LNA,” IEEE Transactions Microwave Theory Tech., vol.53, no.3, pp.977-983, Mar. 2005. [8] P. Park, D. H. Shin, J. J. Pelarik, M. Rodwell, and C. P. Yue, “A high-linearity, LC-tuned, 24-GHz T/R switch in 90-nm CMOS,” in Radio Frequency Integrated Circuits (RFIC) Symp., pp.369-372,June 2008. [9] C.-C. Wei, S.-W. Lin, H.-C Chiu, and W.-S Feng, “A Study of Gate/Source-terminated Field-Plate NMOS Transistor and Its application in Switch Design,” Asia-Pacific Conference Proceedings (APMC), pp.1-4. Dec. 2007 ACKNOWLEDGEMENT The authors would like to thank the Chip Implementation Center (CIC) of the National Science Council, Taiwan, ROC, for supporting the TSMC CMOS process. TABLE I Comparison with other reported T/R switch designs Reference Frequency range Process Topology Return Loss (dB) Isolation (dB) Insertion loss (dB) Input P1dB (dBm) [8] 24 GHz 90 nm Triple-well CMOS [9] 24 GHz 0.13 μm Field-plate CMOS This work 24 GHz LC-Tuned LC resonance 11 16 3.4 (Tx) 3.5 (Rx) 28.7 NA 14 0.18 μm CMOS Leakage cancellation 12.5 34.3 7.4 (Tx) 7.3 (Rx) 18 4.4 33 -8 0 0 -10 -2 -12 S21,S13 (dB) S22,S33 (dB) S11 (dB) -5 -14 -10 -16 -15 -18 -4 -6 -8 -20 -20 S22,S33 simu. S22 meas. S33 meas. -22 simu. meas. -10 -24 -25 18 20 22 24 26 -12 18 28 S21,S13 simu. S21 meas. S13 meas. 20 22 24 26 28 Frequency (GHz) Frequency (GHz) (a) 18 20 22 24 26 28 Frequency (GHz) (b) (c) -7 -10 -15 -7.5 -20 S23 (dB) Gain (dB) -25 -30 -35 -8 -8.5 -40 -45 simu. meas. meas. -50 18 20 22 24 26 28 -9 -10 -5 0 5 10 Frequency (GHz) Input power (dBm) (d) (e) 15 20 (f) Fig. 6 Simulation and measurement results: (a) S11 (b)S22 and S33 (c) S21 and S13 (d) S23 (e) input P1dB (f) two tone test. (port1: Ant, port2: Rx, port3: Tx) Abstract — This paper presents a 24-GHz single-poledouble-throw (SPDT) CMOS switch implemented in the 0.18-μm CMOS process (TSMC 1P6M). The design focuses on the technology to increase isolation between transmit (Tx) and receive (Rx) ports with leakage cancellation. In addition, in order to minimize the insertion loss of the switch, body-floating technology is added every transistor. The switch uses high (1.8 V) and low (0 V) digital control voltages for T/R mode selection. On-chip measurement of the proposed CMOS T/R switch is performed. The isolation of switch is 34.3 dB, higher than the conventional series-shunt construction. The insertion loss of the Rx and Tx modes are 7.3 and 7.4 dB, respectively. The measured input 1-dB compression point and return loss are 18 dBm and 12.5 dB at 24 GHz, respectively.