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ID A12C: Noise Fundamentals and Techniques for Minimizing EMI Problems Renesas Electronics America Inc. Mitch Ferguson Manager Application Engineering 12 October 2010 © 2010 Renesas Electronics America Inc. All rights reserved. Version: 1.1 Mr. Mitch Ferguson Applications Engineer Manager Specializes support design teams develop low-noise systems using MCUs. Over 15 years of system-level design experience Over 7 years of experience as an application engineer. As a hardware engineer and engineering manager, he has been involved in design in power distribution controls, automotive and fire alarm systems with focus on EMI/EMS issues. Bachelor of science in electrical engineering from Cleveland State University 2 © 2010 Renesas Electronics America Inc. All rights reserved. Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * ASIC, ASSP & Memory Advanced and proven technologies Solutions for Innovation Analog and Power Devices #1 Market share in low-voltage MOSFET** * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 ** Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). 3 © 2010 Renesas Electronics America Inc. All rights reserved. Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Solutions for Innovation ASIC, ASSP & Memory Advanced and proven technologies Analog and Power Devices #1 Market share in low-voltage MOSFET** * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 ** Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). 4 © 2010 Renesas Electronics America Inc. All rights reserved. Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia High Performance CPU, Low Power High Performance CPU, FPU, DSC Up to 1200 DMIPS, 45, 65 & 90nm process Video and audio processing on Linux Server, Industrial & Automotive Up to 500 DMIPS, 150 & 90nm process 600uA/MHz, 1.5 uA standby Medical, Automotive & Industrial Up to 165 DMIPS, 90nm process 500uA/MHz, 2.5 uA standby Ethernet, CAN, USB, Motor Control, TFT Display Legacy Cores Next-generation migration to RX General Purpose Up to 10 DMIPS, 130nm process 350 uA/MHz, 1uA standby Capacitive touch 5 © 2010 Renesas Electronics America Inc. All rights reserved. Ultra Low Power Embedded Security Up to 25 DMIPS, 150nm process Up to 25 DMIPS, 180, 90nm process 190 uA/MHz, 0.3uA standby 1mA/MHz, 100uA standby Application-specific integration Crypto engine, Hardware security Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia High Performance CPU, Low Power High Performance CPU, FPU, DSC Up to 1200 DMIPS, 45, 65 & 90nm process Video and audio processing on Linux Server, Industrial & Automotive Up to 500 DMIPS, 150 & 90nm process 600uA/MHz, 1.5 uA standby Medical, Automotive & Industrial Up to 165 DMIPS, 90nm process 500uA/MHz, 2.5 uA standby Ethernet, CAN, USB, Motor Control, TFT Display Legacy Cores Next-generation migration to RX General Purpose Up to 10 DMIPS, 130nm process 350 uA/MHz, 1uA standby Capacitive touch 6 © 2010 Renesas Electronics America Inc. All rights reserved. Ultra Low Power Embedded Security Up to 25 DMIPS, 150nm process Up to 25 DMIPS, 180, 90nm process 190 uA/MHz, 0.3uA standby 1mA/MHz, 100uA standby Application-specific integration Crypto engine, Hardware security Innovation 7 © 2010 Renesas Electronics America Inc. All rights reserved. The Renesas Advantage Renesas MCUs provide a key element in any good low noise design, starting with a low noise MCU 8 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda Noise Basics System Level Countermeasures IC Level Design Countermeasures Summary Q&A 9 © 2010 Renesas Electronics America Inc. All rights reserved. 4 Basic Areas of Noise Concern Emissions - Test requirements for Radiated Conducted Susceptibility - Test requirements for : Radiated Conducted Impulse and Transient Supply voltage variations ESD - Test requirements for : Contact discharge Air discharge Signal Integrity (no standards) - user must determine appropriate testing 10 © 2010 Renesas Electronics America Inc. All rights reserved. Which noise area is the biggest concern in your design area 11 1. Emissions 2. Immunity 3. They are both equal 4. ESD © 2010 Renesas Electronics America Inc. All rights reserved. H-Field or Differential Radiation Magnetic or H - Field emissions are the result of current flow in traces Magnitude of the radiated field received is: EMI = (k * I * F2 * A)/d – k is a constant based on many physical parameters – I is the current flowing in the loop conductors – F is the frequency of the current – A is the area enclosed by the current carrying conductors I Loop Area 12 © 2010 Renesas Electronics America Inc. All rights reserved. Load E-Field or Common Mode Emissions E - Field emissions result due to in-phase currents on two lines or voltage potentials on traces Common mode noises are very effective radiators Sources of common mode noise Noisy grounds Unbalanced signal and return paths Noise Source (e.g. Clock Circuit) Common Mode Noise due to pickup 13 © 2010 Renesas Electronics America Inc. All rights reserved. + noise Signal Line + noise Return Line (GND) EMI Spectrum of a squarewave Frequency Spectrum Fundamental and Odd Harmonics 10 0 20 dB/Decade slope Corner Frequency breaks at 1/pt where t is risetime -10 Risetimes dB -20 2 nSec 8 nSec 40 dB/Decade slope Ninth Harmonic Eleventh Harmonic Seventh Harmonic -50 Third Harmonic Fundamental -40 Fifth Harmonic -30 9th harmonic reduced 6 dB Above 160 MHz reduced by 12 dB. MHz -60 1 14 10 Fundamental © 2010 Renesas Electronics America Inc. All rights reserved. 100 1000 Crosstalk Transmitter Line Driving Device Parasitic Parasitic Capacitances Inductances Receiving Device Receptor Line Due to parasitic capacitances and inductances Capacitive crosstalk dominant when impedance is high Inductive coupling dominant when impedance is low Decrease line-ground impedance Reduce edge rates 15 © 2010 Renesas Electronics America Inc. All rights reserved. Wave Reflections Reflection occurs at any discontinuity in impedance Impedance increases reflected pulse adds to incident wave Impedance decreases reflected pulse subtracts from incident wave 16 © 2010 Renesas Electronics America Inc. All rights reserved. Impedance Matching Prevent reflection must terminate line Zm//Zi = Zo Trasmitter No Reflection Receiver Zout Vs Z0 Zm Zi Transmission line analysis required for “long” lines A rule of thumb is a trace can be considered “short” if ratio of tracelength (inches) to risetime (nSec) is <3 (on FR4 board) 17 © 2010 Renesas Electronics America Inc. All rights reserved. Noise Control for EMI The same design improvements that counter EMI emissions help reduce EMS susceptibility Keep all signals differential with small current loops Opposite flux lines cancel + signal return Flux lines equal and opposite Minimize common mode signals Very effective radiators Balance signal path lengths and spacing Minimize high frequencies Overshoot Fast edge rates 18 © 2010 Renesas Electronics America Inc. All rights reserved. Noise Control for EMS Guidelines to minimize EMS susceptibility Keep all signals differential with small current loops Lines will receive equal noise + noise No Net Voltage Influence + noise Flux lines equal Balance signal path lengths and spacing Keeps noise pickup common mode Minimize overshoot and fast edge rates Creates cross-talk problems 19 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda Noise Basics System Level Countermeasures IC Level Design Countermeasures Summary Q&A 20 © 2010 Renesas Electronics America Inc. All rights reserved. Bus Connections Use on-chip Flash and RAM Use serial connections Minimizes EMI sources Minimizes Cross-talk sources 21 © 2010 Renesas Electronics America Inc. All rights reserved. System Layout and Design Place current limiting resistors close to MCU Protects MCU Resistor and Trace capacitance form low pass Minimizes EMI from MCU Place Damping/Slew resistors on long leads Slows rise times Damps oscillatory waves Few hundred ohms effective 22 © 2010 Renesas Electronics America Inc. All rights reserved. Power and Ground – Net Power Routine Use loop or net power layout Minimizes lead voltage variations Minimizes common mode MCU becomes star point 23 © 2010 Renesas Electronics America Inc. All rights reserved. Alternative Power and Ground Routing If net not practical keep Vcc and Ground Parallel Minimizes loop area Balance minimizes common mode 24 © 2010 Renesas Electronics America Inc. All rights reserved. Bypassing Place bypass cap as close as possible Minimize loop area Equal distance to Vcc and ground Minimizes common mode Consider multiple capacitors Covers wider frequency spectrum Series Vcc inductance increases performance Both EMI and EMS 25 © 2010 Renesas Electronics America Inc. All rights reserved. Selecting Bypass Capacitors 26 © 2010 Renesas Electronics America Inc. All rights reserved. Multiple Bypass Capacitors Multiple Capacitor Frequency Response Vcc C1 C2 2.2 uF .47 uF Impedance Frequency Expect resultant impedance less than either capacitor’s impedance Capacitor 1 Impedance Capacitor 2 Impedance Expected Resultant Impedance Actual Resultant Impedance 27 © 2010 Renesas Electronics America Inc. All rights reserved. Multiple Capacitors – Anti-Resonance Multiple Capacitor Actual Frequency Response Vcc Line C1 C2 Impedance When using different value capacitors Use devices with low ESL (Q= XL/ESR) Frequency If Q is < 5 should not be problem Greater difference in capacitance more risk fo Capacitor 1 Impedance Capacitor 2 Impedance Actual Resultant Impedance 28 © 2010 Renesas Electronics America Inc. All rights reserved. Feed-Through Capacitors Consider using feed-through capacitor Space is limited Many bypass capacitors required Frequency Response Comparison 1000 schematic Impedance Ω 100 10 0.05 uF Ceramic 1.0 0.05 uF Feedthrough 0.1 Ideal 0.05 uF Capacitor Equivalent 0.01 1k 10k circuit © 2010 Renesas Electronics America Inc. All rights reserved. 1M Frequency Standard Cap Ckt 29 100k 10M 100M 1G Component Selection Start with a robust, low noise MCU 30 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda Noise Basics System Level Countermeasures IC Level Design Countermeasures Summary Q&A 31 © 2010 Renesas Electronics America Inc. All rights reserved. All MCUs Are Not Equal Spectrum with TEM Cell Method - 3V, 4MHz MCU-A R8C/11 dB MCU-C MCU-B KHz 32 © 2010 Renesas Electronics America Inc. All rights reserved. Emission Noise vs. MCU Frequency Good layout practices can minimize noise even as frequency is increased M16C/62 (16MHz) 33 © 2010 Renesas Electronics America Inc. All rights reserved. M16C/80 (20MHz) M32C/83 (30MHz) Controlling Clock Emissions H A Two level clock drive B Start oscillation Adaptive drives PLLs “L” High Drive Mode Spread Spectrum L A B Static-state oscillation Low Drive Mode 34 © 2010 Renesas Electronics America Inc. All rights reserved. IO Port Design - 1 Control buffer drive capacity Vcc Internal buffers and output bufferIN OUT GND Vcc Control drive signal slew rate GND 35 © 2010 Renesas Electronics America Inc. All rights reserved. Vcc IN OUT GND IO Port Design - 2 Vcc Vcc P-ch P-ch Control Circuit Eliminate dash currents in buffers N-ch N-ch GND GND Control simultaneous switching Output terminal Internal External t1 Synchronized switching 36 © 2010 Renesas Electronics America Inc. All rights reserved. t1 t2 Time-shifted switching Layout Improvements IN OUT Vcc Layout increases internal capacitance No increase in die size Effective bypass cap GND N+ P+ N P+ N+ N+ P P+ P- Vcc IN Vcc OUT IN GND Layout improves power performance Optimum bypass placement Common mode filter GND Vcc © 2010 Renesas Electronics America Inc. All rights reserved. Noise absorption as common mode Vcc Pin layout simplifies putting bypass capacitor at best position Long Lead length GND 37 OUT Parasitic capacitor GND Wiring inductance Noise Countermeasures Schmitt devices on inputs Analog RC filters Clamp diodes for overshoot Input Port External to the chip Noise Filter Clamp diode 38 © 2010 Renesas Electronics America Inc. All rights reserved. Clamp diode Noise Filter Clamp diode Noise Filter Internal Internal Power Layout Separate Power Areas Prevents mixing noise sources Allows sizing traces Output Peripheral buffer supply Analog Supply Buffer switching noise STOP STOP STOP + - Digital circuit noise ANALOG Internal Noise Sources 39 © 2010 Renesas Electronics America Inc. All rights reserved. Internal logic supply Electrically Separated Supply Lines Noise Free/Immune - Low EMI/EMS Design with Non-Renesas MCU Power supply ferrite beads placed on the VCC pin MCU Control signal lines protected with noise filters and capacitors 40 © 2010 Renesas Electronics America Inc. All rights reserved. M16C Based board Questions? 41 © 2010 Renesas Electronics America Inc. All rights reserved. Summary Noise Basics Small current loops Balanced Design Reduce edge rates System Level Countermeasures Good bypassing Balanced routing IC Level Design Countermeasures Start with low noise, robust MCU 42 © 2010 Renesas Electronics America Inc. All rights reserved. Innovation 43 © 2010 Renesas Electronics America Inc. All rights reserved. Thank You 44 © 2010 Renesas Electronics America Inc. All rights reserved. Renesas Electronics America Inc.