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ESE 232 Introduction to Electronic Circuits
Professor Paul Min
[email protected]
(314) 853-6200
Bryan Hall 302A
Chapter 1. Signals and Amplifiers
Microelectronics
• Integrated circuit technology
• Billions of components
• Typically implement in silicon wafer < 100 mm2
• Examples: microprocessors, memories, logic chips
ESE 232
• Study of microelectronics
• Analysis and design
• Functional circuits
Copyright  2004 by Oxford University Press, Inc.
Electrical circuits
• Processes signals
• Driven by power sources (voltage or current)
• At every point in a circuit, voltage and current are
defined.
Signal (or power)
represented in voltage
(Thevenin form)
vs(t) = Rs is(t)
Signal (or power)
Equivalent and
represented in current
translatable
(Norton
form)
Copyright  2004 by Oxford
University Press,
Inc.
Signals
•
•
•
•
Contain time-varying information.
Exist in various forms (mechanical, electrical, chemical,
acoustical, etc.)
Can be conveniently processed by electrical circuits.
Converting non-electrical signal to electrical signal is done by
transducer (or sensor).
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Frequency Spectrum of Signals
•
•
Often difficult to express signals in time (in mathematical
form).
Signals can be shown in frequency spectrum: Fourier series,
Fourier transform, Z-transform, etc. → At what frequencies
does the signal contain energy and by how much?
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Fourier Series
•
Example:
sine-wave va(t) = Va sin wt
va(t) has all its energy at the angular frequency of w = 2πf.
f is frequency in Hz. T = 1/f is period in seconds.
Magnitude of this sine-wave at the angular frequency w is Va.
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Example:
square-wave
Time expression
w0= 2π/T
Frequency expression
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Frequency Allocations in the U.S.A.
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Digital v. Analog
•
•
Analog signal: continuous value, continuous time
Digital signal: discrete value, discrete time
Analog
Signal
Continuous time
Continuous value
Sample
Digital
Signal
Quantize
Discrete time
Continuous value
Discrete time
Discrete value
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Why Digital?
•
•
•
•
•
Less expensive circuits
Privacy and security
Small signals (less power)
Converged multimedia
Error correction and reduction
Why Not Digital?
• More bandwidth
• Synchronization in electrical circuits
• Approximated information
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Notation
•
•
•
•
•
Total instantaneous quantities: lowercase symbols with uppercase
subscripts (e.g., iC)
dc quantities: uppercase symbols with upper case subscripts (e.g., IC)
Power supply voltages: uppercase V’s with double letter uppercase
subscripts (e.g., VEE)
dc currents draw from power supply: uppercase I’s with double letter
uppercase subscripts (e.g., ICC)
Incremental signal quantities: lowercase symbols with lower case
subscripts (e.g., ic)
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Amplifiers
• Amplification of input signal
• Linear amplifier: vo(t) = Avi(t) (A: constant gain)
• Voltage amplifier: changes input signal amplitude
Av = voltage gain = vo / vi
• Preamplifier: shaping in frequency (i.e., amplifies
different frequency components differently).
• Power amplifier: gains in voltage and current
symbols
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Transfer Characteristic
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load power (PL ) vO iO
Ap = power gain =

input power (PI ) vI iI
iO
Ai = current gain 
iI
Ap  Av Ai
voltage gain in decibels  20 log Av dB
current gain in decibels  20 log Ai dB
power gain in decibels  10 log Ap dB
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Power Supplies
dc power delivered to amplifer: Pdc  V1 I1  V2 I 2
power drawn from sources: PI
power delivered to load: PL
power dissipated in amplifier: Pdissipated
PL
amplifier efficiency:  
100
Pdc
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Example. Amplifier with  10 V power supplies.
Given: vI (t )  sin wt , vO (t )  9sin wt , RL  1 k , IˆI  0.1 mA
I1  I 2  9.5 mA
9
Av = = 9 V/V (or 19.1 dB)
1
ˆ
ˆI  9 V  9 mA A  I O  9  90 A/A (or 39.1 dB)
O
i
1 k
IˆI 0.1
9 9
1 0.1
 40.5 mW, PI  Virms I irms 
 0.05 mW
2 2
2 2
Ap  Av Ai  9  90  810 W/W (or 29.1 dB)
PL  Vorms I orms 
Pdc  10  9.5  10  9.5  190 mW
Pdissipated  Pdc  PI  PL  190  0.05  40.5  149.6 mW

PL
 100  21.3%
Pdc
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Amplifier Saturation
maximum output
minimum
output
To avoid saturation:
L
L
 vI 
Av
Av
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Nonlinear Transfer Characteristics and Biasing
•
•
To avoid saturation, input signal should be shifted. → Biasing
Input signals are biased to operate in the middle of linear region.
quiescent point: Q
instantaneous input: vi (t )
instantaneous output: vo (t )
input voltage is dc shifted by VI : vI (t )  VI  vi (t )
output voltage: vO (t )  VO  vo (t ) where vo (t )  Av vi (t ) and Av 
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dvO
dvI
at Q
Example. transistor amplifier transfer characteristic:
vO  10  1011 e 40vI for vI  0 V and vO  0.3 V
L  0.3 V. At vO  0.3 V, vI  0.690 V.
vO is highest when vI is lowest, i.e., vI  0 V.
Therefore, L  vO when vI  0 V. L  10 V.
We want to find VI such that VO  5 V.
 VI  0.673 V
Av =
dvO
dvI
= -200 V/V
vI  0.673
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Circuit Models for Voltage Amplifiers
vo  Avo vi
RL
v
RL
 Av  o  Avo
RL  Ro
vi
RL  Ro
 To make gain larger, make Ro smaller. This also decouples the effects of unknown value of RL .
 Ideal amplifiers have Ro  0.
 If R L  , Av  Avo . This decouples the voltage gain of the amplifer from the values of RL .
 If Ri  , then vi  vs
Ri
. Input is reduced by a voltage divider.
Ri  Rs
 We want Ri  Rs . Ideally, Ri  .
v 
Ri
RL
 Overall voltage gain:  o   Avo
Ri  Rs RL  Ro
 vs 
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Cascaded Amplifiers
 Multiple stages of amplifiers put together.
 Each stage may serve different purpose (e. g., power gain,
followed by voltage gain).
High Ri with gain 10
(Signal may be small.)
Modest Ri with gain 100 Small Ri with gain 1
(Provide gain.)
(Buffer output for next
stage.)
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vi1
1M 

 0.909 V/V
vs 1M   100k 
v 
100k 
Av1   i 2   10
 9.9 V/V
100k   1k 
 vi1 
v 
10k 
Av 2   i 3   100
 90.9 V/V
10k   1k 
 vi 2 
v 
10
Av 3   L   1
 0.909 V/V
v
10


100

 i3 
v 
Av   L   Av1 Av 2 Av 3  818 V/V
 vi1 
 vL

 vs
  vL   vi1 
 vi1 


A
   
  743.6 V/V
v
  vi1   vs 
 vs 
 i   v /100 
6
Ai   o    L
  8.18  10 A/A
 ii   vi1 /1M  
P
Ap   L
 Pi
  vL io 
8

  66.9  10 W/W
  vi1i1 
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Different Amplifier Types
R
R
 General Relationship: Avo  Ais o  Gm Ro  m
Ri
Ri
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Example 1.4. Small signal model for Bipolar Junction Transistor (BJT)
Let Rs
B: Base, E: Emitter, C: Collector
Emitter as common (i.e., ground)  Common Emitter Amplifier
 5k , r = 2.5k , g m  40 m A/V, ro  100k , and RL  5k .
BJT
r
vbe  vs
and vo   g m vbe  RL || ro 
r  Rs

vo
r
v
 
g m  RL || ro   63.5 V/V. If ro  , o  66.7 V/V
vs
r  Rs
vs
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Frequency Response
With a sinusoidal input to a linear amplifier, the output is a sinusoid with
the same frequency, but with different amplitude and phase shift.
T ( w) : Transfer function of amplifier
Vo
T ( w) 
and T ( w)  
Vi
Need to determine T ( w) and T ( w) for all frequencies.
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Typically
3 dB
 Constant gain between w1 and w2 . Should operate in this region.
 Gain dropping away from w1 and w2 . Signals are distorted
at frequencies away from w1 and w2
 We say the amplifier has the bandwidth between w1 and w2 .
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First Order Systems: systems with a single time constant
RC circuits have a single time constant   RC
L
RL circuits have a single time constant  
R
General solution (during a time period: initial time  t  final time)
x(t )  xFinal   xInitial  xFinal  e

t

Frequency domain analysis (w : angular variable, s : Laplace variable)
1
1
R  R, C 
or
, L  jwL or sL
jwC
sC
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Low pass RC circuit
No distortion means constant amplitude gain
and linear phase shift.
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High pass RC circuit
No distortion means constant amplitude gain
and linear phase shift.
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 1 
 Ri   
Zi
 sCi 
Example 1.5. Vi  Vs
and Zi  Ri || Ci 
1
Zi  Rs
Ri 
sCi
Vo  Vi
RL
RL  Ro

 1
Vo
  
Vs
 1  Rs

Ri


 1

 1  Ro

RL

constant

Vi
1

Vs 1  Rs  sC R
i s
Ri




1


 Rs Ri  


  1  sCi 


 Rs  Ri  
Function of s
 RR 
Time constant:   Ci  s i   Ci  Rs || Ri 
 Rs  Ri 
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Only the input circuit is a first order system (or single time constant circuit).
Output circuit is a zero order system (i.e., no energy storing element).
K
K
Overall transfer function T ( s ) 

(wo : 3 dB frequency)
1  s
 s 
1  
 wo 
Vo
K
Vs
s 0

 1
 
 1  Rs

Ri


 1

  1  Ro

RL







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Different Shapes of Amplifier Frequency Response
 For all devices, the transfer function loses amplitude
gain at high frequency because of internal capacitance.
 Simple low pass configuration.
 Direct coupled amplifier
 Amplifier can block low frequency components
(including DC) by putting a capacity in series
with input (i.e,. input circuit is a high pass circuit).
 Capacitively coupled amplifier
 Amplifier can "filter-in" only selective frequency
components. Typically higher order circuits.
 Tuned amplifier
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Logic Inverter
Nonlinear (saturation)
region for digital binary
logic operation
Circuit symbol
• input 1 (high) → out put 0 (low)
• input 0 (low) → out put 1 (high)
Linear region for ordinary
amplifier operation
(transition region)
Transfer function
• high vi (> 0.690V) → low vo (≈ 0.3V)
• low vi (≈ 0V) → high vo (≈ VDD)
• linear region for mid value of vi
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Noise Margin
• For cascaded inverters
• Noise margin for high input
NMH = VOH - VIH
• Noise margin for low input
NML = VIL - VOL
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Ideal Inverter
NMH = NML =VDD / 2
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Abstract Implementation of Inverter
voltage
controlled
switch.
When vI is low, switch is
open, leaving the vertical
path disconnected.
→ vo = VDD is an open
circuit voltage.
When vI is high, switch
connects the vertical path.
→ vo is a low level voltage
determined largely by Voffset,
a characteristic of the voltage
controlled switch.
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(RonPress,
is Inc.
typically small.)
Propagation Delay
• Change of output after input change is not instantaneous.
• Internal capacitance of devices causes the delay.
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When the switch is on (input high), it provides the vertical path with Voffset
and Ron . The capacity is open circuit at steady state. Thus the steady state
output value is low: VOL  Voffset 
VDD  Voffset
Ron  0.55 V.
R  Ron
When the switch becomes off (input becomes low), the vertical path is
connected by the capacitor only. The final value of output is VDD because
once again, the capacitor becomes an open circuit at steady state.
Assuming the input changes at t  0,


vo  t   vo (0 )  vo ()  vo (0 ) e
108 t

t

(where   RC )
108 t
 5  (0.55  5)e
 5  4.45e
Define t PLH to be the time for output to go from low to the half way point
to the final high output value.  vo  t PLH  
1
1
V

V

 OH OL   5  0.55
2
2
From this we get, t PLH =6.9 ns.
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