Download SALTRO-status_1.6.2013

Status report on the development of a readout
system based on the SALTRO-16 chip
Leif Jönsson
Lund University
LCTPC Collaboration Meeting 1.6.2013
The SALTRO-16 readout system
The SALTRO16 readout system is a highly advanced system with several
subsystems including new technology
The Large Prototype
TPC
Detector control
The challenges
The challenge is not only to bring down the size of the present FEC (17x19cm2)
to one that is compatible with the pad size per channel, but in addition to solve
the following tasks:
• Set up a test socket and develop a test socket board for tests of the
SALTRO-chips mounted on the carrier boards.
• Develop an MCM prototype board for functionality tests.
• Develop the final MCM-board and program the CPLD (Complex Programmable
Logic Device) (Yifan Yang, Brussels).
• Develop a Low Voltage (LV) prototype board for functionality tests.
• Develop the final LV-board for 8 different voltages per MCM-board i.e. each
voltage board has 40 voltage regulators, and transfer a total current of 80 A
which gives a power of 110 W.
• Develop a Detector Control System (DCS) for control and montoring of the
MCM- and LV-boards. This includes a master board and slave (5to1) boards.
• Setup of a serial redout system (SRU). We need help with modification of the
firmware.
• Setup of a monitor system, DOOCS (Oliver Schäfer, Rostock)
• Constuct the mechanics to integrate the readout electronics, the cooling of
the electronics and the HV supply for the gas amplification system (Volker
Prahl, DESY).
Status of the SALTRO-development in Lund
1) Carrier board
610 SALTRO16 chips have been obtained from
CERN (die size; 8.7 x 6.2 mm2).
Size of carrier board 12.0 x 8.9 mm2
Design ready since some time.
Specification document ready and sent to the
company.
Contract with company for mounting components
has been signed.
Production of PCB:s followed by mounting of
components soon.
2) Test socket for testing SALTRO-chips on
carrier boards
Contact with manufacturer in US established.
Will be ordered as soon as we get the exact
final dimensions of the carrier board.
3) Test socket board
The design is ongoing
This board will be an interface between the test socket and the CERN
SALTRO test board below
4) The Multi Chip Module (MCM-board)
a) The prototype board
Design ready
PCB will be ordered shortly.
This board is a stand alone board which contains one SALTRO-chip in a QFP
package and the necessary voltage regulators. There are a several test points
and connectors for connecting to a logic analyzer to probe the functionality.
With this system we can also develop and test the serial readout.
b) The final MCM-board
The main components on this board are:
8 carrier boards, connectors to the pad plane, a CPLD, connectors for data
transfer and LV-support.
The circuit design is ready but we are waiting for the test results from the
prototype board before the design is finally fixed
The final MCM-board
Top side
Below side
4 mCM-boards
on a credit card
Side view of the board assembly
Since it was necessary to add two
layers (8 instead of 6) the carrier
board has become 0.2 mm thicker.
It means that the available space
for cooling pipes between the MCM
and the pad plane is 1.6 mm.
Organization of the MCM-boards
within a module
3200 channels corresponds to a
pad size of 1 x 8.5 mm2 if the whole
area of the module is covered.
1.6 mm
5) The Low Voltage Board
a) The final LV-board
This board provides low voltage for five MCM-boards on a row on the pad
module. There are five rows i.e. five LV-boards per module. The board
contains I/O registers to switch on/off the voltage regulators, ADC:s to
monitor voltages and currents respectively, and it also contains a temperature
sensor.
b) The prototype board
The PCB is ready and temperature sensor mounted..
RJ45 connectors for serial readout
LV
connection
LV
connection
Towards MCM-board
LV-boards on a pad module
The LV-boards also have to be cooled.
6) The Detector ControlSystem
a) The master board
PCB ready and mounted,
contains one microprocessor to
communicate with the five 5to1 boards.
b) The 5to1 boards
PCB:s ready and one complete board
mounted,
contains one microprocessor per LV-board.
The board muonted have been tested and
are working
The boards are presently under test
The test setup
Some pictures (taken last week)
Master board
LV-prototype board
5to1 board
7) The monitor system DOOCS
We will monitor around 700 parameters from the MCM- and LV-boards per
pad module. For this we propose to use DOOCS, which has been developed at
DESY for FLASH and is in use by the DESY LCTPC-group with good
experience. We have been promised to get help from Oliver Schäfer to install
our system into DOOCS
8) Serial readout
One SRU (Serial Readout System) with power box has been purchased from
CERN but is still waiting to be transported to Lund until we know who can
help us with the modification of the firmware. Any volonteer from LCTPC???
9) Mechanics
First scetch made by Volker Prahl. Further discussions next week
Open questions:
• Requirements on Trigger/data rate.
• Should we use ALICE DDL or Ethernet for the DAQ?
• Can we reuse parts of the TPC DAQ/Monitor? Data format?
• Who can write the SRU firmware and the protocol between the MCM:s and SRU?
• Should we prepare for running with other detectors, common DAQ?
• How will we implement the trigger system and power pulsing?
• Are there more problems to be solved?
Everything depends on each other.