Survey
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
Design Margining Uncertain factors Temperature Supply voltage 5/23/2017 Ids decreases with temperature T-1.5 Commercially parts: 0°C to 70°C Industrial parts: -40°C to 85°C Military parts: -55°C to 125°C Compensation circuits Normally allow 10% or more ELEN 475 1 Process Variation Device characteristics follow normal distribution N(a, ) 2 3 Device char within 3 is reported as variation 5/23/2017 1 =68.26% 2 =95.44% 3 =99.74% ELEN 475 2 Process Variation Device Gate length Oxide thickness Doping density Interconnect 5/23/2017 Metal width, metal thickness Inter-layer-dielectric thickness Via resistance ELEN 475 3 Impact of Process Variation Delay variation wafer-to-wafer, chip-tochip, region-to-region, or random 5/23/2017 ELEN 475 4 Delay Fault Path delay fault Path delay is d Process variation causes extra delay Δ If d +Δ>Tcycle, then there is a delay fault From PIs or FFs To POs or FFs output outputwithout with variation P1 P2 P2 Combinational Circuit 5/23/2017 P1 ELEN 475 Tcycle 5 Design Corners Imaginary box that surrounds the guaranteed performance For example, when all devices on one path has longest gate length, while all devices on another path has shortest gate length Rarely happen, but can be a problem Verification and testing 5/23/2017 ELEN 475 6 Reliability Device failure/degradation Hot electron effect Electromigration Oxide failure Transistor degradation Accelerated life testing 5/23/2017 Over-voltage, over-temperature ELEN 475 7