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Construction of electronic systems C.Bohm Components + connections 2-pole (resistors), 3-pole (transistors) 4-pole (transformers)+..+10-pole vacuum tubes) John Pinkerton First one used components mounted on isolating cards, connected by soldered connections Increased component density demanded other methods Integrated circuits DIL (dual in line) packages Hole mounted <30 legs + single or double sided circuit boards wire wrapped circuit boards DIL wrapped circuit boards printed circuit boards crossing leads problems with single sided boards (can be solved by jumpers) You can use vias on double sided boards (metal deposited holes usually 0.2-1 mm) LSI (large) ic-circuits + Large DIL <100 legs PGA (pin grid array) better <350 legs PGA multi layer boards many routing layers Special power planes supply power to the components Long connections have inductance Active component “Ground bounce” Varying current transport Power plane with low inductance Nearby decoupling capacitors Deliver charges that can supply the current transients They work like energy reservoirs Ground plane with low inductance Ground and power plane have also good shielding properties Return current Low frequent Signal current Minimize resistance A cut in the ground plane forces the return current to deviate which affects the signal quality High frequent Signal current Return current Minimize inductance A cut in the ground plane can also increase the cross talk between nearby signals Micro strip Stripline Wide trace and small distance gives a large capacitance – difficult to drive Circuit board materials: FR4 (flame retardent 4) Roger (brand name) high speed Poly imide (Kapton) – flexfoïls Rigid flex = combination FR4-Flex foil Multi layer boards allows blind and covered vias Thru blind hole blind Usually <10 layers Trace widths>0.1 mm Isolations distance>0.1 mm Vias>0.25 mm dia dold covered Vias through power planes Sufficiently large diameter to match The drill tolerance Surface mounting Drop via Higher densities vias > 0.25mm SO ≤28 legs >0.5 mm/leg Via to powerplane Thermal via to simplify usually < 10 layers trace widths >0.1mm soldering PQFP <400 legs >0.4mm/leg BGA <600 legs 1.27mm/leg micro BGA, CSP <2000 <1mm/leg Difficult to extract the signals between the balls Many layers are needed Alternative: use laser drilled thin micro via layers which supports very thin traces Pictures from elektrotryck.se Laser drilled vias Pictures from elektrotryck.se From PCBpro.com Step#1 Film Generation: Generated from your design files, we create an exact film representation of your design. We will create one film per layer. Step#2 Shear Raw Material: Industry standard 0.059" thick, copper clad, two sides. Panels will be sheared to accommodate many boards. Step#3 Drill Holes: Using NC machines and carbide drills. Step#4 Electroless Copper: Apply thin copper deposit in hole barrels. From PCBpro.com Step#5 Apply Image: Apply photosensitive dryfilm (plate resist) to panel. Use light source and film to expose panel. Develop selected areas from panel. Step#6 Pattern Plate: Electrochemical process to build copper in the holes and on the trace area. Apply tin to surface. Step#7 Strip & Etch: Remove dryfilm, then etch exposed copper. The tin protects the copper circuitry from being etched. Step#8 Solder mask: Apply solder mask area to entire board with the exception of solder pads. From PCBpro.com Step#9 Solder coat: Apply solder to pads by immersing into tank of solder. Hot air knives level the solder when removed from the tank. Step#10 Nomenclature: Apply white letter marking using screen printing process Step#11 Fabrication: Route the perimeter of the board using NC equipment PCB manufacture · PCB laminate about 0.2mm – different types: FR4, Polyimide (Kapton) and Roger · drill · electrolytic plating of holes– connect a voltage source to the two sides while in a bath · add photo resist · illuminate pattern · rinse · etch · build the layer chemically · glue several layer · component print · lack layer · test with beds of nails or flying probes Mounting components Hole mounting · · · mount components wave soldering test Surface mounting · · · · · · solder mask spread solder paste mount components (with robot) heat in oven next side test Circuit board data generate pattern for the different layers – artwork generate drill files Control files to milling machine (to separate and shape the boards) Different layers Cupper pattern Component print Lack layer Solder mask Different physical layers 1 signal_1 2 power_1 3 power_2 4 signal_2 pad_1 pad_2 (artwork order) Start by creating a schematic Decide board size – shape, silkscreen print, mounting holes, placing and routing zones Make sure there is a pattern for each component – pads, holes, vias and component print connect schematic symbols with legs to component pattern with pads package circuit board data – translate schematics with symbols to component pattern and net list place components on the board (side, position, orientation, ref nr) – manual, automatic or combined draw traces in the connection layer (with support from schematics) – manual, automatic or combined – different trace which gives different impedances split ground plane – avoid couplings between analogue and digital parts area fills – fill empty areas with grounded cupper surfaces Soldering Soldering in solder oven: Double sided mounting difficult Temperature profile Solder quality OK OK Not solder Förenough lite lödtenn Insufficient wetting Dålig vätning Inferior wetting depend on poor heating or insufficient amount of flux Lead free solder enforced in industry – higher temperatures Conductive glue is sometimes an alternative ESD-protection ESD = Electrostatic Discharge ESD damage ESD floors (ground conductive floors) ESD shoes (ground feet against floors) ESD wrist band (grounds arm against table top) At 50% humidity the human discharges rarely produce more than 2000V At 5% they can easily reach 15000V Burn-in Accelerated aging at elevated temperatures Failure rate Inputs are often protected by diodes Shaking to provoke cold solder joints Thermal cycling Bath tub curve time Burn-in