Download Advances in miniaturization technologies for next generation

Miniaturisation of Instrument
Elecctronics using ASICs
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Dr. D. Fernandez,
CEO
ARQUIMEA
[email protected]
www.arquimea.com
ACTUATION SYSTEMS (ASAS)
SENSING SYSTEMS (AS3)
ELECTRONIC SYSTEMS (ASICS)
ARQUIMEA – THE COMPANY
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ALTER – КОМПАНИЯ,
ASIC – ПАРТНЕРЫ ARQUIMEA
Определение
потребности
клиента
Определение
продукта
Определение
партера
Производс
тво
продукта
Alter оказывает поддержку клиенту на всех этапах
Выбор и координация партнеров для субподряда является
ключевым фактором
Партнерство Alter и Arquimea в разработке ASIC смешанного
сигнала
•
•
•
•
•
•
ОПЫТ
Изучение и разработка испытательной модели радиационно-стойких аналогов смешанного сигнала для
космического применения (ЕКА)
Изучение процессов считывания технологии ASIC и разработка испытательной модели для космического
применения (ЕКА)
Квалифицированные для космического применения ASIC (Контроль элементов антенн подверженных прямому
радиационному воздействию) для REDSAT (EADS Casa Espacio)
Квалифицированные для космического применения ASIC смешанного сигнала (Процессорная электроника для
Оптических беспроводных коммуникационных систем) для METNET (INTA)
Радиационно-стойкие ASIC структуры в глубоких сверхтонких технологиях (Catrene, ЕС)
Считывающая электроника для обнаружения частиц высокого приближения ASIC для Hyde-Gaspard
ARQUIMEA OFFERS
State of the Art
European
Design
Technology
Design,
manufacturing
&
Testing
ITAR Free.
No restrictions
for export
Mixed Signal
ASICs,
Mechanical Actuators,
Sensors
FOR SPACE
Integrated Circuit Development
Heritage
from European
Space Sector
ARQUMEA - Current ASIC’s programmes
RADIATION TOLERANT ANALOGUE MIXED
SIGNAL TECHNOLOGY SURVEY AND TEST
VEHICLE DESIGN FOR COSMIC VISION (ESA)
Project prime contractor, Analogical and digital
design, Lay-out, PA requirements, ASIC
verification and testing.
FRONT-END READOUT ASIC TECHNOLOGY STUDY
AND DEVELOPMENT TEST VEHICLES FOR FRONTEND READOUT ASICS FOR COSMIC VISION (ESA)
Project prime contractor, Analogical and digital
design. Lay-out, PA requirements, ASIC verification
and testing.
SPACE QUALIFIED, MIXED SIGNAL ASIC
DEVELOPMENT (DRA (Direct Radiating Array)
antennas elements control) for REDSAT (EADS
CASA ESPACIO)
Analog and digital design, PA requirements, ASIC
verification testing.
SPACE QUALIFIED, MIXED SIGNAL ASIC (FRONTEND ELECTRONICS FOR OPTICAL WIRELESS
COMMUNICATION SYSTEM) for METNET (INTA)
ESA PA requirements, ASIC verification testing.
RAD-HARD ASIC STRUCTURES
SUBMICRON
TECHNOLOGIES.
(CATRENE, EU)
IN DEEP
OPTIMISE
PARTICLES DETECTION HIGH PROXIMITY
READOUT ELECTRONICS ASIC FOR HYDEGASPARD:
ARQUIMEA responsibilities: Analog and digital
design. ASIC verification testing.
120kRAD
-55ºC,
+125ºC
20 years
EOL
ITAR
IRHNA57Z60
ADC128S102
HS1840
AD584
TEST
(ALTER)
ADC128S102
AD584
IRHNA57Z60
HS1840
….
5,000 uds.
Stock
+
120kRAD
-55ºC, +125ºC
20 years EOL
QML
ITAR FREE
SPACE COMPONENTS
PROCUREMENT ISSUES
SPACE components procurement issues
PROBLEM
SOLUTION
COTS (Evaluation
+ Upscreening)
ECI
programme
ASICS
development
Availability of Space Qualified
Parts is reduced and
decreasing
X
X
X*
ITAR/ European dependence
X
X
X*
OBSOLESCENCE/
Technology life-cycle
COMPETENCE
•Power reduction needs
•Mass reduction needs
•Performance increase needs.
Current Monopoly cases
* Depending on the function
X
X
X*
c
X
X
XX*
X
X*
OTHER
Obsolescence
management
programmes
One single ASIC
can solve several
issues at the
same time*
Space Mixed Signal ASICs - Risk reduction strategy.
ASIC VALIDATION
(“qualification”) TEST
TAYLORING
DESIGN EFFORT
OPTIMISATION
ASIC
reconfigurability
ASSEMBLY
STANDARDISATION
TECHNICAL
RISK
MANAGEMENT
FOUNDRIES
PRESELECTION/VALIDATI
ON/CLASSIFICATION
Designs reusability
Designs portability
Radiation hardening
design adapted to
radiation level
requiremets.
DEVELOP.
SCHEDULE
REDUCTION
COST
REDUCTION
USE OF ITAR FREE
TECHNOLOGY
MIXED SIGNAL ASIC PROJECT
ADVANTAGES
TECHNICAL
ECONOMIC
PROGRAMMATIC
STRATEGIC
Technical advantages
Reduced Mass and
Volume
•Reducing discrete components in a circuit implies less PCB surface
requirements.
•PCB density = Concrete Density !!
•Less PCB implies fewer boards in a complex box and therefore reduce
equipment volume (more attractive to the satellite integrator).
Reduced Power
Consumption
• ASIC internal power supply voltage for an acquisition chain can be as
low as 1,2V. Less power supply implies less power consumption.
Improved Performance
•Preferred Part List for Flight equipment manufacturers is a short group of very
old active components.
•Very little updates from Commercial active components manufacturers.
Radiation Hard Improved
Performance
•With the reduction of size in Commercial foundries (nm, and below), the
components are more and more sensitive to radiation (SEE). Difficult to qualify
cots for radiation environments.
•ASIC implementation allows Radiation Hard implementations by Design
Noise reduction
•Proximity of different elements of the Acquisition chain (Amplifier, ADC,
Reference….) inside the ASIC guaranties less noise in the chain and higher
resolution and accuracy.
WCA and FMECA simplification.
Increased MTBF
• Less components implies better reliability analysis.
ITAR Free
• High technology with zero procurement problems.
Economic Advantages
Less discrete components
implies a reduction in
cost in medium term.
• For the price of one mixed signal ASIC development project
the customer can receive more than 1,000 or 10,000
qualified chips than can be mounted in different projects.
A project choosing Mixed
Signal ASIC development
reduces project internal
designers cost and
associated structural costs
• Only one technical manager interfaces with ARQUIMEA
designers once every week through SKYPE or teleconf.
At the end of a project
the Company internal
reserve Goods
increases.
• Each ASIC is part of a semi-finished product, and can be
accounted in the company balance sheet.
Programmatic Advantages
Based on designer knowhow the standard
development time for an
ASIC can be shortened.
• Development of EM in short time.
• Qualification of FM parts in parallel to
Customer validation in final electronic circuit
• Similar to a Long Lead item
Cofigurable topologies
allow for rapid last minute
changes
• Based on ARQUIMEA know how a flexible
design can be supplied.
• Electronically configurable ADCs.
In next projects, you will be
the fastest .
• In next project, the customer holds a
proprietary Part that can be used for next
generation Designs.
Strategic Advantages
Space sector is becoming
competitive
ITAR Free. USA non
dependence.
Increase your technology
portfolio.
• Hold your own technology.
• Hold an strategic technology to win next
quotations.
• Reduce the risk of problems during
procurement.
• Companies require strategic technologies to
grow.
ITAR
For US components ITAR free today does not mean ITAR Free tomorrow.
In 2006, During the political crisis between US and
Europe due to 2nd Iraqui War, shipments of 54SX
FPGAs where delayed by US DOD during 2 months.
No European satellite could be finished on time.
Wolfgang Veith, ESA's head of product assurance and
safety, says: ‘ITAR Components increases the risk,
both programmatic and technological. It's
programmatic risk in the sense that it inevitably leads
to extended procurement times. And the lifecycle of
each component must be tracked to a large level of
detail, from design to integration to testing to launch.'
Non Dependence technology: An alternative can be implementing the system on a
Radiation Hard ASIC using non-ITAR technologies by ARQUIMEA.
MIXED SIGNAL ASIC TYPICAL
APPLICATIONS
Mixed Signal ASIC typical applications
Antenna Manufacturer
Active antennas used in satellites, are an array of different transmitter/receivers which
have to be controlled independently. To reduce mass, size and power consumption an
ASIC can be developed to control each of the this sections.
Mixed Signal ASIC typical applications
Remote Terminal Units
Earth-observation
satellites
or
space
telescopes uses large format focal planes,
based on an array of CCDs. Each of these
CCDs need specific circuitry which can be
efficiently implemented to be placed on the
back of each CCD, leading to a light, small
and power saving design.
Telecom Satellites require highly complex
remote terminal Units and Payloads
Mixed Signal ASIC typical applications
Instrument Control
Units
Earth Observation satellites, landers,
planet probes and others, commonly
need systems which need to process
and acquire data from different sensors.
As the number of sensor can be high,
having each of them different electrical
characteristics, integrated acquisition
systems can be implemented on an
ASIC, allowing centralized acquisition,
simplifying data architectures, and
adding features as online data
processing among others.
Radiation
Infrared
Radiometer
Temperature
Mixed Signal ASIC typical applications
Scientific Payload
Manufactuers
Space Exploration, Earth observation,
Telescopes, ….
Exploring the limits of physicists implies
the limit of technology, and space
discrete components are not the most
advanced technology available….
ASICS TECHOLOGY AND RH
LIBRARIES STATE OF THE ART
Digital ASICs vs Mixed Signal ASICs for space.
Digital ASICs
Mixed signal ASICs
Provide integrated solutions to digital
functions.
Provide integrated solutions to digital and
analog functions.
Space qualified technologies available in
Europe (ATMEL).
No Space qualified technologies
available in Europe.
Rad hard libraries available (ATMEL,
DARE).
No full rad hard libraries available.
Many design groups available (including
OEMs).
Few design groups available (including
OEMs).
Replaceable by (space qualified) FPGAs.
No replaceable by (space qualified)
FPGAs.
ASICs – Technology status in Europe potentially
suitable for mixed signal designs.
Foundry
austriamicrosystems
IMS-Fraunhofer
IHP
Lfoundry
ON Semi.
STM
X-FAB
Technologies features
High-Voltage CMOS (3V – 120V operating voltage)
SiGe-BiCMOS
NVM in CMOS and High-Voltage CMOS
0.35μm and 0.18μm process nodes
Space heritage : ASIC STARX32 (MIXED SIGNAL)
SMPS controler
Magnetometer Front End ASIC (MFA) (MIXED SIGNAL
NemeriX G3 chipset (MIXED SIGNAL)
HV/HT 0.35µm
SGB25V: 0.25µm BICMOS process 3,3V (2,5V core available)
0,13µm pilot line
LF150 PDK: 150nm modular technology
LF350 PDK: 0.35µm modular technology
HVCMOS (3V – 80V operating voltage)
0.35μm, 0,25μm and 0.18μm processes.
HCMOS9-SOI (130nm)
Space heritage: 24-BIT DAC (MIXED SIGNAL)
CMOS065-SOI (65nm)
CMOS Technologies: 1.0 - 0.18 µm modular mixed-signal CMOS technologies.
Space heritage : ASIC REMS (MIXED SIGNAL)
1553 Bus transceiver
BiCMOS Technologies: 0.6µm technology
Space heritage: 16HPCMD ASIC (MIXED SIGNAL),15Krad
SOI-CMOS Technologies: 0.6 µm & 1.0 µm CMOS and BCD technology on SOI substrates.
ASIC generic development flow
ASIC spec
consolidation
Phase I
Phase II
Phase III
Technology
selection
Technology
Validation
ASIC Prototype
ASIC QM/FM
Definition and
implemetation of test
vehicles for radiation and
functinal (parametric)
PERFORMANCE
Definition and
implemetation of first ASIC
prototype (not fully
functional
Definition and
implemetation of final ASIC
version (fully functional).
Design
Validation
Manufacturing
 Assembly
Testing (ESD, electrical and
radiation)
Design
Validation
Manufacturing
Assembly
Testing (environmental and
relaibility)
Design
Validation
Manufacturing
Assembling
Testing (QM full qualification)
FM (LAT ESCC 9000)
CONCLUSIONS
•
•
•
•
•
Mixed signal ASICs are postulated as an alternative solution to current
procurement ISSUES: space devices availability, ITAR/ European
dependence, OBSOLESCENCE, Power reduction Mass reduction,
Performance increase and Current Monopoly cases.
Typical ASICs development programme risks can be mitigated by
innovative ASICS design strategies (ASIC re-configurability, reusability, portability and radiation hardening tailoring).
Foundries pre-selection, testing optimisation, assembly standardisation
will also reduce risks for coming ASICs development programmes.
Several applications are susceptible of being implements in a ASIC
with potential technical, economic and programmatic advantages.
State of the Art of ASICS and design technologies allows the
development of ITAR free rad hard mixed-signal components in
Europe.
Thank you
CONTACT:
Francisco Gutiérrez – ARQUIMEA Ingeneiría S.L. - [email protected]
David Nuñez – ATER TECHNOLOGY - [email protected]
Vasil Popov – ALTER TECHNOLOGY – [email protected]