Download C2175 Datasheet

C2175 Datasheet
Primary Side Sensing SMPS Controller
KEY FEATURES AND ADVANTAGES
• Advanced primary sensing control circuitry achieves accurate voltage and
current (CV and CC) regulation
• Bipolar junction transistor (BJT) primary switch enables ultra low BOM cost
design solutions
• Fast start-up performance without additional active components for low BOM
cost
• Adaptive base and emitter switching extends RBSOA
•
C2175
SOT23-6
< 30 mW no-load power with less than one second turn-on delay and class
leading load-transient performance
• Output transient detection (TD) function for very low no-load power applications
• Optimised PWM/PFM with quasi resonant switching enables efficiency standards compliance with margin
• Enables fully compliant solutions for “MoU” universal USB chargers
o
Optimised control of the primary switch drive for low EMI and compliance to EN 301 489-34
o
Inherently low ripple and low EMI enable compliance with the interoperability standard, IEC 62684
• Full featured protection includes
o Single fault
o Output over-voltage and short-circuit
o Output under-voltage
o Input under-voltage
• Convenient SOT23-6 surface mount package for small size and low cost manufacture
APPLICATIONS
Universal input mobile phones chargers typically to 8 W, including “universal” USB and all major OEM
specifications
Universal input adapters and standby/auxiliary power supplies typically to 8 W
Figure 1: Typical Charger Application Circuit with C2175
Preview
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C2175 Datasheet
Primary Side Sensing SMPS Controller
BLOCK DIAGRAM
VDDREG
VDD
AUX
VDD Regulator
IFBHTLO
VIN
UVP
IFBHTSTART
Reset
signal
Reset circuit
VAUXRUN VAUXSLEEP
VHT Estimator
Cycle
Timing
Transient
Detect
FB
CV Voltage
Control
VOUT
OVP
VOVP
PFM / PWM
BD
Cable
Compensation
CC Current
Control
ED
CS
VCSTHR
CS
CS Blanking
GND
OCP
VCSMAX
Figure 2: C2175 Block Diagram
PIN DEFINITIONS
AUX During Run mode, power derived from the transformer
auxiliary winding is fed to the control circuitry via the AUX
pin.
BD
Base drive for BJT.
ED
Emitter drive for BJT.
FB
The FB input provides feedback to the control circuitry by
monitoring the transformer voltage waveform, and is the
input for the transient detect signal.
GND Power and signal ground.
CS
Primary current sense, via Rcs.
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C2175 Datasheet
Primary Side Sensing SMPS Controller
TYPICAL APPLICATION
Parameter
Symbol
Range or Value
Units
Supply voltage
VIN
90 - 264
Vac
Comment
Output voltage
VOUTCV
5 ± 5%
V
Constant voltage (CV) mode, at the load
Output current
Constant current (CC) mode
Universal mains
IOUTCC
1.6
A
Switching frequency at full load
fMAX
65
kHz
Determined by the chosen variant
Cable compensation
GCAB
6
%
Determined by the chosen variant
No-load power
PNL
< 30
mW
η
> 81
%
TON
<1
s
VUNDERSHT
>4
V
Average efficiency
Turn-on delay
Undershoot voltage
Without transient detect circuit
Energy Star test method
Load step from 0 to full load
Figure 3: Typical Universal Input, 8 W Charger
By sensing the primary-side waveforms of
transformer voltage and primary current, the
C2175 achieves constant voltage and
constant current output within tight limits
without the need for any secondary-side
sensing components.
Figure 4 shows the output characteristics of
a typical charger implementation. When
VOUT is less than VOUTUVP, the C2175 stops
switching
(See OUTPUT UNDERVOLTAGE PROTECTION section). During
start-up, the UVP feature is disabled for the
first NSTARTUP switching cycles and the
output characteristic follows IOUTCCSTUP.
Figure 4: Typical CV/CC
Output Characteristic
Achieved Using C2175
Preview
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C2175 Datasheet
Primary Side Sensing SMPS Controller
PRINCIPLE OF OPERATION
POWER-UP/POWER-DOWN SEQUENCES
Refer to Figure 3 and Figure 5. When mains input voltage (VIN) is applied, current flows through the start-up
resistors (Rht) and BJT. Some of this current is consumed by the C2175 internal circuits, which are in Sleep
mode; the remainder charges capacitor Caux. As soon as the AUX pin voltage rises to VAUXRUN, the C2175
changes to Initialise mode. Current consumption increases to IAUXRUN while internal circuits are enabled. At
the same time the internal clock starts the timer that ensures the VSHUTDN threshold to be active after NSTARTUP
switching cycles. The emitter switch is held at low impedance to ground (GND) and a short drive pulse is
output on the BD pin, during which time the voltage at FB is held at GND potential by current sourced from
the FB pin. This enables the C2175 control circuit to compare the rectified mains input voltage with
thresholds for allowing or preventing the next stage of power-up. If the input voltage is too low
(IFB < IFBHTSTART), the C2175 will not issue further drive pulses, the AUX voltage will discharge to VAUXSLEEP,
and the power-up sequence will repeat. If the mains input voltage is high enough (IFB > IFBHTSTART), the C2175
will enter Run mode and drive pulses will be output on the BD pin. To achieve smooth power-up (monotonic
rise in VOUT), Caux must be large enough to power the control circuitry during Initialise mode and the first few
cycles of Run mode, until sufficient power is provided by the transformer auxiliary winding.
If the input voltage falls below VMAINSLO (see Input Under-Voltage Protection on page 6), VAUX will fall below
VAUXSLEEP and the C2175 will go into Sleep mode, reducing its current consumption to IAUXSLEEP. The control
circuitry will re-initialise if the input voltage is restored and VAUX reaches VAUXRUN.
Figure 5: AUX Waveforms
Mode
Description
Sleep
From initial application of input power or from Run mode, if VAUX falls below VAUXSLEEP, the C2175 goes to
Sleep mode. Non-essential circuits are turned off and BD is held low. Sleep mode is exited when VAUX rises
to VAUXRUN and the control circuitry goes to Initialise mode.
Initialise
Internal circuits are enabled and the C2175 issues one switching cycle to sample the input voltage via the FB
pin. If VIN (hence VHT) is high enough, the C2175 changes to Run mode. If VIN is not high enough, no further
BD pulses are issued and the C2175 returns to Sleep mode when VAUX falls below VAUXSLEEP.
Run
Power conversion: The control circuitry is powered from the AUX rail and the internal VDD is regulated. If VAUX
falls below VAUXSLEEP, the IC ceases power conversion and goes to Sleep mode.
Table 1: Summary of C2175 Operating Modes
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Primary Side Sensing SMPS Controller
SWITCHING WAVEFORMS
Typical waveforms at the FB and CS inputs are shown in Figure 6.
Figure 6: Typical Waveforms at the FB and CS Inputs
CONSTANT VOLTAGE (CV) REGULATION
S
N N



F



2
b
f
R
1

 +

G
E
R
B
VF
V
C
T
U
VO
=
1
b
f
R
Constant output voltage regulation is achieved by sensing the voltage at the FB input, which is connected to
the auxiliary winding as shown in Figure 3 or to a dedicated feedback winding. An internal current source
prevents the FB voltage from going negative. A typical FB voltage waveform is shown in Figure 6. The FB
waveform is continuously analysed and sampled at time tSAMP to measure the reflected output voltage. tSAMP
is identified by the slope of the FB waveform and is coincident with zero flux in the transformer. The sampled
voltage is regulated at VFBREG by the voltage control loop. The (typical) CV mode output voltage is set by the
ratio of resistors Rfb1 and Rfb2 (see Figure 3) and by the transformer turns ratio, according to the following
formula (where output diode voltage is neglected):
Where NF is the number of turns on the feedback (or auxiliary if used for feedback) winding and NS is the
number of turns on the secondary winding. The tolerances of Rfb1 and Rfb2 affect output voltage regulation
and mains estimation so should typically be chosen to be 1% or better.
The current required to clamp the FB voltage to GND potential during the on-time of the primary switch
depends on the primary winding voltage (approximately equal to the rectified mains input voltage), the
primary to feedback turns ratio, and resistor Rfb1. The controller measures FB source current and so
enables Rfb1 to set the input voltage start threshold and the input under-voltage protection threshold, as
described below.
INPUT VOLTAGE START THRESHOLD
In Initialise mode, the C2175 issues a single short-duration drive pulse in order to measure the primary
voltage and so the approximate mains input voltage. If the input voltage is below VMAINSSTART then the C2175
will not start. Instead it will pause while VAUX discharges below VAUXSLEEP then it will begin a new power-up
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C2175 Datasheet
Primary Side Sensing SMPS Controller
⋅
⋅
P F
N N
1
b
f
R
−
T
R
A
T
S
T
H
T
R
A
T
S
S
N
I
A
VM
=
B
IF
1 2
cycle. If the input voltage exceeds VMAINSSTART, the converter will power up. VMAINSSTART is set by Rfb1 using
this equation:
⋅
INPUT UNDER-VOLTAGE PROTECTION
P
⋅
⋅
F
⋅
N N
1
b
f
R
−
O
L
T
H
B
O
L
S
N
I
A
VM
=
IF
1 2
In Run mode, if the mains voltage falls to VMAINSLO, the C2175 will stop issuing drive pulses, VAUX will reduce
to VAUXSLEEP and the C2175 will enter Sleep mode. VMAINSLO is set by Rfb1 using this equation:
CONSTANT CURRENT (CC MODE) REGULATION
C
C
T
U
p
p y
y
t
t
(
(
C
C
S
S



VCIO
P
s
c
R

≈ 

N N
Constant current output (IOUTCC) is achieved by regulating the CS input to the primary side estimate of the
output current scaled by RCS, VCSCC. The regulated output current, IOUTCC is set by the value of the current
sense resistor, RCS, and the transformer primary to secondary turns ratio (NP/NS). The value of RCS is
determined using the formula:
)

)

The tolerance of RCS affects the accuracy of output the current regulation so is typically chosen to be 1%.
The C2175 can maintain CC regulation down to much lower levels of VSHUTDN(max) normally specified for
mobile phones chargers (see Figure 4).
CABLE COMPENSATION
U
×
%
0
0
1
B
A
)⋅
( )
C
(
C
p
R y
t
p V
y
C
t
T
B
A
C
G
=
C O
TV
U
IO
If required, C2175 adjusts the converter output voltage (VOUT) to compensate for voltage drop across the
output cable. The amount of compensation applied (GCAB) is specified in Table 2 on page 12. Use the
formula below to match cable compensation with output cable resistance (RCAB). Refer to the table above
Figure 3 for the definition of symbols used in the equation.
DRIVE PULSE AND FREQUENCY MODULATION
The C2175 control circuitry determines both the primary switch peak current and the switching frequency to
control output power, ensuring discontinuous conduction mode operation at all times.
Primary current generates a voltage across the current sense resistor, RCS, and is sensed by the CS input.
The voltage on the CS pin is negative-going, as shown in Figure 6. When the voltage exceeds a (negative)
threshold (VCSTHR) set by the control circuitry, BD is driven low to turn the primary switch off. At start-up, the
RCS2 resistor value is read to select VCSMIN. The CS voltage threshold (VCSTHR) varies from VCSMIN to VCSMAX
during normal operation. The switching frequency varies from fMIN at no-load, to the maximum switching
frequency, fMAX.
Minimum switching frequency occurs during no-load operation and is typically in the range 1 to 3 kHz,
depending on application design. The periodic voltage waveform on the AUX input, which depends on the
current consumed by the control circuitry and the value of Caux, contributes to control of the switching
frequency. In no-load condition, Caux must be large enough to ensure that ripple voltage on AUX is less
than ∆VAUXPFM(max), and Caux must be small enough to ensure the ripple on AUX is greater than
∆VAUXPFM(min).
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Primary Side Sensing SMPS Controller
L
N
XV
U
IAΔ
N
I
M
F
P
X
U
A
fM
x
u
a
C
=
⋅
The switching frequency increases as the load increases, eventually reaching fMAX at full load (see Table 2).
For protection purposes in the event of certain transitory conditions, the controller immediately issues a drive
pulse if AUX voltage falls to VAUXLOW. This is not part of normal operation or normal frequency control.
BASE DRIVE CONTROL
During the on-time of the BJT, the emitter is switched to GND via the ED pin. Base current, IBD is controlled
to achieve fast turn-on, low on-voltage and fast turn-off to enable reduced power dissipation and accurate
timing of each part of the switching cycle. As shown in Figure 7, the base drive current starts with a fixed
pulse of IFON/tFON. Its amplitude and duration are then modulated to provide sufficient charge for low BJT onvoltage, while allowing de-saturation towards the end of on-time so as to enable fast turn-off. When VCSTHR is
detected on the CS pin, the BD pin is switched to GND and the ED switch is opened.
Figure 7: Base Drive Waveforms
DUTY CYCLE CONTROL
Maximum duty cycle is a function of the primary to secondary turns ratio of the transformer (typically 16:1 for
a 5 V output). For a universal mains input power supply, maximum duty cycle is typically chosen to be 50%
at the minimum (including ripple) of the rectified mains voltage (typically 80 V).
QUASI-RESONANT SWITCHING
The primary switch is turned on when the voltage across it rings down to a minimum (voltage-valley, quasiresonant switching). The effect of this is to reduce losses in the switch at turn-on. It also helps reduce EMI.
PRIMARY SWITCH OVER-CURRENT PROTECTION



F
F
O
S
n
i
m
) + 

(
P
C
O
S
VC
F
F
E
P
C
O
S
VC
=
tC
.
st
Vc d
d
The primary switch is turned off if the emitter current sensed by the CS input exceeds the effective threshold
VCSOCPEFF, subject to the minimum on-time, TONMIN. The effective threshold VCSOCPEFF depends on a threshold
VCSOCP predefined by the controller, the CS signal rate of rise (dVcs/dt), which is dependent on the
application design, and the CS pin turn-off response time, tCSOFF. This gives pulse by pulse over-current
protection of the primary switch.
OUTPUT OVER-VOLTAGE PROTECTION
P
V
O
B
F
Page 7
⋅
G
V
C
T
U
Preview
© Cambridge Semiconductor Ltd 2014
=
VO
P
V
O
T
U
VO
The on-time of the primary switch is reduced if the output voltage tends to VOUTOVP. The value depends on
the set output voltage (VOUTCV) and the FB OVP ratio GFBOVP:
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Primary Side Sensing SMPS Controller
OUTPUT UNDER-VOLTAGE DETECTION
The output under-voltage protection (UVP) function is used to shutdown the converter when the output
voltage is below VOUTUVP.
At start-up this function is disabled during the first NSTARTUP switching cycles and the output current is
regulated allowing the output voltage to rise from 0V in a monotonic way.
If the output does not reach VOUTUVP during this time then the controller will shutdown and restart.
VOUTUVP value depends on the set output voltage (VOUTCV) and the FB UVP ratio:
P
V
U
B
F
⋅
G
V
C
T
U
O
V
P
V
U
T
U
O
V
=
TRANSIENT DETECTION
The transient detection (TD) function is used for very low no-load power applications. A secondary side
circuit is used to sense a drop in output voltage and then signal to the primary side controller to start a new
switching cycle. The TD signal should be applied to the FB pin, its duration is specified by TTD and the
amplitude by VTD. The controller will only detect a TD signal when the idle ring on FB has finished.
Alternatively, a new cycle can be triggered by forcing a negative drop on AUX greater than ∆VAUXPFM(Max) .
This will only be detected after tSAMP.
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C2175 Datasheet
Primary Side Sensing SMPS Controller
ABSOLUTE MAXIMUM RATINGS
CAUTION: Permanent damage may result if a device is subjected to operating conditions in excess of
absolute maximum ratings.
Parameter
Symbol
Condition
Min
Max
Unit
18
V
Supply voltage
VAUX
-0.5
FB input voltage
VFB
-0.5
4
V
FB input current
IFB
-20
20
mA
CS input voltage
VCS
-0.5
4
V
CS input current
ICS
-20
20
mA
BD pin voltage
VBD
-0.5
18
V
ED pin voltage
VED
-0.5
18
V
Junction temperature
TJ
-25
125
°C
Lead temperature
TL
260
°C
Soldering, 10 s
NORMAL OPERATING CONDITIONS
Functionality and performance are not specified when a device is operated under conditions outside the
normal range and device reliability may be compromised.
Parameter
Symbol
Comment
Min
Typ
Max
Unit
External supply voltage
VAUX
5
16.5
V
Transformer resonance
frequency (in-circuit)
fRES
180
1200
kHz
TJ
-25
125
°C
Junction temperature
25
ELECTRICAL CHARACTERISTICS
Electrical characteristics are specified for normal operating conditions. Unless otherwise stated:
1.
2.
3.
4.
Min and Max values apply over the full range of normal operating conditions.
Typical electrical characteristics apply at TJ = TJ (typ).
The chip is operating in Run mode.
Voltages are specified with respect to the GND pin.
AUX PIN
Parameter
Symbol
Condition
Min
Typ
Max
VAUXRUN
To enter Initialise mode
11.5
13.5
15.5
Supply voltage
VAUXSLEEP
4.5
V
VAUXLOW
5
V
2
mA
0.6
mA
Supply current
Aux voltage peak-to-peak
amplitude
IAUXRUN
Average at fMAX, excluding base
drive current
IAUXNL
No load
IAUXSLEEP
In Sleep mode
∆VAUXPFM
No load
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© Cambridge Semiconductor Ltd 2014
0.05
Page 9
Unit
V
15
µA
1.65
V
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C2175 Datasheet
Primary Side Sensing SMPS Controller
FB PIN
Parameter
Symbol
Condition
Min
Typ
Max
Unit
FB regulation level
VFBREG
TJ = 25°C
1.96
1.98
2.00
V
FB input resistance
RFBIN
Effective input resistance
0 < VFB < 5
2
FB OVP ratio
GFBOVP
1.20
FB UVP ratio
GFBUVP
0.6
FB current low mains
threshold
IFBHTLO
-0.45
FB current start mains
threshold
IFBHTSTART
MΩ
mA
-1.05
7
.
0
T
U
VOVO
RCS2= 100Ω
1.5
RCS2= 270Ω
2.2
RCS2= 470Ω
2.5
RCS2= 1000Ω
2.5
RCS2= 100Ω
0.75
RCS2= 270Ω
1.1
RCS2= 470Ω
1.25
RCS2= 1000Ω
1.25
V
C
T
U
≤
mA
FB blanking time
TFBBL
7
.
0
T
U
U
VOVO
V
C
T
>
µs
Start-up cycle count
NSTARTUP
600
Transient detect pulse
duration
TTD
100
ns
Transient detect treshold
VTD
60
mV
CS PIN
Parameter
CS input minimum threshold
(Set by external resistor
RCS2 see figure 4)
CS input maximum threshold
Symbol
Min
VCSMIN
VCSOCP
Outside CS
blanking
time tCSB
VCSMAX
CS turn-off response time
tCSOFF
CS threshold for CC
operation
VCSCC
Leading edge blanking time
Condition
tCSB
Preview
© Cambridge Semiconductor Ltd 2014
Typ
RCS2= 100Ω
-56
RCS2= 270Ω
-73
RCS2= 470Ω
-94
RCS2= 1000Ω
-127
Max
mV
Over-current protect
-350
-340
-330
Normal regulation
-380
-360
-340
120
TJ = 25°C
-62
See Figure 6
Page 10
-60.8
375
Unit
mV
ns
-59.6
mV
ns
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Primary Side Sensing SMPS Controller
BD PIN
Parameter
Symbol
Condition
Min
Typ
Max
Unit
BD force on current
IFON
40
mA
BD force on duration
TFON
200
ns
IBDSRCMIN
5
IBDSRCMAX
40
BD source current
BD pull down resistance
RBDOFF
BD minimum on-time
tBDONMIN
BD leakage current
IBDSLEEP
BD peak sink current
IBDSINK
VAUX = 12 V
mA
3
Ω
375
ns
In sleep mode, TJ = 50°C
1
µA
700
mA
Max
Unit
ED PIN
Parameter
Symbol
Condition
ED on-state resistance
REDONMAX
VAUX = VAUXSLEEP
ED leakage current
IEDSLEEP
ED peak sink current
IEDSINK
Preview
© Cambridge Semiconductor Ltd 2014
Min
In sleep mode, TJ = 50°C
Page 11
Typ
Ω
1.5
3
µA
700
mA
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C2175 Datasheet
Primary Side Sensing SMPS Controller
PACKAGE THERMAL RESISTANCE CHARACTERISTICS
2
1. IC mounted on typical (1oz) copper clad PCB with 164 mm ground plane surrounding GND pin(s).
2. θJB measured to GND pin terminal of device at the surface of the PCB.
Package
Junction-to-board
θJB (Typical)
Junction-to-ambient
θJA (Typical)
SOT23-6
60°C / W
170°C / W
PRODUCT VARIANTS AND ORDERING INFORMATION
PACKAGE MARKING
Dvxx
Product type
Variant code v
Manufacturing
lot code xx
PRODUCT VARIANTS AND ORDERING CODES
C2175 product variants are listed in Table 2, below, along with their specifications, package markings and
ordering codes. ICs are supplied on 13” tape and reel.
Product
Type
fMAX
(kHz)
GCAB
(%)
Package Marking
Ordering
Code
C2175
65
6
DKxx
C2175PX2-K
Table 2: C2175 Product Variants
For further package and ordering information, please contact CamSemi.
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C2175 Datasheet
Primary Side Sensing SMPS Controller
DATASHEET STATUS
The status of this Datasheet is shown in the footer.
Datasheet Status
Product Status
Nature of Datasheet Content
Product preview
In definition
and design
Target specifications for design and development of the described product.
Preliminary
In prototyping and
pre-qualification
Preliminary specifications of functionality and performance which are
supported by results from testing of initial prototypes.
Pre-production
In pre-production
and qualification
Specifications of functionality and performance which are supported by results
from testing of pre-production units.
Product data
In production
Specifications relating to functionality and performance which are supported
by results from testing of pre-production and production units.
CONTACT DETAILS
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St Andrew’s House
St Andrew’s Road
Cambridge
CB4 1DL
United Kingdom
Phone:
Fax:
Email:
Web:
+44 (0)1223 446450
+44 (0)1223 446451
[email protected]
www.camsemi.com
DISCLAIMER
The product information provided herein is believed to be accurate and is provided on an “as is” basis. Cambridge Semiconductor Ltd
(CamSemi) assumes no responsibility or liability for the direct or indirect consequences of use of the information in respect of any
infringement of patents or other rights of third parties. Cambridge Semiconductor Ltd does not grant any licence under its patent or
intellectual property rights or the rights of other parties.
Any application circuits described herein are for illustrative purposes only. In respect of any application of the product described herein
Cambridge Semiconductor Ltd expressly disclaims all warranties of any kind, whether express or implied, including, but not limited to,
the implied warranties of merchantability, fitness for a particular purpose and non-infringement of third party rights. No advice or
information, whether oral or written, obtained from Cambridge Semiconductor Ltd shall create any warranty of any kind. Cambridge
Semiconductor Ltd shall not be liable for any direct, indirect, incidental, special, consequential or exemplary damages, howsoever
caused including but not limited to, damages for loss of profits, goodwill, use, data or other intangible losses.
The products and circuits described herein are subject to the usage conditions and end application exclusions as outlined in Cambridge
Semiconductor Ltd Terms and Conditions of Sale which can be found at www.camsemi.com/legal.
Cambridge Semiconductor Ltd reserves the right to change specifications without notice. To obtain the most current product information
available visit www.camsemi.com or contact us at the address shown above.
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