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CubeComputer
General Purpose Onboard Computer
Datasheet
Electronics Systems Laboratory
Engineering Faculty
University of Stellenbosch
Private Bag X1 Matieland 7602
South Africa
Contact Us:
Phone: +27-21-808-4926
Fax: +27-21-808-4981
Email: [email protected]
URL: http//www.esl.sun.ac.za
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 2
Table of Content
1.
System Summary ............................................................................................................................................... 3
2.
Functional Description ...................................................................................................................................... 4
3.
Electrical Characteristics ................................................................................................................................... 6
4.
Waveforms........................................................................................................................................................... 7
5.
Connector Details ............................................................................................................................................10
6.
Physical Specification ......................................................................................................................................13
7.
Environmental Tests ........................................................................................................................................14
8.
Revision Record ................................................................................................................................................16
List of Acronyms/Abbreviations
ADC
ADCS
C&DH
EDAC
EEPROM
ESL
FPGA
Analog to Digital Converter
Attitude and Determination Control System
Command and Data Handling
Error Detection and Correction
Electronic Erasable Programmable Read Only Memory
Electronic Systems Laboratory
Field Programmable Gate Array
ISIS
MCU
OBC
PBH
RTC
SEL
SEU
SPI
SRAM
TT&C
UART
Inter- Integrated Circuit
Innovative Solutions in Space
Microcontroller Unit
Onboard Computer
Piggyback Header
Real-time Clock
Single Event Latchup
Single Event Upset
Serial Peripheral Interface
Static Random Access Memory
Telemetry, Tracking & Command
Universal Asynchronous Receiver/Transmitter
I 2C
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 3
1. System Summary
Application

General purpose, high performance, low power, robust nanosatellite onboard computer

Suitable for ADCS , C&DH, TT&C, mass storage and payload management
Compatibility

Conforms to CubeSat standard

Compatible with Pumpkin, ISIS, ClydeSpace & Gomspace products

Compatible with other Cube products from the ESL (CubeSense & CubeControl)
Heritage

Design based on knowledge and technology from SunSat and SumbandillaSat

To be used as ADCS OBC on multiple CubeSat missions
Features
Microcontroller

High performance, low power 32-bit ARM Cortex-M3 based MCU

4-48MHz @ 1.25-1.52 DMIPS/MHz

Internal + External Watchdog for added reliability
Memory & Storage

32 KB of EEPROM

4 MB of Flash for Code Storage

2 x 1 MB of external SRAM for Data Storage

o
Single Event Upset protection by means of an FPGA based flow-through EDAC
o
Single Event Latchup protection by detecting and isolating latchup currents
MicroSD socket for storage up to 2GB
Communication

2 x I2C interface with multi-master capabilities

1 x CAN interface capable of standard and extended data and remote frames.
Customization

Piggyback header (PBH) allows for mission specific expansion boards

PBH includes I2C, UART, SPI, 4 x ADC, 4 x PWM and GPIO interfaces

PBH can be powered from 3.3V, 5V and battery bus voltage levels
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 4
2. Functional Description
System Overview
The CubeComputer is a general purpose onboard computer intended for use on nanosatellites. It
was designed from the ground up to be fully compatible with the CubeSat standard as well as
other CubeSat subsystem from ISIS, Pumpkin, ClydeSpace, Gomspace and other ESL products.
The OBC is built around an ARM Cortex-M3 based MCU which delivers high performance at very
low power. To protect the OBC against radiation effects such as SEUs and SELs, fault tolerance
256KB
EEPROM
(Code)
4MB
Flash
(Code)
MicroSD
(Storage)
Debug
SPI
UART
EBI
CAN
MCU
Cortex-M3
2 x I2C
2 x 1MB
SRAM
(Data)
UART
SPI
4 x ADC
3 x PWM
FPGA
(EDAC)
Main Header (104-pin)
techniques have been implemented for increased reliability.
Piggyback Header
Figure 1 – CubeComputer Block Diagram
Microcontroller
The CubeComputer uses a MCU which is based on the next generation 32-bit ARM Cortex-M3
architecture and operates at 4-48 MHz delivering 1.25 DMIPS/MHz. The MCU is also optimized
towards efficiency and therefore has a very small power consumption footprint of 200uA/MHz
when executing from FLASH and 0.9uA when in deep sleep mode. The MCU also includes all the
needed on-chip peripherals for a nanosatellite onboard computer: RTC, Timers, ADC, External
Memory Interface, UART, SPI, and I2C.
To safeguard the MCU against software and hardware lock-ups an internal and external watchdog
is implemented. In the event that the lock-up is caused by a radiation induced latchup within the
MCU, a normal reset will not recover the MCU. Therefore the external watchdog power cycles the
OBC in order to remove the latchup.
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 5
Memory
The CubeComputer has an extensive memory subsystem which includes EEPROM, FLASH, SRAM
and optional microSD card storage. 32 KB of external EEPROM is used to store critical code
applications, such as a safe mode operating program, due to its resistance against radiation
effects or accidental software writes. 4 MB of external FLASH is available for additional code
storage. 2 × 1 MB of SRAM is included for data storage by the operating application. A microSD
card slot is optionally available which allow for up to 2GB of general purpose storage.
Since SRAM is especially vulnerable against the effects of radiation, such as SEU and SEL, it is
implemented externally (from the MCU) in order to effectively mitigate these single event effects.
A flow through EDAC is implemented on the external bus interface, between SRAM and MCU, to
detect up to six and correct up to 2 bit-flips per byte. The SRAM supply current is constantly
monitored in order to quickly detect a single event latchup and correct it by power cycling the
component. If it cannot be recovered, the SRAM is isolated from the bus. The redundant SRAM
configuration ensures that no data is lost when one of the SRAM modules is power cycled or
isolated.
Communication
The CubeComputer provides all the needed interfaces in order to communicate with other
subsystems in the satellite. The OBC provides two I2C channels, where one is used to interface with
the main I2C bus on the CubeSat, either as a slave or master, and another can be used to
communicate with a separate slave device(s) and/or subsystems. A CAN bus is also available for
high speed and high reliability communication on the main CubeSat header.
Customization
The CubeComputer includes a separate piggyback header which can be used to interface directly
with a mission specific expansion boards. Various interfaces (I2C, UART, and SPI) and functionality
(PWM, ADC, and GPIO) have been routed to the piggyback header which can be accessed
directly by the MCU. The piggyback header also has access to the full range of power supply
voltages: raw battery bus voltage, 5V and 3.3V supply. Examples of typical expansion board
applications include an attitude and control subsystem and/or payload interface.
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 6
3. Electrical Characteristics
Table 1 - CubeComputer Electrical Characteristics
Symbol
VCC
VR
f
TA
IO*
VI2C
RI2C
VUART
Parameter
Supply voltage
Reset Threshold
Clock Frequency
Operating Temperature
MCU†
Fibonacci
while(1)
Stop Mode
Sleep Mode
Peripheral‡
UART
CAN
ADC
EEPROM
Flash
SRAM
microSD
I2C voltage levels
I2C bitrate
UART voltage levels
* @ VCC = 3.3V, TA = 25°C
† @ 48 MHz External crystal oscillator & 14 MHz internal RC oscillator
‡
Current consumption on top of stop mode current while being used
Min
3.0
Nom
3.3
2.93
4
-10
Max
3.6
48
70
Unit
V
V
MHz
°C
mA
39 / 23
35 / 22
24 / 19
23 / 19
0
+6
+7
+4
+9
+17
+8
+8
3.3 / 5
400
3.3
+25
+15
+25
+27
+60
1000
V
kps
V
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 7
4. Waveforms
Error Detection and Correction
Figure 2 - Figure 5 shows simulated waveforms for the flow through EDAC implemented in the
FPGA. The EDAC has the capabilities to detect and correct up to two errors per byte. Three error
bit signals are output by the FPGA, if and when an error has been detected, which will generate
an interrupt to the MCU. The value of these signals can be interpreted as follows:
Table 2- Error Signal Description
Errors[0:2]
000
100
010
001
Description
No errors
Single error
Double error
Multiple errors
Figure 2 - EDAC Encoding and Decoding with No-Errors
Figure 3 – EDAC Encoding and Decoding with One Error
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 8
Figure 4 – EDAC Encoding and Decoding with Two Errors
Figure 5 – EDAC Encoding and Decoding with Multiple Errors
SRAM Latchup Response
Figure 6 – Figure 8 shows measured latchup response waveforms of the supply current for the
CubeComputer SRAM modules. During normal operation the latchup can be detected and the
module disabled within 20µs. In most cases a power cycle should be enough to remove the latch.
In order to avoid false positive latchup detection due to inrush currents (Figure 7), a blanking
period of 2ms is given before latchup detection is enabled.
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 9
Figure 6 - SRAM Latchup Response during Operation
Figure 7 - SRAM In-Rush Current when Enabled
Figure 8 - SRAM Latchup Response when Enabled
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 10
5. Connector Details
Figure 9 shows the top view of the CubeComputer preliminary PCB layout, with the connectors
indicated by the designator “P”. The description and pin out (where necessary) for all connectors
are described as follows:
Figure 9 - Top View of CubeComputer PCB Layout
P100 – connector used for programming the microcontroller (JTAG)
P101 – connector used for debug UART output.
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 11
Table 3 – Pin out for Header P101
Pin Signal Description
1
TX
Debug UART TX
2
RX
Debug UART RX
3
GND Shared ground connection
P200 – connector used for programming FPGA
P300 – microSD card slot
P500 – jumper connection to enable/disable the external watchdog timer
P600 – piggyback header used for expansion board
Table 4 – Pin out for header P600
PBH Pin
MCU Pin
Signal
Description
1,2
-
V_Bat
Battery supply from main header
3,4
-
5V_MH
5V supply from main header
5,6
-
3V3_MH
3.3V supply from main header
7
PF7
UART_RX
Miscellaneous UART RX
9
PF6
UART_TX
Miscellaneous UART TX
8
PC5
I2C_SCL
Subsystem I2C clock signal
10
PC4
I2C_SDA
Subsystem I2C data signal
11
PE5
SPI_CLK
Miscellaneous SPI clock signal
13
PE4
SPI_CS
Miscellaneous SPI chip select
15
PE7
SPI_MOSI
Miscellaneous SPI master out/slave in
17
PE6
SPI_MISO
Miscellaneous SPI master in/slave out
12,14,
16,19
PA8-10,
PB11
PWM
PWM output signals
18,20,
21,22,
24
PA11-13,
PB12,
PE0
GPIO
General purpose input/output
23
PD8
BU_VIN
This pin is used to power the backup power
domain. The backup power domain is used by the
Backup Real Time Clock.
25-28
PD4-PD7
ADC
12-bit ADC. Connected to the MCU through a
voltage follow op-amp circuit. These pins cannot
be used as GPIO pins
29,30
-
GND
*Pins 7 to 22 and 24 can all be configured as GPIOs
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 12
P601, 602 – jumper connection to select main and subsystem I2C bus voltage levels
Pin Signal Description
1-2
5V
5V I2C bus voltage level
2-3
3.3V I2C bus voltage level
3V3
H1, 2 – main CubeSatKit header (SAMTEC ESQ-126-49-G-D) used throughout CubeSat
subsystems
H2
H1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
Table 5 – Pin out for header H1
Pin
Signal
1
CANL
3
CANH
21
SUB_I2C_SCL
23
SUB_I2C_SDA
41
SYS_I2C_SDA
43
SYS_I2C_SCL
47,49,51 5V_SW
48,50,52 3V3_SW
Description
CAN bus low
CAN bus high
Subsystem I2C clock line
Subsystem I2C data line
Main CubeSat I2C data line
Main CubeSat I2C clock line
Switchable 5V supply delivered by external power system
Switchable 3V3 supply delivered by external power system
Table 6 – Pin out for header H2
Pin
25,26
27,28
29,30,32
45,46
Signal
5V
3V3
GND
V_BAT
Description
Regulated 5V supply delivered by external power
Regulated 3V3 supply delivered by external power
Unregulated battery supply delivered by external power system
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 13
6. Physical Specification
The CubeComputer PCB is designed to fit in the standard CubeSat structure. Figure 10 shows the
dimensions of the PCB, with measurements in mm.

Mass – 65.84g

PCB material – FR4
Figure 10 - Dimensions of CubeComputer PCB
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 14
7. Environmental Tests
Vibration Test
Description
A vibration test subjects a subsystem to vibrational loads of various frequencies and amplitudes.
This test is required in order to verify that the subsystem will still perform as intended after
experiencing the intense vibrations which occur during launch. Because the orientation of the
satellite in the launch vehicle is not known beforehand, the maximum loads should be tested in all
three major axes. Table 7 and Table 8 shows the specified vibration loads the CubeComputer
were subjected to for qualification tests.
Table 7 - Sine Vibration Specifications
Characteristic
Test
Directions
Profile
Frequency range [Hz]
5-10
10-15
15-20
Sweep Rate
Qualification
Required
X,Y,Z
Amplitude[g]
0.5
1.0
0.5
2 [oct/min]
Acceptance
Required
X,Y,Z
Amplitude [g]
0.4
0.8
0.4
4 [oct/min]
Qualification
Required
X,Y,Z
Amplitude[g2/Hz]
0.007
0.007
0.007 – 0.022
0.022 – 0.035
0.035
0.035 – 0.017
0.017 – 0.005
6.5 [g]
35 [sec/axis]
Acceptance
Required
X,Y,Z
Amplitude [g2/Hz]
0.004
0.004
0.004 – 0.014
0.014 – 0.022
0.022
0.022 – 0.011
0.011 – 0.00
5.2 [g]
35 [sec/axis]
Table 8 - Random vibration specifications
Characteristic
Test
Directions
Profile
Frequency range [Hz]
20 – 40
40 – 80
80 – 160
160 – 320
320 – 640
640 – 1280
1280 – 2000
RMS acceleration
Duration
For vibration testing, the following risk factors have been identified:

CubeComputer microSD card connector

CubeComputer components solder joints
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 15
Results
Post vibration test results showed no damage to the areas that were considered risk factors and
no measurable difference were noted to normal operating behavior after the vibration tests.
Heated Vacuum Test
Description
A vacuum chamber was used to test the operation of the module in a low pressure environment
similar to that found in space, which is in the order of 10-5 mbar. This low pressure can have a
variety of adverse effects on the module:

Outgassing of components

Bubbles in soldering can cause a solder connection to crack and explode

Heat dissipation through convection becomes negligible and hot spots can occur
The vacuum chamber was de-pressured to 3.5 x 10-3 mbar and the module heated to 60 °C in
order to verify the lack of any thermal hotspots.
Results
No measureable differences were detected in operating conditions during and after vacuum cycle.
The temperature of the board and components also settled close to ambient verify adequate heat
dissipation via conduction.
Part: CubeComputer
Doc: Datasheet
Ver: 1.0
Page: 16
8. Revision Record
Revision
A
B
C
D
E
F
Date
05/06/2013
20/06/2013
19/07/2013
23/07/2013
21/08/2013
18/10/2013
Author(s)
PJB
JE/PJB
PJB
PJB
PJB
PJB
Pages
ALL
ALL
14
8,9
6
4,11
G
20/12/2013
PJB
3,5
H
25/01/2014
CJG
11
Description of Change
First Draft
Language and formatting
Added heated vacuum test results
Added latchup response waveforms
Updated power consumption table
Updatead OBC block diagram
Updated piggyback header pin-out
description
Updated datasheet to correctly reflect
size of EEPROM.
Updated the piggyback pin out. Pin 23
BU_VIN used to supply power to the
real time clock.