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Transcript
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
D
D
D
D
D
Single Chip With Easy Interface Between
UART and Serial Port Connector of IBM
PC/AT  and Compatibles
Meets or Exceeds the Requirements of
ANSI Standard EIA/ TIA-232-E and ITU
Recommendation V.28
Designed to Support Data Rates Up To
120 kbps
Pinout Compatible With the SN75C185 and
SN75185
ESD Protection to 2 kV on Bus Terminals
DW OR N PACKAGE
(TOP VIEW)
VDD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
VSS
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
GND
description
The GD75232 combines three drivers and five
receivers from TI trade-standard SN75188 and
SN75189 bipolar quadruple drivers and receivers,
respectively. The pinout matches the flow-through
design of the SN75C185 to decrease the part
count, reduce the board space required, and allow
easy interconnection of the UART and serial-port
connector of an IBM PC/AT and compatibles.
The bipolar circuits and processing of the
GD75232 provides a rugged, low-cost solution for
this function at the expense of quiescent power
and external passive components relative to the
SN75C185.
The GD75232 complies with the requirements of
the EIA/TIA-232-E and ITU (formerly CCITT) V.28
standards. These standards are for data
interchange between a host computer and a
peripheral at signalling rates up to 20 kbps. The
switching speeds of the GD75232 are fast enough
to support rates up to 120 kbps with lower
capacitive loads (shorter cables). Interoperability
at the higher signalling rates cannot be assured
unless the designer has design control of the
cable and the interface circuits at both ends. For
interoperability at signalling rates up to 120 kbps,
use of ANSI EIA / TIA-423-B (ITU V.10) and
EIA/TIA-422-B (ITU V.11) standards are
recommended.
logic symbolĔ
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
logic diagram (positive logic)
RA1
RA2
RA3
DY1
DY2
RA4
The GD75232 is characterized for operation over
the temperature range of 0°C to 70°C.
DY3
RA5
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
RY1
RY2
RY3
DA1
DA2
RY4
DA3
RY5
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PC/AT is a trademark of IBM Corporation.
Copyright  1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
schematic (each driver)
To Other Drivers
VDD
11.6 kΩ
9.4 kΩ
Input DAx
75.8 Ω
320 Ω
DYx Output
4.2 kΩ
GND
To Other
Drivers
10.4 kΩ
3.3 kΩ
68.5 Ω
VSS
To Other Drivers
Resistor values shown are nominal.
schematic (each receiver)
To Other Receivers
VCC
9 kΩ
5 kΩ
1.66 kΩ
RYx Output
2 kΩ
3.8 kΩ
Input RAx
10 kΩ
GND
To Other Receivers
Resistor values shown are nominal.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
Supply voltage, VSS (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 15 V
Input voltage range, VI: Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 15 V to 7 V
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 V to 30 V
Driver output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 15 V to 15 V
Receiver low-level output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 60°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to the network ground terminal.
DISSIPATION RATING TABLE‡
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA ≤ 70°C
POWER RATING
DW
1256 mW
9.7 mW/°C
819 mW
N
1943 mW
14.9 mW/°C
1272 mW
‡ This is the inverse of the traditional junction-to-case thermal resistance (RθJA).
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage, VDD
7.5
9
15
V
Supply voltage, VSS
– 7.5
–9
– 15
V
Supply voltage, VCC
4.5
5
5.5
V
High-level input voltage, VIH (driver only)
1.9
Low-level input voltage, VIL (driver only)
High-level output current,
current IOH
Low-level output current,
current IOL
V
0.8
Driver
–6
Receiver
– 0.5
Driver
6
Receiver
16
Operating free-air temperature, TA
0
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
70
V
mA
mA
°C
3
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
supply currents over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS
All inputs
i p
at 1.9
1 9 V,
V
IDD
No
N load
l d
S
Supply
l current from
f
VDD
No
N load
l d
All inputs
at 1.9
i p
1 9 V,
V
S
Supply
l current from
f
VSS
All inputs
at 0.8
i p
0 8 V,
V
ICC
Supply current from VCC
15
VSS = – 12 V
19
VSS = – 15 V
25
VSS = – 9 V
VSS = – 12 V
4.5
VSS = – 15 V
9
VDD = 9 V,
VDD = 12 V,
VSS = – 9 V
VSS = – 12 V
– 15
VDD = 15 V,
VDD = 9 V,
VSS = – 15 V
– 25
VSS = – 9 V
VSS = – 12 V
– 3.2
VSS = – 15 V
– 3.2
VDD = 12 V,
VDD = 15 V,
No
N load
l d
No
N load
l d
VCC = 5 V,
MAX
VSS = – 9 V
VDD = 15 V,
VDD = 9 V,
All inputs
at 0.8
i p
0 8 V,
V
ISS
MIN
VDD = 9 V,
VDD = 12 V,
VDD = 12 V,
VDD = 15 V,
All inputs at 5 V,
5.5
– 19
– 3.2
No load
30
UNIT
mA
A
mA
A
mA
A
mA
A
mA
DRIVER SECTION
electrical characteristics over recommended operating free-air temperature range, VDD = 9 V,
VSS = –9 V, VCC = 5 V (unless otherwise noted)
PARAMETER
VOH
VOL
High-level output voltage
IIH
IIL
High-level input current
IOS(H)
IOS(L)
rO
TEST CONDITIONS
Low-level output voltage (see Note 2)
VIL = 0.8 V,
VIH = 1.9 V,
RL = 3 kΩ,
See Figure 1
RL = 3 kΩ,
See Figure 1
MIN
TYP
6
7.5
– 7.5
MAX
UNIT
V
–6
V
VI = 5 V,
VI = 0,
See Figure 2
10
µA
Low-level input current
See Figure 2
– 1.6
mA
High-level short-circuit output current
(see Note 3)
VIL = 0.8 V,
VO = 0,
Low-level short-circuit output current
VIH = 2 V,
VO = 0,
VCC = VDD = VSS = 0,
See Figure 1
– 4.5
– 12
– 19.5
mA
See Figure 1
4.5
12
19.5
mA
Output resistance (see Note 4)
VO = – 2 V to 2 V
300
Ω
NOTES: 2. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only (e.g., if – 10 V is maximum, the typical value is a more negative voltage).
3. Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings.
4. Test conditions are those specified by EIA /TIA-232-E and as listed above.
switching characteristics, VCC = 5 V, VDD = 12 V, VSS = –12 V, TA = 25°C
PARAMETER
tPLH
Propagation delay time, low- to
high-level output
tPHL
Propagation delay time, highto low-level output
tTLH
Transition time, low
low- to high
highlevel output
tTHL
Transition time, high
high- to low
lowlevel output
TEST CONDITIONS
kΩ CL = 15 pF
RL = 3 kΩ to 7 kΩ,
pF,
MIN
TYP
MAX
UNIT
315
500
ns
75
175
ns
See Figure 3
RL = 3 kΩ to 7 kΩ, CL = 15 pF,
See Figure 3
RL = 3 kΩ to 7 kΩ, CL = 2500 pF, See Figure 3 and Note 5
RL = 3 kΩ to 7 kΩ, CL = 15 pF,
See Figure 3
60
100
ns
1.7
2.5
µs
40
75
ns
RL = 3 kΩ to 7 kΩ, CL = 2500 pF, See Figure 3 and Note 5
1.5
2.5
µs
NOTES: 5. Measured between ± 3-V and ± 3-V points of the output waveform (EIA /TIA-232-E conditions), all unused inputs are tied either high
or low.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
RECEIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
See Figure 5
TA = 25°C
TA = 0°C to 70 °C
MIN
TYPĔ
MAX
1.75
1.9
2.3
VIT
IT+
Positive-going input threshold voltage
VIT–
Vhys
Negative-going input threshold voltage
0.75
Input hysteresis voltage (VIT + – VIT–)
0.5
VOH
High-level output voltage
IOH = – 0.5
0 5 mA
VIH = 0.75 V
Inputs open
VOL
Low-level input voltage
IIH
High-level input current
IOL = 10 mA,
VI = 25 V,
VI = 3 V
See Figure 5
3.6
See Figure 5
0.43
IIL
Low-level output current
VI = 3 V,
VI = – 25 V,
See Figure 5
– 3.6
VI = – 3 V,
See Figure 5
– 0.43
1.55
UNIT
2.3
0.97
1.25
4
5
0.2
0.45
2.6
V
V
2.6
IOS
Short-circuit output current
See Figure 4
† All typical values are at TA = 25°C, VCC = 5 V, VDD = 9 V, and VSS = – 9 V.
8.3
– 8.3
V
mA
mA
– 3.4
–12
mA
TYP
MAX
UNIT
107
250
ns
switching characteristics, VCC = 5 V, VDD = 12 V, VSS = –12 V, TA = 25°C
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low- to high-level output
tTLH
tTHL
Transition time, low- to high-level output
tPLH
tPHL
Propagation delay time, low- to high-level output
tTLH
tTHL
Transition time, low- to high-level output
Propagation delay time, high- to low-level output
CL = 50 p
pF,
F,
See Figure 6
MIN
RL = 5 kΩ,
kΩ,
Transition time, high- to low-level output
Propagation delay time, high- to low-level output
F,
CL = 15 p
pF,
See Figure 6
1 5 kΩ,
kΩ,
RL = 1.5
Transition time, high- to low-level output
42
150
ns
175
350
ns
16
60
ns
100
160
ns
60
100
ns
90
175
ns
15
50
ns
PARAMETER MEASUREMENT INFORMATION
IOS(L)
VDD
VCC
VDD
VCC
VDD or GND
IIH
– IOS(H)
VSS or GND
VI
– IIL
VI
VO
RL = 3 kΩ
VI
VSS
VSS
Figure 1. Driver Test Circuit
for VOH, VOL, IOS(H), and IOS(L)
POST OFFICE BOX 655303
Figure 2. Driver Test Circuit for IIH and IIL
• DALLAS, TEXAS 75265
5
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
PARAMETER MEASUREMENT INFORMATION
3V
1.5 V
Input
VDD
Input V
CC
1.5 V
0V
t PHL
Pulse
Generator
CL
(see Note B)
RL
See Note A
90%
Output
VSS
t PLH
50%
10%
VOH
90%
50%
10%
VOL
t THL
t TLH
TEST CIRCUIT
VOLTAGE WAVEFORMS
The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
CL includes probe and jig capacitance.
NOTES: A.
B.
Figure 3. Driver Test Circuit and Voltage Waveforms
VDD
VCC
VDD
VCC
VI
– IOH
VIT, VI
VOH
VOL
VSS
IOL
VSS
Figure 4. Receiver Test Circuit
for IOS
Figure 5. Receiver Test Circuit
for VIT, VOH, and VOL
4V
VDD
Input
50%
Input
50%
0V
VCC
t PHL
Pulse
Generator
CL
(see Note B)
RL
See Note A
90%
Output
50%
10%
t PLH
50%
10%
VSS
TEST CIRCUIT
t THL
The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
CL includes probe and jig capacitance.
Figure 6. Receiver Propagation and Transition Times
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
VOH
VOL
t TLH
VOLTAGE WAVEFORMS
NOTES: A.
B.
90%
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
TYPICAL CHARACTERISTICS
DRIVER SECTION
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
VOLTAGE TRANSFER CHARACTERISTICS
VO
VO – Output Voltage – V
9
6
3
0
–9
– 12
VDD = 9 V, VSS = – 9 V
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
8
4
0
ÎÎÎ
ÎÎÎ
–4
3-kΩ
Load Line
–8
– 12
VOH(VI = 0.8 V)
RL = 3 kΩ
TA = 25°C
– 16
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
VI – Input Voltage – V
– 20
– 16
2
– 12
Figure 7
–8
–4
0
4
8
VO – Output Voltage – V
ÁÁÁÁÁ
ÁÁÁÁÁ
ÎÎÎÎÎ
ÁÁÁÁÁ
ÎÎÎÎÎ
ÁÁÁÁÁ
1000
VDD = 9 V
VSS = – 9 V
RL = 3 kΩ
TA = 25°C
IOS(L) (VI = 1.9 V)
SR – Slew Rate – V/ µs
6
3
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÁÁ
ÎÎÎÎÎÎ
ÁÁ
0
VDD = 9 V
VSS = – 9 V
VO = 0
–3
16
SLEW RATE
vs
LOAD CAPACITANCE
12
9
12
Figure 8
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
IIOS
OS – Short-Circuit Output Current – mA
VOL(VI = 1.9 V)
12
VDD = 6 V, VSS = – 6 V
0
VDD = 9 V
VSS = – 9 V
TA = 25°C
16
–3
–6
ÎÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎ ÎÎÎÎÎ
20
VDD = 12 V, VSS = – 12 V
IO
I O – Output Current – mA
12
100
10
–6
IOS(H) (VI = 0.8 V)
–9
1
– 12
0
10
20
30
40
50
60
70
10
TA – Free-Air Temperature – °C
100
1000
10000
CL – Load Capacitance – pF
Figure 9
Figure 10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
TYPICAL CHARACTERISTICS
RECEIVER SECTION
INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE
2.4
2
2.2
1.8
V – Input Threshold Voltage – V
IT
V – Input Threshold Voltage – V
IT
INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE
VIT +
2
1.8
1.6
1.4
1.2
VIT –
1
0.8
0.6
0.4
VIT +
1.6
1.4
1.2
1
VIT–
0.8
0.6
0.4
0.2
0
10
20
30
40
50
60
0
2
70
TA – Free-Air Temperature – °C
3
Figure 11
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÁÁÁÁ
ÎÎÎÎÎ
ÁÁÁÁ
ÎÎÎÎÎ
3
ÁÁÁÁ
ÁÁÁÁ
ÎÎÎÎ
ÁÁÁ
ÎÎÎÎ
ÁÁÁ
CC = 500 pF
CC = 12 pF
2
CC = 100 pF
1
10
16
14
VDD – Maximum Supply Voltage – V
Amplitude – V
CC = 300 pF
4
9
MAXIMUM SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
VCC = 5 V
TA = 25°C
See Note A
5
5
6
7
8
VCC – Supply Voltage – V
Figure 12
NOISE REJECTION
6
4
12
10
8
6
4
2
RL ≥ 3 kΩ (from each output to GND)
0
10
40
100
400 1000
4000 10000
tw – Pulse Duration – ns
0
0
NOTE A: This figure shows the maximum amplitude of a
positive-going pulse that, starting from 0 V, does not
cause a change of the output level.
POST OFFICE BOX 655303
20
30
40
50
60
TA – Free-Air Temperature – °C
Figure 14
Figure 13
8
10
• DALLAS, TEXAS 75265
70
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
APPLICATION INFORMATION
Diodes placed in series with the VDD and VSS, leads protect the GD75232 in the fault condition in which the device
outputs are shorted to ± 15 V and the power supplies are at low and provide low-impedance paths to ground (see
Figure 15).
VDD
± 15 V
VDD
Output
GD75232
GD75232
VSS
VSS
Figure 15. Power-Supply Protection to Meet Power-Off Fault Conditions of EIA / TIA-232-E
– 12 V
TL16C450
ACE
11
RI 43
12
DTR 37
13
CTS 40
14
SO 13
15
RTS 36
16
SI 11
17
DSR 41
18
DCD 42
19
20
GND
VSS
RY5
RA5
DA3
DY3
RY4
RA4
DA2
DY2
GD75232
DA1
DY1
RY3
RA3
RY2
RA2
RY1
RA1
VCC
VDD
10
5
9
9
RI
8
DTR
7
CTS
6
TX
5
RTS
4
RX
3
DSR
2
DCD
1
C3†
EIA/TIA-232-E
DB9S
Connector
C2†
C1†
6
1
12 V
5V
Figure 16. Typical Connection
NOTE
For the most reliable operation and to avoid potential device damage, the following power-up
sequence should be followed. First, apply the VDD (+12 V) supply for 5 ms to 100 ms prior
to applying the VCC (+5V) supply. The VSS (–12 V) supply can be applied at any time during
the sequence, but the best results have been acheived when VSS is applied prior to VDD, to
bias the substrate.
The power-down sequence is the reverse of the power-up sequence. The VCC should be
removed first. Then after 5 ms to 100 ms, VDD can be removed. VSS can be removed at any
point during this sequence. But, for best results, VSS should be removed last.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
MECHANICAL INFORMATION
DW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
16 PIN SHOWN
PINS **
0.050 (1,27)
16
20
24
28
A MAX
0.410
(10,41)
0.510
(12,95)
0.610
(15,49)
0.710
(18,03)
A MIN
0.400
(10,16)
0.500
(12,70)
0.600
(15,24)
0.700
(17,78)
DIM
0.020 (0,51)
0.014 (0,35)
16
0.010 (0,25) M
9
0.419 (10,65)
0.400 (10,15)
0.299 (7,59)
0.293 (7,45)
0.010 (0,25) NOM
Gage Plane
0.010 (0,25)
1
8
0°– 8°
ā
A
0.050 (1,27)
0.016 (0,40)
Seating Plane
0.104 (2,65) MAX
0.012 (0,30)
0.004 (0,10)
0.004 (0,10)
4040000 / B 03/95
NOTES: A:
B:
C:
D:
10
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MS-013
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
GD75232
MULTIPLE RS-232 DRIVERS AND RECEIVERS
SLLS206A – MAY 1995 – REVISED SEPTEMBER 1996
MECHANICAL INFORMATION
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PIN SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23.37)
0.975
(24,77)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21.59)
0.940
(23,88)
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.035 (0,89) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0°– 15°
ā
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
0.010 (0,25) NOM
14/18 PIN ONLY
4040049/C 08/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
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Copyright  1996, Texas Instruments Incorporated