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Syllabus II Function Generation and Signal Transformation – Voltage and current ramp generation techniques: IC and devicebased approaches. – Diode shaping circuits: functional approximation, sine-wave generation. – Log and anti-log amplifier design: thermal and frequency stability; range considerations. – Analog multipliers: design alternatives; the Gilbert-cell, prewarping; linear multiplier, modulator, phase-detector. – Multiplier IC applications: AGC, division, function generation, level control. – Voltage-controlled oscillator design. – The phase-locked loop: components and operation; second-order loop analysis; applications. Lecture 4. Ramp and Signal Generation DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation Analog Signal Processing Preface In the first years of microelectronics, analog integrated circuits were mainly considered to perform calculations in the so-called analog computers. Nowadays, analog computers are completely forgotten due to the digital rivals. Moreover, a striking drop in price in digital technologies gives rise a new area : Digital Signal Processing (DSP). Digital electronics has opened many new application areas for electronics. This has increased the need for processing analog signals because our world is essentially analog and the signals coming from it are analog. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 2. This chapter deals with processing (continuous) instrumentation signals using integrated circuits (ICs) as well as discrete parts. Analog signal processing circuits are present in most applications using sensors because most sensors yield analog signals. The design of these circuits cannot be automated like that of some digital circuits. Nevertheless a systematic approach to design is still possible by first considering the nature of the signals to be processed and the process to be performed. 3. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 4. 1 ASP vs. DSP Signal Generation Analog signal processing is faster than digital signal processing but it is less flexible. Analog signal processing deals with: In this part we consider – Linear Ramp / Triangle / Sawtooth – Rectangular / Square / Pulse – Exponential – Sinusoidal – Arbitrary / Non-Linear – Controlled – adapting the amplitude, bandwidth, and impedance of signals; – converting signals from one analog domain to another; – performing operations such as addition, comparison, and synchronous detection; – analog-to-digital and digital-to analog conversion; – and minimizing interference and reducing noise , etc… Here we consider two important area of ASP : – signal generation – signal transformation DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 5. Signal Transformation DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 6. Notes Response Linearisation Range Compression Functional Inversion Logarithmic / Anti-Logarithmic Multiplication / Division Modulation DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 7. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 8. 2 Generalized Form of a Function Generator Notes Most Function Generators produces signal in three main main waveforms: triangular, square-wave and sinusoidal. Here is Generalized Form of a Function Generator External Signal Control Unit Primary Signal Generator Transformation Module(s) Output(s) Feedback Module DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 9. Exam Question 1c (2000) DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 10. Notes 1 c) Outline an approach to the generation of triangular, square and sinusoidal functions, which could be adopted by integrated circuit (IC) designers. [5 marks] Solution I1 and I2 are matched Sinecurrent sources Shaper I2 +1 I1 Control DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 11. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 12. 3 A Function Generator IC Notes VCC Buffer Amplifier I=λX X D1 D2 Vout Q2 Q1 Q3 Schmidt Trigger C Vcont Buffer Amplifier GND DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 13. Ramp approaches DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 14. Notes 1. Based on Current mirror (saw-tooth and triangular wave) 2. Bootstrap Approach (saw-tooth wave) 3. Integrator Approach (saw-tooth and triangular wave) DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 15. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 16. 4 Current mirror (simple) Notes The simplest form of current source is based on two BJTs. Q1 is diode connected forcing VCB1=0. It behaves as forward biased diode B-E. Since Q1 and Q2 have the same VEB, their collector current are equal: IC1=IC2 Summing currents on collector C1 yelds : Iref –IC1 –IB1 – IB2= Iref –IC1 –2 IC1 /βF=0 Therefore I C1 = I ref 1+ 2 / βF +VCC iref +VCE2 iC2 iC1 = IC 2 Q1 Q2 iB1 iB2 If βF is large the collector current of Q2 is nearly equal to reffrence current : VCC − VBE ( on ) I c 2 ≅ I ref = R Since current current of Q2 is is reflected in the output, this circuit is often called current mirror DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 17. Charging Cycle DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 18. Notes At Vcont=0 V Q3 is closed as well as Q1 and Q3 A constant charging current I flows through the D2 and produces a linear variation in capacitor voltage with time : VC (t ) = I ⋅ t / C VCC I=λX X D1 Vcont D2 Vout Vout Q2 Q1 C Vcont Q3 GND DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 19. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 20. 5 Current Mirror Discharge Cycle Q3 is turned ON by the rising base signal;. VE1 = VE 2 ≅ 0 The CCS current I flows in Q1 and is mirrored in Q2. The capacitor voltage falls at a rate of − I ⋅ t / C [V / s ] VCC I=λX X D1 Notes D2 Vout Vcont Q2 Q1 C Vcont Vout Q3 GND DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 21. Saw-tooth Waveform Generation DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 22. Notes The use of a linearly-controlled constant current source (I = λX) allows rising or falling ramps to be produced; complimentary sources can be used to produce triangular or sawtooth-wave generator outputs. Current control may also be used to achieve frequency or amplitude modulated triangular-wave outputs. An auxiliary discharge transistor (Q4) is often used to produce sawtooth waveforms; Q4 linearly discharges C before saturating DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 23. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 24. 6 Ramp Slope-Error Notes A circuit with an exponential response may used to generate a linear voltage ramp over a small voltage range 0 - V and time T but there will inevitably be some slope-errors = [initial slope - final slope]/[initial slope]. In this case : VC (t ) = VF [1 − exp(− t / RC )] = E [1 − exp(− t / RC )] The slope of the exponential at time t is : dVC (t ) / dt = [E / RC ]exp(− t / RC ) Hence : ε = [E / RC ][1 − exp(− t / RC )] /[E / RC ] = [1 − exp(− t / RC )] and finally ε = VC (τ ) / VF = V / VF = V / E DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 25. A Bootstrap Ramp Generator DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 26. Notes Slope-error performance may be determined either from an analysis of VC or of VO : VO (t ) = GVC (t ) = (G / C )∫ I (t )dt =(G / RC )∫ [VO (t ) + E − VC (t )]dt DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 27. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 28. 7 Bootstrap Ramp Generator But: Notes VC (t ) = VO (t ) / G therefore VO (t ) = (G / RC )∫ [VO (t ){1 − 1 / G}+ E ]dt dVO (t ) / dt = (G / RC )[VO (t ){1 − 1 / G}+ E ] Hence: If VC (0) = VO (0) = 0 and the ramp is terminated when VO=GV, then ε = (G / RC )[E − GV (1 − 1 / G ) + E ] / (EG / RC ) = = 1 / E [− GV (1 − 1 / G )] = V (1 − G ) / E Hence, the slope error is zero for G = 1, DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 29. Bootstrap Ramp Generator (shortcut) For linear ramp current charging capacitor must be constant: I C (t ) = DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 30. Notes E + VO (t ) − VC (t ) R Using: VO (t ) = G ⋅ VC (t ) Therefore the current is: I C (t ) = E + G ⋅ VC (t ) − VC (t ) E + (G − 1) ⋅ VC (t ) = R R Hence, for G = 1 the current IC(t) is time-independent: I C (t ) = E / R This circuit is non-practical due to the problems in creating floating (non-grounded) constant voltage source. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 31. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 32. 8 A Practical Approach DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation Notes 33. Design Analysis DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 34. Notes With ideal components a linear ramp will only be produced if the charging current I is maintained constant, i.e. if the voltage across R is constant. Just before the switch is opened : V2 =+E; VO=V1=0 When the switch opens, V1 and VO = GV, start to rise and D1 is immediately reverse biased - the constant voltage supply E is hence isolated from the charging circuit. During charging of C1, the current I is derived only from charge lost by C2 : ∆Q = C1 ⋅ ∆V1 = C2 ⋅ ∆V2 ; ∆V1 = V1 ∆V2 = (C1 / C2 ) ⋅ ∆V1 = V1 ⋅ (C1 / C2 ) DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 35. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 36. 9 Design Analysis (cont.) Notes Charging current is hence : I = (VO + V2 − V1 ) / R = [(G − 1)V1 + V2 ] / R Substituting for V2: V2 = GV1 = E − ∆V2 = E − V1 (C1 / C2 ) I = [(G − 1 − C1 / C2 )V1 + E ] / R For linear ramp (I = E/R) it is required that G = 1 + (C1 / C2 ) G = 1 + (R1 / R2 ) R1 / R2 = C1 / C2 DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 37. Bootstrap Ramp Generator (shortcut) DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 38. Notes For linear ramp current charging capacitor must be constant I C (t ) = VC 2 + VO (t ) − VC1 (t ) R Using: VO (t ) = G ⋅VC1 (t ) Therefore the current is: ∆Q = C1 ⋅ ∆V1 = C2 ⋅ ∆V2 ; I C (t ) = I C (t ) = E − ∆VC 2 + GVC1 (t ) − ∆VC1 (t ) R ∆V1 = V1 E − C1 / C 2VC1 + GVC1 (t ) − VC1 (t ) E + (G − C1 / C 2 − 1) ⋅ VC1 (t ) = R R Hence, the current IC(t) is time-independent if: G − C1 / C 2 − 1 = 0 or G = C1 / C 2 + 1 For C1=C2, the gain G=2 and R1=R2 DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 39. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 40. 10 A Pedestal Effect Notes DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 41. Exam Question 1a (2000) DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 42. Notes 1. (a) Outline one method of generating a linearly changing current (ramp) in an inductor assuming that the inductor has an associated series (winding) resistance. [5 marks] SOLUTION For linear current ramp I(t) = k t. Then di R V (t ) = L + i × r = kL + krt dt This represent ramp + pedestal waveform, which may be expressed as C 2 ER' kL = 2 IR' = R’ R Finally +E I C +2 L V(t) r 2I 2E = kr = C RC DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 43. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 44. 11 TTL Switching: Capacitor Discharge DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation Notes 45. Discharge Mechanism DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 46. Notes Input voltage Vs at logic low (< 0.4V). B-E junction of Q1 conducting but no collector current available – Q2 is OFF. Input voltage Vs rises to logic high (>2.4V). B-E junction of Q1 is reverse biased. B-C junction of Q1 and B-E junction of Q2 brought into conduction - IB flows. Rapid input change may create a brief rise in V1 due to interelectrode capacitance feedthrough. IC2 =I1+I rises rapidly to large constant value ( =bIB) – C1 rapidly discharged after initial turn-on delay. While VCE2=V1 > 0.2V Q2 operates in its active region and discharge is linear - saturation slows final fall. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 47. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 48. 12 TTL Switching: Ramp Initiation DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 49. Switch Turn-Off Mechanism Notes DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 50. Notes Input voltage Vs falls to < 0.4V - Emitter current of Q1, flows. Q1 draws an initial collector current from charge stored in the base of Q2 -a reverse base current IB2 IB2 is relatively large (mA) and depletes the base of Q2 turning Q2 OFF very quickly – IC2 tails from current I to 0. The effect of this sudden switching often results in some charge being drawn out of C1 – V1 falls below 0V. The initial start point of the ramp will be offset from 0V the effect increases for small values of C1. The provision of a constant charging current I causes V1 to increase linearly DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 51. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 52. 13 Design Problem A Design Problem A : – – – – Notes Design problem B: - 4V to + 4V linear voltage ramp 50 ms ramp duration 100 ms repetition period 1 kΩ output impedance Proposals A and B: – - 4V to + 4V triangular voltage – 0.5 duty cycle – 100 Hz frequency – 1 kΩ output impedance Square-wave Generator (TTL) 0–8V Ramp Generator Level Translation Square-wave Generator (TTL) 0–8V Triangular Generator Level Translation + Buffers + Buffers DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 53. Generator Design: Bootstrap Circuit DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 54. Notes Capacitor Selection : – Typically in 100 pF to 1 µF range : – With low capacitance values, long-duration ramps will require very low (< 1 µA) charging currents - R > 1 MΩ ! – If < 100 pF influence of non-linear, stray (parasitic). capacitance + leakage/bias currents affect ramp linearity. – If > 1 µF. very high discharge current may be required. Select C1 = C2 = 470 nF. Resistor Selection : (Assume E = + 12V) – As C1 = C2 , let R1 = R2 = 10 kΩ (typically) to achieve a nominal required closed-loop amplifier gain of + 2. – VO varies from 0V to 8V in 50 ms; V1 varies from 0V to 4V. – R = E· tR/C· Vmax = (12)(50 x 10-3)/(470 x l0-9)(4) = 319 kΩ – Choose R = 330 kΩ DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 55. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 56. 14 Generator Design: Switching Circuit Notes Required to discharge C1 = 470 nF from 4V to 0 in < 25 µs. Discharge current : I1 >> (4)(470 x l0-9) /(25 x 10-6) = 75mA Required output transistor current : IC2 = I1 = 100mA (» 75mA) Assuming that β2MIN (or hFE2MIN)= 100 : IBMIN = IB1MIN = IB2MIN = (100x10-3) / (100) = 1 mA Hence, the base resistance rb = [5-VBE1-VBE2]/[1x10-3] = = [ 5 - 0.6 - 0.8 ]/[1x10-3] =3.6kΩ Choose rb = 3.3 kΩ. Logic low input compatibility - Vs = 0.4V (1 STTL load = 1.6 mA): Is = IB1= [ 5 - 0.7 - 0.4 ] / [ 3.3x103 ] = 1.2 mA DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 57. Semiconductor Device Selection DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 58. Notes Amplifier : – FET or BIFET - high ZIN ; very low input bias current (< pA). – Slew Rate S » 8V / 25 µs is =0.32V/µs. – fT = (+ 2)( fX) where fX » 1 / 25 µs; preferably : – fT > (2) (10) / (25 x 10-6 ) =800 kHz. Transistors : – Switching type; high fT, low capacitance. – Pulse current capacity » 75 mA. Diode : – Switching or Schottky diode. – Pulse current capability » 75 mA. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 59. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 60. 15 Output Stage Design E Vin nR Notes R R Vout nR Typically, R =10 kΩ. With this feedback, the output resistance of the amplifier will be very small. Hence ro= 1 kΩ. The required output voltage VO is given by : Vo=VRG[{3R/(R+3R)}{1+(R/3R)}] + E[-R/3R] Vo=VRG - 4 DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 61. Design Problem B DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 62. Notes Design Specification : – – – – - 4V to + 4V triangular voltage 0.5 duty cycle 100 Hz repetition period 1 kΩ output impedance System Proposal: Square-wave Generator (TTL) 0–8V Triangular Generator Level Translation + Buffers DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 63. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 64. 16 Problem B Notes (a) The circuit on the Figure is used as triangular wave generator. I. II. Describe the performance of this circuit assuming Vcont as TTL source, Sketch the waveforms of Vout and Vcont for one cycle of Vcont.[7 marks] (b) Design the 0 to +8 V triangular generator assuming Vcont. as 100 Hz, 0.5 duty cycle TTL signal, λ = 0.1 mA/V and VCC = 12V. (c) Suggest and design a buffer circuit to transfer 0 V to +8 V triangular waveform to –4 V to+4 V signal. VCC I=λX X D1 D2 Vout Q2 Q1 C Vcont Q3 GND DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 65. Solution a(i) DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 66. Notes (i) Describe performance of this circuit assuming Vcont as TTL source, At Vcont= 0 V, Q3 is closed as well as Q1 and Q3. Charging current I flows through the D2 and produces positive linear ramp in capacitor At Vcont= 5 V, Q3 is turned ON by the rising base signal; The CCS current I flows in Q1 and is mirrored in Q2 and produces negative linear ramp in capacitor. VCC VCC I=λX X D1 I=λ X X D2 D2 D1 Vout Q2 Q1 Vcont GND Vout Q2 Q1 C Q3 Vcont C Q3 GND DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 67. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 68. 17 Solution a(ii) Notes (ii) Sketch the waveforms of Vout and Vcont for one cycle of Vcont The capacitor voltage falls at a rate of VC (t ) = I ⋅ t / C Vcont Vout DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 69. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 70. Notes Solution b (b) Design the 0 to +8 V triangular generator assuming Vcont. as 100 Hz, 0.5 duty cycle TTL signal, λ = 0. 1 mA/V and VCC = 12V. Suppose that the X input is connected to VCC = +12 V Therefore the current is I = l ⋅ X = 10 −4 A / V ⋅12V = 1.2mA the period of Vcont is 1/100 Hz =10 ms and half period is 5 ms Therefore the voltage ramp is 8V/5 ms= 1.6 V/ms On the other hand voltage rump is Thus the capacitance C is C= dVC (t ) = I /C dt I ⋅ dt 1.2mA ⋅1ms = = 3 / 4 ⋅10−6 F = 0.75µF dVC (t ) 1.6V DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 71. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 72. 18 The Integrator Approach Solution c (c) Suggest and design a buffer circuit to transfer 0 V to +8 V triangular waveform to –4 V to+4 V signal. E Vin nR R R Miller's Theorem shows that the effect of C on the input is the same as that produced by a Miller Capacitance CM across the Vout nR input terminals of the amplifier, where CM = A·C . Since the overall response is an amplified version of that of a simple low-pass R-CM , it is impossible to eliminate slope error. Input offset voltage and bias current effects further degrade performance. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 73. Exam Question 1b (2000) DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 74. Notes 1(b) In the circuit shown in Figure the output voltage of A3 is to vary between +5V and -5V with a repetition period of 2ms. If R1=R2=R3=R5=10 kΩ and R6<< R1, derive an expression for the periodic time of the output waveform and, hence, determine suitable values for C1 and R4 if the connection to R1 is set at the mid-point of R6. State clearly any analytical assumptions made. [15 marks] –15 V D1 C1 R4 D2 R1 R2 A1 D3 R3 A2 R5 A3 D4 R2 R5 R4 +15 V DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 75. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 76. 19 Solution Notes Consider first the output stage. Diode assumed ideal Vd = 0 V. Vo ⋅ R 4 15 ⋅ R5 If D3 is ON then = R 4 + R5 R 4 + R5 If Vo=5V then R4=3·R5=30kΩ. The output voltage of A1 must vary in range ± 5V. (As voltage Vo is ±5V and A2 switches at 0V). If R2 is set to provide an input is the integrator of βVo. 20 ⋅ R1 ⋅ C1 4 ⋅ R1 ⋅ C1 β ⋅ Vo = for t=T/2, i.e T = t = 10V 5β β R1 ⋅ C1 If β=0.5; T=2ms and let R1=10kΩ. i.e. –15 V D1 C1 βT 0.5 × 2 × 10 −3 C= = = 25nF 4 R1 4 × 10 −4 R4 D2 R1 R2 D3 R3 A A2 R5 A3 1 D4 R2 DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation R5 R4 +1577. V Exam Question 2b (2003s) DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 78. Notes The switch S in the circuit shown in Fig. 2 changes from position 1 to position 2 when the output voltage VO falls to -8 V. The switch returns to position 1 when VO rises to +8 V. Using superposition or otherwise, derive an expression for the capacitor charging current for each position of the switch, sketch the output voltage waveform VO and determine the frequency of oscillation of the circuit given that R = 50 kΩ, C = 10 nF and E = +4 V. R2 R2 +E [15 Marks] R2 – S + R R1 2R 1 2 2R1 R – VC + VO DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 79. DT021/4 Electronic Systems – Lecture 4: Ramp & Signal Generation 80. 20