Download MAX44205 180MHz, Low-Noise, Low-Distortion, Fully Differential

EVALUATION KIT AVAILABLE
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
General Description
The MAX44205 is a low-noise, low-distortion fully differential operational amplifier suitable for driving high-speed,
high-resolution, 20-/18-/16-bit SAR ADCs, including the
MAX11905 ADC family. Featuring a combination of wide
2.7V to 13.2V supply voltage range and wide 400MHz
bandwidth, the MAX44205 is suitable for low-power, highperformance data acquisition systems.
The MAX44205 offers a VOCM input to adjust the output common-mode voltage, eliminating the need for a
coupling transformer or AC-coupling capacitors. This
adjustable output common-mode voltage allows the
MAX44205 to match the input common-mode voltage
range of the ADC following it. A proprietary output voltage
clamping solution ensures that the buffer output does not
violate the ADC’s maximum input voltage range, even if
the MAX44205’s supply rails are higher than the ADC’s
full-scale range. Shutdown mode consumes only 6.8µA
and extends battery life in battery-powered applications
or reduces average power in systems cycling between
shutdown and periodic data readings.
The MAX44205 is available in 12-pin, 3mm x 3mm, TQFN
and 10-pin μMAX® packages and is specified for operation over the -40°C to +125°C temperature range.
Benefits and Features
●● Low Input Noise to Drive Precision SAR ADCs
• 3.1nV/√Hz at 1kHz
• 200nVP-P from 0.1Hz to 10Hz
●● High Speed for DC and AC Applications
• Gain-Bandwidth Product 400MHz
• -3dB Gain-Bandwidth Product 180MHz
• Slew Rate 180V/µs
●● Ultra-Low Distortion Drives AC Inputs to 20-Bit SAR ADCs
• HD2 = -141dB, HD3 = -146dB at fIN = 10kHz,
VOUT,DIFF = 2VP-P
• HD2 = -106dB, HD3 = -115dB at fIN = 1MHz,
VOUT,DIFF = 2VP-P
●● Output Voltage Clamping Pins Enable Low Distortion
True Rail-to-Rail ADC Input Operation
●● Wide Supply Range (2.7V to 13.2V) Drives Unipolar
or Bipolar (±6.6V) Signals
●● 3.7mA Quiescent Supply Current with Only 6.8µA
Shutdown Current
●● 12-Pin, 3mm x 3mm TQFN and 10-Pin μMAX
Packages Save Board Space
Applications
●● Single-Ended to Differential Conversion
µMAX is a registered trademark of Maxim Integrated Products, Inc.
●● High-Speed Process Control
●● Medical Imaging
●● Fully-Differential Signal Conditioning
Typical Application Circuit
Ordering Information appears at end of data sheet.
For related parts and recommended products to use with this part, refer
to www.maximintegrated.com/MAX44205.related.
3V
●● Active Filters
3.2V TO 12.6V
MAX44205 DRIVING MAX11905
IN
OUT
MAX6126
(fSAMPLE = 1Msps, fIN = 10kHz,
65,536-Point FFT)
GND
4.7nF
C0G
10µF
0.0
1kΩ
0.1%
+5V
3.3V
10Ω 0.1%
OUT+
1.5V
2.2µF
X7R
0.1µF
MAX44205
VOCM
OUTVCM
1kΩ
0.1%
-20.0
-
VCLPL
VSIG
+
VS-
-5V
1kΩ
0.1%
REFVDD VREFIN
AIN+
2.2nF
COG
10Ω 0.1%
MAX11905
AINGND
ADC INPUT FILTER
AVDD
AMPLITUDE (dBFS)
VS+
VCLPH
VSIG
+
1kΩ
0.1%
Dual ±5V Supplies
VOUTDIFF = 6VP-P
THD = -112.9dBc
SFDR = 114.7dBc
SNR = 97.5dB
SINAD = 97.3dB
-10.0
1kΩ
0.1%
3.3V
-
-30.0
-40.0
-50.0
-60.0
-70.0
-80.0
-90.0
-100.0
-110.0
-120.0
1kΩ
0.1%
4.7nF
C0G
-130.0
-140.0
0
50
100
150
200
250
300
350
FREQUENCY (kHz)
19-6951; Rev 1; 12/14
400
450
500
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Absolute Maximum Ratings
VS+ to VS-..............................................................-0.3V to +15V
All Other Pins.................................. (VS-) - 0.3V to (VS+) + 0.3V
IN+ to IN-...............................................................-0.3V to +0.3V
Continuous Input Current into Any Pin (Note 1)................±20mA
Output Short-Circuit Duration (Note 1)................................... 10s
Continuous Power Dissipation (TA = +70°C)
TQFN (derate 14.7mW/°C above +70°C)............... 1176.5mW
µMAX (derate 10.3mW/°C above +70°C).................824.7mW
Operating Temperature Range.......................... -40°C to +125°C
Junction Temperature ……………………………………...+150°C
Storage Temperature Range…………………….-65°C to +150°C
Lead Temperature (soldering, 10s)…………………………+300°C
Soldering Temperature (reflow)……………………………+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θJA)...........68°C/W
Junction-to-Case Thermal Resistance (θJC)................11°C/W
μMAX
Junction-to-Ambient Thermal Resistance (θJA)...........97°C/W
Junction-to-Case Thermal Resistance (θJC)..................5°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics (±5V Supply)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V (Note 2), RF = RG = 1kΩ, RL = 1kΩ
(between OUT+ and OUT-), TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
13.2
V
POWER SUPPLY
Supply Voltage Range
VS
Quiescent Current
IS
Power-Supply Rejection Ratio
PSRR
VS+ to VS-, guaranteed by PSRR
(GND = VS-)
2.7
No load, RL = ∞
3.7
6.8
mA
SHDN = GND
6.8
20
µA
VS+ to VS- = 2.7V to 13.2V
(GND = VS-)
90
123
dB
DIFFERENTIAL PERFORMANCE—DC SPECIFICATIONS
Input Common-Mode Range
Input Common-Mode
Rejection Ratio
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Offset Current
Open-Loop Gain
Output Short-Circuit Current
Output Voltage Swing
www.maximintegrated.com
VICM
CMRR
Guaranteed by CMRR
VICM = (VS-) + 1.1V to (VS+) - 1.1V
(VS-) + 1.1
94
(VS+) - 1.1
130
VOS
±0.2
TCVOS
0.2
V
dB
±1.5
mV
µV/°C
IB
30
750
nA
IOS
±15
±350
nA
AVOL
VOUT,DIFF = 6.6VP-P , TA = +25°C
ISC
96
130
dB
60
mA
VS+ - VOUT Applies to VOUT+, VOUT
0.98
1.15
VOUT - VS-
0.92
1.10
Applies to VOUT+, VOUT-
V
Maxim Integrated │ 2
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Electrical Characteristics (±5V Supply) (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V (Note 2), RF = RG = 1kΩ, RL = 1kΩ
(between OUT+ and OUT-), TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIFFERENTIAL PERFORMANCE—AC SPECIFICATIONS
Input Voltage-Noise Density
eN
f = 1kHz
3.1
nV/√Hz
0.1Hz < f < 10Hz
200
nVP-P
f = 1kHz
1.5
pA/√Hz
1/f Noise Due to Input Current
0.1Hz < f < 10Hz
220
pAP-P
-3dB Small-Signal Bandwidth
VOUT,DIFF = 0.1VP-P
180
MHz
0.1dB Gain Flatness Bandwidth
VOUT,DIFF = 0.1VP-P
25
MHz
-3dB Large-Signal Bandwidth
VOUT,DIFF = 2VP-P
38
MHz
0.1dB Gain Flatness Bandwidth
VOUT,DIFF = 2VP-P
19
MHz
Input Voltage Noise
Input Current-Noise Density
iN
Slew Rate (Differential)
SR
VOUT,DIFF = 2VP-P
180
V/µs
Capacitive Loading
CL
No sustained oscillations
10
pF
VOUT,DIFF = 2VP-P, f = 10kHz
-129/
-146
VOUT,DIFF = 2VP-P, f = 1MHz
-90/
-98
VOUT,DIFF = 6.6VP-P, f = 10kHz
-124/
-142
VOUT,DIFF = 6.6VP-P, f = 1MHz
-86/
-90
HD2/HD3 Specifications
Settling Time
Output Impedance
tS
ROUT,DIFF
Output Balance Error
SHDN INPUT
Input Voltage
Input Current
Settling to 0.1%, VOUT,DIFF = 4VP-P
58
Settling to 0.1%, VOUT,DIFF = 6.6VP-P
107
dBc
ns
fC = 1MHz
0.1
Ω
VOUT,DIFF = 1VP-P, f = 1MHz
-54
dB
VIH
1.25
VIL
0.65
IIH
VSHDN = 2V
IIL
VSHDN = 0V
0.2
-1.5
-0.2
1.5
V
µA
Turn-On Time
tON
Output condition
1.2
µs
Turn-Off Time
tOFF
Output condition
0.8
µs
www.maximintegrated.com
Maxim Integrated │ 3
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Electrical Characteristics (±5V Supply) (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V (Note 2), RF = RG = 1kΩ, RL = 1kΩ
(between OUT+ and OUT-), TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VCLPH INPUT to OUT+, OUT- PERFORMANCE
High-Output Clamping Voltage
Input Current
VOHCLP
ICLPH
High-side clamping: applies to OUT+ and
OUT- with outputs driven “high”,
VCLPH = +3.3V
VCLPH + 0.34
V
-38
µA
VCLPL - 0.42
V
92
µA
VCLPH = +3.3V
VCLPL INPUT to OUT+, OUT- PERFORMANCE
Low-Output Clamping Voltage
Input Current
VOLCLP
ICLPL
Low-side clamping: applies to OUT+ and
OUT- with outputs driven “low”,
VCLPL = 1.7V
VCLPL = 0V
VOCM INPUT to VOUT,CM PERFORMANCE
Input Voltage Range
Output Common-Mode Gain
Guaranteed by gain parameter
GOCM
∆(VOUT,CM)/∆(VOCM), VOCM = (VS-) + 1.2
to (VS+) - 1.2
(VS-) + 1.2
Output Common-Mode
Rejection Ratio (Note 4)
OCMRR
2 x ∆(VOS,)/∆(VOCM), VOCM = (VS-) + 1.2
to (VS+) - 1.2
V
0.99
1
1.01
V/V
±13
±38
mV
-2
-0.30
µA
100
130
dB
Input Offset Voltage
Input Bias Current
(VS+) - 1.2
-3dB Small-Signal Bandwidth
VOUT,CM = 100mVP-P
16
MHz
Slew Rate
VOUT,CM = 1VP-P
6
V/µs
Electrical Characteristics (+5V Supply)
(VS+ = +5V, VS- = 0V, VCLPH = VS+, VCLPL = VS-, VOCM = 2.5V, SHDN = VS+, GND/EP = 0V (Note 2), RF = RG = 1kΩ, RL = 1kΩ
(between OUT+ and OUT-), TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
13.2
V
POWER SUPPLY
Supply Voltage Range
VS
Quiescent Current
IS
VS+ to VS-, guaranteed by PSRR
(GND = VS-)
2.7
No load, RL = ∞
3.7
6.8
mA
SHDN = GND
5.9
20
µA
DIFFERENTIAL PERFORMANCE—DC SPECIFICATIONS
Input Common-Mode Range
Input Common-Mode
Rejection Ratio
Input Offset Voltage
Input Offset Voltage Drift
www.maximintegrated.com
VICM
CMRR
Guaranteed by CMRR
VICM = (VS-) + 1.1V to (VS+) - 1.1V
(VS-) + 1.1
94
(VS+) - 1.1
130
VOS
±0.2
TC VOS
0.2
V
dB
±1.5
mV
µV/°C
Maxim Integrated │ 4
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Electrical Characteristics (+5V Supply) (continued)
(VS+ = +5V, VS- = 0V, VCLPH = VS+, VCLPL = VS-, VOCM = 2.5V, SHDN = VS+, GND/EP = 0V (Note 2), RF = RG = 1kΩ, RL = 1kΩ
(between OUT+ and OUT-), TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)
PARAMETER
Input Bias Current
Input Offset Current
Open-Loop Gain
Output Short-Circuit Current
Output Voltage Swing
SYMBOL
CONDITIONS
MIN
IB
IOS
AVOL
VOUT,DIFF = 2.8VP-P, TA = +25°C
95
ISC
TYP
MAX
UNITS
30
750
nA
±15
±350
dB
60
mA
VS+ - VOUT Applies to VOUT+, VOUT
0.95
1.1
VOUT - VS-
0.85
1.1
Applies to VOUT+, VOUT
nA
120
V
DIFFERENTIAL PERFORMANCE—AC SPECIFICATIONS
Input Voltage-Noise Density
eN
Input Voltage Noise
Input Current-Noise Density
iN
f = 1kHz
3.1
nV/√Hz
0.1Hz < f < 10Hz
200
nVP-P
f = 1kHz
1.5
pA/√Hz
1/f Noise Due to Input Current
0.1Hz < f < 10Hz
220
pAP-P
-3dB Small-Signal Bandwidth
VOUT,DIFF = 0.1VP-P
180
MHz
0.1dB Gain Flatness Bandwidth
VOUT,DIFF = 0.1VP-P
25
MHz
-3dB Large-Signal Bandwidth
VOUT,DIFF = 2VP-P
38
MHz
0.1dB Gain Flatness Bandwidth
VOUT,DIFF = 2VP-P
19
MHz
Slew Rate (Differential)
SR
VOUT,DIFF = 2VP-P
120
V/µs
Capacitive Loading
CL
No sustained oscillations
10
pF
VOUT = 4VP-P, f = 10kHz
-123/
-145
VOUT = 4VP-P, f = 1MHz
-88.5/
-95.5
HD2/HD3 Specifications
Settling Time
Output Impedance
tS
ROUT,DIFF
Output Balance Error
SHDN INPUT
Input Voltage
Input Current
Settling to 0.1%, VOUT,DIFF = 4VP-P
58
Settling to 0.1%, VOUT,DIFF = 6.6VP-P
100
dBc
ns
fC = 1MHz (VOUT,DIFF)
0.1
Ω
VOUT,DIFF = 1VP-P, f = 1MHz
-52
dB
VIH
1.25
VIL
0.65
IIH
VSHDN = 2V
IIL
VSHDN = 0V
0.2
-1.5
-0.2
1.5
V
µA
Turn-On Time
tON
Output condition
1.2
µs
Turn-Off Time
tOFF
Output condition
0.8
µs
www.maximintegrated.com
Maxim Integrated │ 5
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Electrical Characteristics (+5V Supply) (continued)
(VS+ = +5V, VS- = 0V, VCLPH = VS+, VCLPL = VS-, VOCM = 2.5V, SHDN = VS+, GND/EP = 0V (Note 2), RF = RG = 1kΩ, RL = 1kΩ
(between OUT+ and OUT-), TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VCLPH INPUT to OUT+, OUT- PERFORMANCE
High-Output Clamping Voltage
Input Current
VOHCLP
ICLPH
High-side clamping: applies to OUT+
and OUT- with outputs driven “high”,
VCLPH = 3.3V
VCLPH + 0.39
V
-45
µA
VCLPL - 0.42
V
85
µA
VCLPH = 3.3V
VCLPL INPUT to OUT+, OUT- PERFORMANCE
Low-Output Clamping Voltage
Input Current
VOLCLP
ICLPL
Low-side clamping: applies to OUT+ and
OUT- with outputs driven “low”, VCLPL =
1.7V
VCLPL = 0V
VOCM INPUT to VOUT,CM PERFORMANCE
Input Voltage Range
Output Common-Mode Gain
Guaranteed by gain parameter
GOCM
∆(VOUT,CM)/∆(VOCM), VOCM = (VS-) + 1.2
to (VS+) - 1.2
(VS-) +1.2
0.99
Input Offset Voltage
Input Bias Current
Output Common-Mode
Rejection Ratio (Note 4)
OCMRR
2 x ∆(VOS,)/∆(VOCM),
VOCM = (VS-) + 1.2 to (VS+) - 1.2
(VS+)-1.2
V
1
1.01
V/V
±13
±38
mV
-2
-0.3
µA
90
130
dB
-3dB Small-Signal Bandwidth
VOUT,CM = 100mVP-P
16
MHz
Slew Rate
VOUT,CM = 1VP-P
6
V/µs
Note 2: GND and EP are internally shorted. GND pin is only present on the 12-pin TQFN package and GND is the exposed pad on
the 10-pin µMAX package.
Note 3: All devices are 100% production tested at TA = +25°C. Temperature limits are guaranteed by design.
Note 4: OCMRR is mainly determined by external gain resistors matching. The formula used for OCMRR calculation assumes that
gain resistors are perfectly matched. Therefore, OCMRR = (1 + RF/RG) x ∆VOS/∆V(VOCM).
www.maximintegrated.com
Maxim Integrated │ 6
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
5
4.6
TA = +125°C
4.5
3
SUPPLY CURRENT (mA)
3.5
TA = -40°C
2.5
2
1.5
1
VS+ = +2.5V
VS- = -2.5V
4
VS+ = +1.5V
VS- = -1.5V
3.8
3.6
3.4
3.2
0.5
2.5
5
7.5
10
12.5
3
15
-50
-25
0
SUPPLY VOLTAGE (V)
100
125
6.8
VS+ = +5V
VS- = -5V
6.6
6.4
VS+ = +2.5V
VS- = -2.5V
6.2
6
5.8
150
-50
-25
-25
0
25
50
75 100
TEMPERATURE (°C)
125
6
4
150
260
240
Vs = +2.5V
Vs- = -2.5V
Vs+ = +5V
Vs- = -5V
220
-50
-25
0
25
50
75
TEMPERATURE (°C)
www.maximintegrated.com
100
125
150
-0.8 -0.6 -0.4 -0.2 0
0.2 0.4 0.6
INPUT OFFSET VOLTAGE (μV)
260
TA = -40°C
-0.2
-0.3
-0.4
TA = +125°C
-0.5
-0.6
-6
-4
toc06
TA = +125°C
220
TA = -40°C
2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5 12.5 13.5
toc09a
2
Vs+ = +2.5V
Vs- = -2.5V
1.5
-0.1
-0.7
150
INPUT OFFSET VOLTAGE CHANGE OVER
TEMPERATURE vs. VICM
TA = +25°C
0
125
SUPPLY VOLTAGE (V)
0.2
0.1
100
240
200
0.8
toc08
0.3
INPUT OFFSET VOLTAGE VARIATION (mV)
Vs+ = +1.5V
Vs- = -1.5V
280
75
280
INPUT OFFSET VOLTAGE VARIATION
vs. VOCM
toc07
50
TA = +25°C
TA = +25°C
8
0
25
IIN+, IN- INPUT OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
toc05
2
-50
0
TEMPERATURE (°C)
HISTOGRAM
10
300
INPUT OFFSET VOTLAGE (µV)
75
INPUT OFFSET VOLTAGE (IN+, IN-)
HISTOGRAM
12
VS+ = +5V
VS- = -5V
OCCURRENCE (N)
VOS (µV)
toc4
INPUT OFFSET VOLTAGE (IN+, IN-)
vs. TEMPERATURE
200
50
7
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (IN+, IN-)
vs. TEMPERATURE (100 UNITS)
1500
1300
1100
900
700
500
300
100
-100
-300
-500
-700
-900
-1100
-1300
-1500
25
INPUT OFFSET VOTLAGE (µV)
0
toc03
7.2
INPUT OFFSET VOLTAGE DRIFT
OVER TEMPERATURE (µV)
0
4.2
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
toc02
VS+ = +5V
VS- = -5V
4.4
TA = +25°C
4
SUPPLY CURRENT(mA)
SUPPLY CURRENT
vs. TEMPERATURE
toc01
SHUTDOWN SUPPLY CURRENT (µA)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
-2
0
VOCM (V)
2
4
6
TA = +125°C
1
TA = +25°C
0.5
0
-0.5
-1
-1.5
TA = -40°C
-1.6
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1.6
VICM (V)
Maxim Integrated │ 7
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
INPUT OFFSET VOLTAGE CHANGE OVER
TEMPERATURE vs. VICM
INPUT OFFSET VOLTAGE CHANGE OVER
TEMPERATURE vs. VICM
1.5
INPUT OFFSET VOLTAGE DRIFT
OVER TEMPERATURE (µV)
2
INPUT OFFSET VOLTAGE DRIFT
OVER TEMPERATURE (µV)
2
VS+ = +1.35V
VS- = -1.35V
TA = -40°C
TA = +25°C
1
0.5
0
-0.5
-1
-0.3
-0.2
-0.1
1.5
14
TA = +125˚C
0.5
0
-0.5
TA = -40˚C
0
0.1
0.2
0.3
-2
OUTPUT VOCM ERROR OVER TEMPERATURE (mV)
6
0
-4.2
-3
-1.8
-0.6
0.6
1.8
3
-25 -23 -21 -19 -17 -15 -13 -11 -9
4.2
VOCM ERROR OVER TEMPERATURE
vs. VOCM INPUT
toc11
60
SUPPLY
VOCM
VOCMRANGE
RANGE
VOLTAGE
= =-0.5V
-4V
: 3Vto +4V
+0.5V
50
VS+ = +5V
VS- = -5V
40
TA = -40˚C
INCREASED
SCALE
30
20
TA = +25˚C
TA = +125˚C
10
0
-10
-20
-4.2
-3
-1.8
-0.6
0.6
1.8
3
4.2
SUPPLY
VOCM
VOCMRANGE
RANGE
VOLTAGE
= =-0.5V
-4V
: 3Vto +0.5V
+4V
VS+ = +5V
VS- = -5V
TA = -40˚C
50
40
30
20
TA = +125˚C
10
0
-20
3
3.2
SUPPLY
VOCM RANGE
VOLTAGE
= -1.5V
-0.5V
: 3Vto +1.5V
+0.5V
Vcc+ = +2.5V
Vcc- = -2.5V
TA = -40˚C
30
TA = +25˚C
TA = +125˚C
0
-10
-20
-1.6
-1.2
-0.8
-0.4
0
0.4
0.8
INPUT VOCM VOLTAGE (V)
3.6
3.8
4
4.2
VOCM ERROR OVER TEMPERATURE
vs. VOCM INPUT
INCREASED
SCALE
40
10
3.4
INPUT VOCM VOLTAGE (V)
toc11b
20
TA = +25˚C
-10
1.2
1.6
OUTPUT VOCM ERROR OVER TEMPERATURE (mV)
50
-5
VOCM ERROR OVER TEMPERATURE
vs. VOCM INPUT
toc11a
60
VOCM ERROR OVER TEMPERATURE
vs. VOCM INPUT
60
-7
OUTPUT COMMON-MODE VOLTAGE ERROR (mV)
VICM (V)
INPUT VOCM VOLTAGE (V)
OUTPUT VOCM ERROR OVER TEMPERATURE (mV)
8
2
VICM (V)
www.maximintegrated.com
10
4
-1
0.4
toc10
TA = +25˚C
VOCM = 0V
12
TA = +25˚C
1
-1.5
TA = +125°C
-0.4
Vs+ = +5V
Vs- = -5V
OUTPUT VOCM ERROR OVER TEMPERATURE (mV)
2.5
OUTPUT COMMON-MODE
VOLTAGE ERROR HISTOGRAM
toc09c
OCCURRENCE (N)
toc09b
60
50
toc11b
SUPPLY
VOCM
VOCMRANGE
RANGE
VOLTAGE
==-0.5V
1.2V
: 3Vto +0.5V
1.5V
Vcc+ = +2.5V
Vcc- = -2.5V
TA = -40˚C
40
30
20
TA = +25˚C
10
TA = +125˚C
0
-10
-20
1.2
1.3
1.4
1.5
1.6
INPUT VOCM VOLTAGE (V)
Maxim Integrated │ 8
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
INPUT BIAS CURRENT (IN+/IN-)
vs. INPUT COMMON-MODE VOLTAGE
OUTPUT VOCM ERROR vs. TEMPERATURE
-12
-12.4
-12.6
Vs+ = +2.5V
Vs- = -2.5V
-12.8
-13
-13.2
-13.4
-13.6
-14
-50
-25
0
25
40
TA = +125˚C
30
20
TA = +25˚C
10
50
75
100
125
150
-4
-3
-2
-1
0
1
2
3
-50
-80
-110
-200
4
-50
-25
0
INPUT COMMON-MODE RANGE VICM (V)
INPUT OFFSET CURRENT (IN+/IN-) vs.
TEMPERATURE (100 UNITS)
OCCURRENCE (N)
75
50
IOS (nA)
75
100
125
150
TA = +25˚C
30
100
25
0
-25
-50
25
20
15
10
-75
-100
5
-125
-50
-25
0
25
50
75 100
TEMPERATURE (°C)
125
0
150
-50 -40 -30 -20 -10
VOCM INPUT BIAS CURRENT (µA)
-0.05
TA = -40˚C
-0.2
-0.25
-0.3
TA = +25˚C
-0.4
-0.45
-4.2
-3
-1.8
-0.6
0.6
1.8
INPUT VOCM VOLTAGE (V)
VOCM = 4V
-0.1
-0.15
-0.2
-0.25
VOCM = 3.5V
-0.3
-0.35
-0.4
TA = +125˚C
3
4.2
toc17
0
-0.1
-0.35
10 20 30 40 50
VOCM INPUT BIAS CURRENT
vs. TEMPERATURE
toc16
-0.05
-0.15
0
INPUT OFFSET CURRENT (nA)
VOCM INPUT BIAS CURRENT
vs. VOCM INPUT VOLTAGE
-0.5
50
toc15
35
125
-150
25
TEMPERATURE (°C)
INPUT OFFSET CURRENT HISTOGRAM
toc14b
150
VOCM INPUT BIAS CURRENT (µA)
10
-20
-170
TA = -40˚C
TEMPERATURE (°C)
www.maximintegrated.com
40
-140
-10
-20
Vs+ = +5V
Vs- = -5V
VICM = 0V
70
0
Vs+ = +5V
Vs- = -5V
-13.8
50
INPUT BIAS CURRENT (IN+/IN-)
vs. TEMPERATURE
toc14a
100
Vs+ = +5V
Vs- = -5V
60
INPUT BIAS CURRENT (nA)
OUTPUT VOCM ERROR (mV)
70
VOCM INPUT= 0V
-12.2
toc13
INPUT BIAS CURRENT (nA)
toc12
-0.45
VOCM = 0V
-50
-25
0
25
50
75
100
125
150
TEMPERATURE (°C)
Maxim Integrated │ 9
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
RLOAD
RLOAD ==200Ω
200Ω
0.8
RLOAD
RLOAD ==1kΩ
1kΩ
0.4
Vs+ = +1.5V
Vs- = -1.5V
0
-50
-25
0
25
50
75
100
125
0.8
0.2
Vs+ = +2.5V
Vs- = -2.5V
-50
-25
0
VOL vs. TEMPERATURE
vs. LOAD RESISTOR
0.8
RLOAD = 1kΩ
0.4
0.2
0
-25
0
25
50
75
100
125
150
0.6
RLOAD = 10kΩ
0.4
VOUT-
0.29
Vs+ = +5V
Vs- = -5V
3.1
3.2
3.3
3.4
VCLPH INPUT VOLTAGE (V)
www.maximintegrated.com
-50
-25
0
-25
0
25
RLOAD = 1kΩ
50
75
100
125
1.2
3.5
3.6
0.37
VOUT-
0.34
0.33
0.32
Vs+ = +5V
Vs- = -5V
0.31
0.3
3
3.1
3.2
3.3
100
125
150
3.4
VCLPH INPUT VOLTAGE (V)
toc19c
RLOAD = 200Ω
0.8
0.6
RLOAD = 10kΩ
0.4
RLOAD = 1kΩ
SHORT-CIRCUIT PROTECTION OCCURS AT
RLOAD = 200Ω at 125°C
-50
-25
0
25
50
75
100
125
150
TEMPERATURE (ᵒC)
TA = -40˚C
VOUT+
0.35
75
1
0
150
0.38
0.36
50
1.4
0.2
toc20b
0.4
0.39
25
1.6
OUT+ AND OUT- POSITIVE CLAMPING VOLTAGE
ERROR vs. VCLPH INPUT VOLTAGE
OUT+ AND OUT- POSITIVE CLAMPING VOLTAGE
ERRROR vs. VCLPH INPUT VOLTAGE
OUTPUT POSITIVE CLAMPING VOLTAGE ERROR (V)
OUTPUT POSITIVE CLAMPING VOLTAGE ERROR (V)
TA = +25˚C
VOUT+
3
Vs+ = +5V
Vs- = -5V
VOL vs. TEMPERATURE
vs. LOAD RESISTOR
Vs+ = +2.5V
Vs- = -2.5V
-50
RLOAD = 1kΩ
0.4
TEMPERATURE (ᵒC)
0.33
0.25
RLOAD = 10kΩ
0.6
TEMPERATURE (ᵒC)
0.8
0
toc20a
0.37
0.27
150
1
OUT+ AND OUT- POSITIVE CLAMPING VOLTAGE
ERROR vs. VCLPH INPUT VOLTAGE
0.31
125
1
0.8
0
RLOAD = 200Ω
TEMPERATURE (ᵒC)
0.35
100
0.2
Vs+ = +1.5V
Vs- = -1.5V
-50
75
1.2
0.2
toc19b
1.2
OUTPUT VOLTAGE HIGH VOH (V)
OUTPUT VOLTAGE HIGH VOL (V)
RLOAD = 200Ω
RLOAD = 10kΩ
50
1.4
VOL vs. TEMPERATURE
vs. LOAD RESISTOR
toc19a
1.2
0.6
25
toc18c
RLOAD = 200Ω
TEMPERATURE (ᵒC)
TEMPERATURE (°C)
1
RLOAD
RLOAD ==1kΩ
1kΩ
0.4
0
150
RLOAD
RLOAD ==10kΩ
10kΩ
0.6
OUTPUT VOLTAGE HIGH VOH (V)
0.2
1
VOH vs. TEMPERATURE
vs. LOAD RESISTOR
1.6
RLOAD = 200Ω
3.5
3.6
OUTPUT POSITIVE CLAMPING VOLTAGE ERROR (V)
RLOAD
RLOAD ==10kΩ
10kΩ
0.6
toc18b
1.2
OUTPUT VOLTAGE HIGH VOH (V)
OUTPUT VOLTAGE HIGH VOH (V)
1.2
1
VOH vs. TEMPERATURE
vs. LOAD RESISTOR
toc18a
OUTPUT VOLTAGE HIGH VOH (V)
VOH vs. TEMPERATURE
vs. LOAD RESISTOR
toc20c
0.32
VOUT+
TA = +125˚C
0.3
0.28
VOUT-
0.26
0.24
0.22
Vs+ = +5V
Vs- = -5V
3
3.1
3.2
3.3
3.4
3.5
3.6
VCLPH INPUT VOLTAGE (V)
Maxim Integrated │ 10
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
TA = +25˚C
0.435
VOUT+
0.43
0.425
0.42
0.415
VOUT-
0.41
0.405
-0.4
-0.2
0
0.2
0.4
0.455
0.445
0.44
0.43
Vs+ = +5V
Vs- = -5V
0.425
0.42
-0.4
-0.2
0
0.2
VCLPL INPUT VOLTAGE (V)
VCLPH = 3.3V
-30
-40
-50
Vs+ = +5V
Vs- = -5V
-50
-25
0
50
75
100
125
-20
-30
CLP
CLPH
3.3V
VVCLP
++==3.3V
-40
-50
-70
150
350
-50
-25
0
200
150
100
50
-25
0
25
50
75
100
SHDN INPUT VOLTAGE (V)
www.maximintegrated.com
VCLPH = 3V
25
50
75
100
125
VOUT-
0.395
0.39
Vs+ = +5V
Vs- = -5V
-0.4
-0.2
125
150
0.98
0.97
0.96
VSHDNTH+
0.95
0.94
0.93
0.92
VSHDNTH-
0.91
-50
-25
0
0.2
0.4
toc23a
VSHDN = 0V
-100
-150
-200
-50
-25
25
50
75
TEMPERATURE (°C)
0
25
50
75
100
125
150
SHDN INPUT VOLTAGE (V)
Vs+ = +5V
Vs- = -5V
0.99
0.9
0
-50
-300
150
SHDN INPUT THRESHOLD VOLTAGE
vs. TEMPERATURE
toc24a
1
SHDN INPUT THRESHOLD VOLTAGE (V)
SHDN INPUT CURRENT (nA)
toc23b
250
-50
0.4
TEMPERATURE (°C)
VSHDN = 2V
300
0.405
-250
Vs+ = +2.5V
Vs- = -2.5V
TEMPERATURE (°C)
SHDN INPUT CURRENT
vs. SHDN INPUT VOLTAGE
VCLPH = 5V
VCLPH = 3.6V
-60
VCLPH = 3V
25
-10
VOUT+
0.41
0
SHDN INPUT CURRENT (nA)
VCLPH = 3.6V
-20
0.415
SHDN INPUT CURRENT
vs. SHDN VOLTAGE vs. TEMPERATURE
toc22b
10
VCLPH INPUT CURRENT (µA)
VCLPH = 5V
TA = +125˚C
VCLPL INPUT VOLTAGE (V)
0
-10
0
0.4
toc21c
0.42
VCLPH INPUT CURRENT vs. TEMPERATURE
toc22a
0
VCLPH INPUT CURRENT (µA)
VOUT-
0.435
VCLPH INPUT CURRENT vs. TEMPERATURE
-60
VOUT+
0.45
VCLPL INPUT VOLTAGE (V)
10
TA = -40˚C
100
125
150
SHDN INPUT THRESHOLD VOLTAGE
vs. TEMPERATURE
toc24b
1
SHDN INPUT THRESHOLD VOLTAGE (V)
0.4
Vs+ = +5V
Vs- = -5V
toc21b
0.46
OUTPUT POSITIVE CLAMPING VOLTAGE ERROR (V)
toc21a
0.44
OUT+ AND OUT- POSITIVE CLAMPING VOLTAGE
ERROR vs. VCLPL INPUT VOLTAGE
OUT+ AND OUT- POSITIVE CLAMPING VOLTAGE
ERROR vs. VCLPL INPUT VOLTAGE
OUTPUT POSITIVE CLAMPING VOLTAGE ERROR (V)
OUTPUT POSITIVE CLAMPING VOLTAGE ERROR (V)
OUT+ AND OUT- POSITIVE CLAMPING VOLTAGE
ERROR vs. VCLPL INPUT VOLTAGE
Vs+ = +2.5V
Vs- = -2.5V
0.99
0.98
0.97
0.96
VSHDNTH+
0.95
0.94
0.93
0.92
VSHDNTH-
0.91
0.9
-50
-25
0
25
50
75
100
125
150
TEMPERATURE (°C)
Maxim Integrated │ 11
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
20
15
10
5
2.5
4.5
6.5
8.5
10.5
90
80
70
60
50
40
12.5
Vs+ = +2.5V
Vs- = -2.5V
-50
-25
0
100
125
-60
-70
Vs+ = +2.5V
Vs- = -2.5V
-50
-25
0
-20
VOUTDIFF = 0.1VP-P
VS+ = +5V,
VS- = -5V
-4
-6
MAGNITUDE (dB)
VOUTDIFF = 0.1VP-P
GAIN = 1V/V
75
100
125
150
toc29
0
-2
0
50
SMALL-SIGNAL GAIN vs. FREQUENCY
0
VOUTDIFF = 0.1VP-P
GAIN = 10V/V
25
5
2
-10
-50
TEMPERATURE (°C)
4
10
-40
-80
150
toc28
MAGNITUDE (dB)
MAGNITUDE (dB)
75
toc27
20
-8
-10
-12
VOUTDIFF = 0.1VP-P
VOCM = 1.65V (BLACK TRACE),
VOCM = 0V (RED TRACE)
-5
-10
-15
-14
-20
-16
-30
-18
0.01
1
100
10000
-20
1000000
0.01
1
FREQUENCY (kHz)
SMALL-SIGNAL GAIN vs. FREQUENCY
MAGNITUDE (dB)
VOUTDIFF = 0.1VP-P
ENTER
TEXTTRACE),
CLOAD = 10pF
(BLACK
HERE (RED TRACE)
CLOAD = NO LOAD
-15
100
FREQUENCY (kHz)
www.maximintegrated.com
1
0
VOUTDIFF = 2VP-P
GAIN = 10V/V
5
0
-5
VOUTDIFF = 2VP-P
GAIN = 1V/V
10000
1000000
-20
1000000
LARGE-SIGNAL GAIN vs. FREQUENCY
-2
10
100
10000
FREQUENCY (kHz)
toc32
2
15
VOUTDIFF = 2VP-P,
VOCM = 1.65V
-4
-6
-8
-10
-12
-15
1
0.01
20
-10
-20
0.01
-25
1000000
toc31
25
0
-10
10000
LARGE-SIGNAL GAIN vs. FREQUENCY
toc30
-5
100
FREQUENCY (kHz)
5
MAGNITUDE (dB)
50
VOCM = 0V,
VIN+ = VIN- = 0V,
OUT+ SHORTED TO VS+
Vs+ = +5V
Vs- = -5V
SMALL-SIGNAL GAIN vs. FREQUENCY
SMALL-SIGNAL GAIN vs. FREQUENCY
30
-25
25
toc26b
-30
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
-40
VOCM = 0V,
VIN+ = VIN- = 0V,
OUT+ SHORTED TO VS-
Vs+ = +5V
Vs- = -5V
MAGNITUDE (dB)
0
OUTPUT SHORT-CIRCUIT CURRENT
vs. TEMPERATURE
toc26a
100
SHORT-CIRCUIT CURRENT (mA)
INPUT OFFSET VOLTAGE (uV)
25
OUTPUT SHORT-CIRCUIT CURRENT
vs. TEMPERATURE
toc25
SHORT-CIRCUIT CURRENT (mA)
INPUT OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
-14
0.01
1
100
FREQUENCY (kHz)
10000
1000000
-16
0.01
1
100
10000
FREQUENCY (kHz)
1000000
Maxim Integrated │ 12
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
MAGNITUDE (dB)
-6
-8
-10
-12
VOUTDIFF = 2VP-P
CF = NO CAP, 10pF
CF is Feedback Capacitor
-10
-15
0.01
1
100
10000
FREQUENCY (kHz)
-30
1000000
MAGNITUDE (dB)
MAGNITUDE (dB)
BLACK TRACE:
VOCMIN = 100mVP-P
RED TRACE:
VOCMIN = 10mVP-P
-40
1
100
1
100
10000
-10
-20
-20
-40
-30
VS+ = +2.5V
VS- = -2.5V
-40
-70
1000000
VS+ = +5V
VS- = -5V
0.01
1
100
-10
MAGNITUDE (dB)
MAGNITUDE (dB)
BLACK
TRACE
VS+ = +2.5V
VS- = -2.5V
-30
-40
RED
TRACE
VS+ = +5V
VS- = -5V
-60
-70
0.01
1
100
FREQUENCY (kHz)
www.maximintegrated.com
1000000
toc38
BLACK
TRACE
VS+ = +2.5V
VS- = -2.5V
-80
-100
RED TRACE
VS+ = +5V
VS- = -5V
-120
-140
10000
1000000
toc40
0.01
1
100
PHASE
-90
140
GAIN
30
1
100
80
CROSSOVER POINT:
GAIN = 0
FREQUENCY = 400MHz
PHASE = 87°(rad)
0
10000
120
100
20
10
PSRR+
200
160
40
FREQUENCY (kHz)
1000000
180
50
-70
0.01
10000
UNITY-GAIN BANDWIDTH AND PHASE
vs. FREQUENCY
toc41
60
PSRR-
-110
1000000
FREQUENCY (kHz)
-50
-130
10000
VIN = 1VP-P
RF = 1kΩ , RG = 10Ω
-60
VS+ = +5V
VS- = -5V
-30
0
-50
10000
PSRR+ vs. FREQUENCY
toc39
VIN = 1VP-P
RF = RG = 1kΩ MATCHED 0.1% RESISTORS
-20
100
FREQUENCY (kHz)
VOCM OUTPUT AC CMRR
vs. FREQUENCY
-10
1
INPUT AC CMRR vs. FREQUENCY
0
MAGNITUDE (dB)
10
0.01
FREQUENCY (kHz)
VIN = 1VP-P
-60
0.01
1000000
toc37
FREQUENCY (kHz)
20
10000
-50
-50
-60
VOUTDIFF = 1VP-P
OUTPUT BALANCE ERROR vs. FREQUENCY
-10
-30
VOUTDIFF = 2VP-P
-0.2
-0.5
0.01
0
VS+ = +5V
VS- = -5V
-20
0
-0.1
FREQUENCY (kHz)
toc36
0
0.1
-0.4
VOCM RESPONSE vs. FREQUENCY
10
0.2
-0.3
-25
MAGNITUDE (dB)
-16
VOUTDIFF = 0.5VP-P
0.3
VOUTDIFF = 2VP-P
CLOAD = 0pF, 10pF
-5
-20
-14
toc35
0.4
0
CF=10pF
-4
-18
0.5
MAGNITUDE (dB)
-2
MAGNITUDE (dB)
5
CF = NO LOAD
0
toc34
-10
RF = 1kΩ , RG = 10Ω
0.01
1
100
10000
FREQUENCY (kHz)
60
PHASE (radians)
toc33
2
LARGE-SIGNAL GAIN FLATNESS
vs. FREQUENCY
LARGE-SIGNAL GAIN vs. FREQUENCY
LARGE-SIGNAL GAIN vs. FREQUENCY
40
20
0
1000000
Maxim Integrated │ 13
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
INPUT CURRENT-NOISE
DENSITY
MAGNITUDE
(dB)(pA/√Hz)
BLACK TRACE:
VOCMIN = 100mVP-P
-20
-30
10
RED TRACE:
VOCMIN = 10mVP-P
-40
-50
-60
0.01
1
0.1
1
1
100
10000
FREQUENCY (kHz)
10
100
1000
1000000
VIN = 1VP-P
-30
VS+ = +2.5V
VS- = -2.5V
10-40
-50
VS+ = +5V
VS- = -5V
-60
0.01
1
0.1
VOUTDIFF = 2VP-P
FREQUENCY (kHz)
1
10
100
1000
10000 100000
toc46
-60
HD2,1k load
-100
HD2, no load
-120
-140
100
1000
HD2, no load
-100
HD3, No load
HD3, 1K load
-140
10000
10
100
1000
INPUT FREQUENCY (kHz)
toc48
HD2 AND HD3 vs. FREQUENCY
0
1000000
10000
toc47
VOUTDIFF = 6.6VP-P
-60
HD2,1k load
-80
HD2, no load
-100
-120
-160
10000
HD3, No load
HD3, 1k load
10
100
1000
10000
INPUT FREQUENCY (kHz)
HD3 vs. OUTPUT SWING
0
fIN = 11.5MHz
-20
toc49
fIN = 11.5MHz
-20
-40
MAGNITUDE (dB)
-40
MAGNITUDE (dB)
10000
100 100
1000
FREQUENCY (kHz)
INPUT FREQUENCY (kHz)
-140
HD2 vs. OUTPUT SWING
0
-60
-80
fIN = 1MHz
-100
fIN = 100kHz
1
2.4
-60
fIN = 1MHz
-80
-100
fIN = 100kHz
-120
fIN = 10kHz
-120
fIN = 10kHz
-140
3.8
5.2
OUTPUT VOLTAGE SWING (VP-P)
www.maximintegrated.com
1
-20
HD2, 1K load
INPUT FREQUENCY (kHz)
-140
RF = 1kΩ , RG = 10Ω
60
HD3, No load
40
HD3,1k load
20
-40
-80
-160
10
FREQUENCY = 400MHz
PHASE = 87°(rad)
0
-60
-120
HD3, No load
HD3,1k load
80
CROSSOVER POINT:
HD2,No load
GAIN = 0
-10
-160
0.0110
-40
-80
100
HD2,1K load
0
-140
1000000
120
GAIN
-80
20
-100
10
-120
VOUTDIFF = 4VP-P
-20
MAGNITUDE (dB)
MAGNITUDE (dB)
10000
HD2 AND HD3 vs. FREQUENCY
0
toc45
-40
-160
100
140
-60
30
FREQUENCY (Hz)
HD2 AND HD3 vs. FREQUENCY
-20
160
-40
40
FREQUENCY (Hz)
0
200
VOUTDIFF = 1VP-P 180
PHASE
50-20
-20
-70
UNITY-GAIN BANDWIDTH AND PHASE
vs. FREQUENCY
HD2 AND
HD3 vs. FREQUENCY toc41
toc44
60 0
-10
1
10000 100000
toc43
MAGNITUDE (dB)
MAGNITUDE (dB)
INPUT VOLTAGE-NOISE DENSITY (nV/√Hz)
-10
INPUT
CURRENT-NOISE
SPECTRAL
DENSITY
OUTPUT
BALANCE ERROR
vs. FREQUENCY
toc37
vs. FREQUENCY
0
PHASE (radians)
100
100 VS- = -5V
0
MAGNITUDE(dB)
(dB)
MAGNITUDE
VOCM RESPONSE vs. FREQUENCY
INPUT VOLTAGE-NOISE DENSITYtoc36
VS+ = +5V
vs. FREQUENCY
toc42
10
6.6
-160
1
2.4
3.8
5.2
6.6
OUTPUT VOLTAGE SWING (VP-P)
Maxim Integrated │ 14
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
0.1Hz to 10Hz INPUT VOLTAGE NOISE
INPUT CURRENT NOISE 0.1Hz to 10Hz
toc50
150
0.1Hz TO 10Hz INPUT VOLTAGE NOISE: 200nVP-P
100
INPUT CURRENT NOISE (pAP-P)
INPUT VOLTAGE NOISE (nVP-P)
150
50
0
-50
-100
-150
SMALL-SIGNAL RESPONSE
toc51
INPUT CURRENT NOISE = 220pAP-P
100
VINDIFF
50
-50
VOUTDIFF
100mV/div
-100
50ns/div
4s/div
LARGE-SIGNAL TRANSIENT RESPONSE
VOCM SMALL-SIGNAL
TRANSIENT RESPONSE
LARGE-SIGNAL TRANSIENT RESPONSE
toc53a
toc53b
= 10pF
CLOADC=LOAD
10pF
VINDIFF
100mV/div
0
-150
4s/div
toc52
CLOAD = 10pF
CLOAD = 10pF
toc54
CLOAD = NO LOAD
500mV/div
VINDIFF
500mV/div
VOCM
500mV/div
VOUTDIFF
50ns/div
VOCM LARGE-SIGNAL
TRANSIENT RESPONSE
VOCM
500mV/div
VOUTDIFF
100mV/div
VOUT+
100ns/div
50ns/div
OUTPUT+ TRANSIENT RESPONSE
vs. SHUTDOWN PULSE
OUTPUT-TRANSIENT RESPONSE
vs. SHUTDOWN PULSE
toc55
100mV/div
toc56b
toc56a
VSHDN
2V/div
VOUT-
1V/div
VSHDN
2V/div
VOUT+
1V/div
2V/div
2V/div
VOUT+
5µs/div
500ns/div
www.maximintegrated.com
5µs/div
Maxim Integrated │ 15
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
VCLPH CLAMP ENGAGING TIME
VINDIFF
1V/div
VOUTN
VINSIDE
OUT-
VINDIFF
3.7V
3.3V
1V/div
VBACKUP
VIN+ = 1VP-P + 0.5Vdc,
VIN- = GND,VCLPH = 3.3V,
VCLPL = -5V, VOCM = 3.3V,
RL = 1kΩ
2.9V
OUT+
OUT-
1V/div
VBACKUP
2.9V
VOUTDIFF
VIN+ = 1VP-P - 0.5Vdc,
VIN- = GND,VCLPH = 3.3V,
VCLPL = 0V, VOCM = 0V,
RL = 1kΩ
VBACKUP
0.44V
1V/div
1V/div
VOUTDIFF
1V/div
20ns/div
OUTPUT TRANSIENT RESPONSE
WITH NO CLAMPING
OUTPUT TRANSIENT RESPONSE
WITH SOFT CLAMPING
toc62
toc61
toc60
VINDIFF
0V
-0.44V
VOUT-
3.65V
3.72V
5V/div
-0.4V
2V/div
3.3V
1V/div
OUT+
OUT-
VBACKUP
3.65V
3.5V
VINDIFF
5V/div
1V/div
VOUTN
VINSIDE
1V/div
OUT-
1V/div
-0.44V
OUT+
100ns/div
VCLPL CLAMP DISENGAGING TIME
0V
VINSIDE
1V/div
1V/div
20ns/div
VINDIFF
VINDIFF
3.3V
toc59
VIN+ = 1VP-P - 0.5Vdc,
VIN- = GND, VCLPH = 3.3V,
VCLPL = 0V, VOCM = 0V,
RL = 1kΩ
VOUTN
3.7V
1V/div
VOUTDIFF
1V/div
VOUTN
VINSIDE
OUT+
VCLPL CLAMP ENGAGING TIME
VCLPH CLAMP DISENGAGING TIME toc58
toc57
VIN+ = 1VP-P + 0.5Vdc,
VIN-= GND, VCLPH = 3.3V,
VCLPL = -5V, VOCM = 3.3V,
RL = 1kΩ
1V/div
0.44V
1V/div
VOUTDIFF
40ns/div
www.maximintegrated.com
VOUT+
2V/div
0V
VOUTDIFF
VIN+ = 3.3VP-P,
VIN- = VIN+ - 180°, VCLPH = 3.3V,
VCLPL = 0V, VOCM = 1.65V
20µs/div
5V/div
VOUT+
-0.36V
2V/div
VOUT-
2V/div
VOUTDIFF
5V/div
20µs/div
VIN+ = 4.3VP-P,
VIN- = VIN+ - 180°, VCLPH = 3.3V,
VCLPL = 0V, VOCM = 1.65V
Maxim Integrated │ 16
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Operating Characteristics (continued)
(VS+ = +5V, VS- = -5V, VCLPH = VS+, VCLPL = VS-, VOCM = 0V, SHDN = VS+, GND/EP = 0V, RF = RG = 1kΩ, RL = 1kΩ (between OUT+
and OUT-), TA = -40°C to +125°C, unless otherwise noted.)
3.65V
3.72V
3.5V
VOUT+
-0.4V
5V/div
VINDIFF
2V/div
VOUTVOUT+
VOUT-
2V/div
VOUTDIFF
5V/div
20µs/div
toc65
toc64
toc63
VINDIFF
OUTPUT TRANSIENT RESPONSE
WITH SOFT CLAMPING
OUTPUT TRANSIENT RESPONSE
WITH NO CLAMPING
OUTPUT TRANSIENT RESPONSE
WITH HARD CLAMPING
3.65V
3.72V
5V/div
VINDIFF
-0.4V
2V/div
VOUT-
5V/div
3.68V
3.3V
0V
VOUTDIFF
2V/div
VOUT+
5V/div
VOUTDIFF
20µs/div VIN+ = 3.3VP-P,VIN- = VIN+ -
VIN+ = 5VP-P,
VIN- = VIN+ - 180°, VCLPH = 3.3V,
VCLPL = 0V, VOCM = 1.65V
3.65V
3.72V
180°, VCLPH = 3.3V, VCLPL =
0V, VOCM = 1.65V
-0.4V
-0.32V
2V/div
2V/div
5V/div
20µs/div VIN+ = 4.3VP-P,VIN- = VIN+ -
180° VCLPH = 3.3V, VCLPL = 0V,
VOCM = 1.65V
OUTPUT TRANSIENT RESPONSE
WITH HARD CLAMPING
toc66
3.65V
3.72V
VINDIFF
VOUT-
VOUT+
5V/div
3.76V
-0.4V
-0.36V
2V/div
2V/div
5V/div
VOUTDIFF
20µs/div VIN+ = 5VP-P,VIN- = VIN+-180°
VCLPH = 3.3V, VCLPL = 0V,
VOCM = 1.65V
www.maximintegrated.com
Maxim Integrated │ 17
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Pin Configurations
TOP VIEW
IN-
N.C.
IN+
12
11
10
+
TOP VIEW
1
VOCM
2
VS+
3
VCLPH
4
OUT+
*EXPOSED PAD
5
+
IN-
MAX44205
*
10
IN+
9
SHDN
8
VS-
7
VCLPL
6
OUT-
VOCM
1
VS+
2
VCLPH
3
MAX44205
EP*
4
µMAX
5
OUT+
GND
9
SHDN
8
VS-
7
VCLPL
6
OUT-
TQFN
3mm x 3mm
Pin Description
PIN
NAME
FUNCTION
TQFN
µMAX
1
2
2
3
VS+
3
4
VCLPH
High-Output Voltage Clamping Input
4
5
OUT+
Noninverting Differential Output
5
*
GND
External Ground Input. *The µMAX exposed pad also functions as GND.
6
6
OUT-
Inverting Differential Output
7
7
VCLPL
Low-Output Voltage Clamping Input
8
8
VS-
VOCM
Output Common-Mode Voltage Input
Positive Supply Voltage Input
Negative Supply Voltage Input
9
9
SHDN
10
10
IN+
Noninverting Input
11
—
N.C.
No Connection. Not connected internally
12
1
IN-
Inverting Input
—
—
EP
Exposed Pad. Connected to GND internally. The µMAX exposed pad is also
GND.
www.maximintegrated.com
Shutdown Mode Input (active low)
Maxim Integrated │ 18
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Functional Diagram
INN
RF
RG
VS+
SHDN
CC
VCLPH
MAX44205
GAIN
STAGE
OUT+
OUTPUT
STAGE
VCLPL
ININPUT
STAGE
IN+
COMMON-MODE
FEEDBACK
VOCM INPUT
GAIN
STAGE
VOCM
OUT-
OUTPUT
STAGE
CC
VSINP
RG
Detailed Description
The MAX44205 is a low-noise, low-power, very low-distortion fully differential (input and output) op amp capable
of driving high-resolution 16-/18-/20-bit SAR ADCs with
input signal frequencies from DC to 1MHz. These highresolution signal chain ICs are used in test and measurement applications, as well as medical instrumentation and
industrial control systems.
This fully differential op amp accepts either single-ended
or fully differential input signals at its inputs and converts the input signal into fully differential outputs that
are exactly equal in amplitude and 180° apart in phase.
Ideally, the noise and distortion performance of the amplifier should match or exceed the linearity of the ADC to
preserve the overall system accuracy.
RF
GND*
N.C.*
*TQFN ONLY
from electrical overstress when the driver output exceeds the
input range of ADC. If VCLPH and VCLPL are connected to
VCC and GND of the ADC respectively, then the output of the
driver will not go out beyond the power supply of the ADC.
The MAX44205 has an output voltage common-mode
(VOCM) input to set the DC common-mode voltage level
of the differential outputs without affecting the balance
of the AC differential output signal on each output. The
MAX44205 also features a low-power shutdown mode
that consumes only 6.8µA of supply current from the
VS+ pin. Note that while the outputs are floating during
shutdown, the feedback networks may provide paths for
current to flow from the input source(s).
Four precisely matched resistors (two for feedback and
two for gain setting) set the differential closed-loop gain
as shown in the Functional Diagram.
The MAX44205 has a unique output stage clamping feature.
Pins (VCLPH and VCLPL) can be useful in protecting the ADC
www.maximintegrated.com
Maxim Integrated │ 19
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Terminology and Definitions
With single-ended input applications there will be an input
signal component to the input common-mode voltage,
as there is no out-of-phase signal not applied on the
other input. Applying VINP (connecting VINM to zero), the
common-mode input voltage is:
RF
+5V
INM
RG
IN-
VOCM
INP
VIN,cm = (VIN+ + VIN-)/2 ≅ VOCM x RG/(RF + RG) +
VCM x RF/(RF + RG) + VINP/2 x RF/(RF + RG)
VS+
VCLPH
OUT+
VOCM
RG
MAX44205
OUT-
IN+
VS-
OUT+
OUT-
VCLPL
-5V
The common-mode offset voltage is defined as the difference between the voltage applied to the VOCM terminal
and the output common-mode voltage.
VOS,cm = (VOUT,cm - VOCM)
Input Offset Voltage, CMRR, and VOCM CMRR
RF
Figure 1. Differential Input, Differential Output Configuration
(Decoupling Capacitors Not Shown for Simplicity)
Differential Voltage
The differential voltage at the input is the voltage applied
across INP to INM and the differential voltage at the output is the voltage across OUT+ to OUT-. Equations for
input and output differential voltages are listed below:
VIN,dm = (VINP - VINM)
VOUT,dm = (VOUT+ - VOUT-)
VOUT+ and VOUT- are voltages at the OUT+ and OUTterminals with respect to output common-mode voltage
set by the VOCM input voltage.
Common-Mode Voltage
The common-mode voltage at the input is the average
of the input pins (IN+ and IN-) and at the output, it is the
average of two outputs. Equations for input and output
common-mode voltages are listed below:
VIN,cm = (VIN+ + VIN-)/2
VOUT,cm = VOCM = (VOUT+ + VOUT-)/2
Though it was mentioned that the input common-mode
voltage is the average of the voltage seen on both input
pins, the range is slightly different depending on if the
input signal is fully differential or single ended.
For fully differential input applications, where VINP =
-VINM, the common-mode input voltage is:
VIN,cm = (VIN+ +VIN-)/2 ≅ VOCM x RG/(RF + RG)
+ VCM x RF/(RF + RG).
www.maximintegrated.com
Common-Mode Offset Voltage
Input offset voltage is the differential voltage error (VOS,dm)
between the input pins (IN+ and IN-). CMRR performance
is affected by both the input offset voltage error at the input
due to change in input common-mode voltage (VIN_,cm)
and the change in input offset voltage (VOS,dm) due to
VOCM change. So, there are two CMRR terms:
CMRRVIN,cm = ∆(VIN_,cm)/∆(VOS,dm)
CMRRVOCM = ∆(VOCM)/∆(VOS,dm)
The output common-mode rejection ratio is strongly
affected by the matching of gain-setting feedback network.
Output Balance Error
An ideal differential output implies the two outputs of the
amplifier should be exactly equal in amplitude but 180°
apart in phase. Output balance is the measure of how well
the outputs are balanced and is defined as the ratio of the
output common-mode voltage to the output differential
signal. It is generally expressed as dB in log scale.
Output Balance Error = 20 x log|(VOUT,cm)/(VOUT,dm)|
Operation and Equations
The Functional Diagram details the internal architecture
of the differential op amp. The negative feedback loop
across the outputs to respective inputs force voltages on
IN+ and IN- pins equal to each other. That implies:
VINP − VOUT −
=
RF
RG
VINN − VOUT +
=
RF
RG
From above equations see the relationship between differential output voltage and inputs.
(VOUT + − VOUT − ) = (VINP − VINN ) ×
RF
RG
Maxim Integrated │ 20
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
The VOCM input voltage with the help of the commonmode feedback circuit drives the output common-mode
voltage level to VOCM. This results in the following output
relations:
(V=
OUT + ) (VOCM) +
(V=
OUT − ) (VOCM) −
the voltage levels set at VCLPH and VCLPL inputs. This
is an advantageous feature when the front-end amplifier
is operated with split supplies or a wider supply voltage
range than that of an ADC. For example, the ADC detailed
in the Typical Application Circuit (MAX11905) operates
from a single 3V or 3.3V supply and ground. When operating the MAX44205 from ±5V supplies, it is desirable to
limit the amplifier outputs between 0V and 3.3V. Connect
VCLPH to 3.3V and VCLPL to 0V.
VOUT,DM
2
VOUT,DM
2
Input and ESD Protection
Exposed Pad
Both of the MAX44205 packages have their exposed
pads internally connected to GND. The EP should be
connected to the PCB’s ground plane for optimum thermal
dissipation.
As shown in Figure 2, ESD diodes are present on all the
pins with respect to the VS+ and VS- pins so that these
ESD diodes turn on and protect the part when voltages on
these pins go out of range from either supplies by more
than one diode drop. There are two series input resistors
and back-to-back diode protection between the inputs for
protection against excessive differential voltages across
the amplifier’s inputs.
SHDN Input
SHDN Operation
The MAX44205 offers a shutdown mode for lowpower operation. Drive SHDN below 0.65V (typ)
with respect to GND/EP to shut down the part and
only 6.8µA (typ) will be drawn from VS+. SHDN and
GND are referred to each other and allow for convenient interfacing to the logic-level input signals, which
operate independent of the VS+ and VS- supplies.
VCLPH and VCLPL Output Clamp Supplies
The MAX44205 design incorporates patent-pending circuitry that limits the outputs voltage levels in order to avoid
overstressing an ADC that accepts the MAX44205 outputs. The outputs are clipped if the voltage swing exceeds
VS+
D1
MAX44205
D1
VS-
VS+
D1
IN-
SHDN
VCLPH
VS-
D1
D1
D1
D1
D1
D1
25Ω
VS-
VS-
ESD
CORE
CLAMP
D1
D1
VSVS-
GND*
D1
OUT-
D1
VS+
D1
VOCM
VS+
VS-
D1
OUT+
D1
VS+
VSD1
IN+
D1
25Ω
D1
VS+
VS+
VS+
VSD1
VCLPL
VS+
N.C.*
*TQFN ONLY
Figure 2. Showing ESD protection scheme in MAX44205
www.maximintegrated.com
Maxim Integrated │ 21
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
In single-supply operation, connect VS- and GND to 0V.
In single-supply mode, VS+ can range between 2.7V to
13.2V. In dual supply operation, VS+ and VS- are connected to the positive and negative voltage rails, respectively
(see Figure 4). In dual supply operation, SHDN is still
referred to GND. To keep the part active, SHDN needs
to be maintained between 1.25V and VS+ with respect to
GND/EP.
For the shutdown function to work correctly in very low
supply voltage applications, one has to maintain a minimum of 2.7V difference between the VS+ and GND pins.
This is necessary when operation with ±1.35V supplies is
required and in that case, the GND pin and EP need to
be tied to VS-.
Shutdown Operation with External
Components and Stimuli
In shutdown mode, quiescent supply current is low.
However, there will be currents flowing into the IC pins
depending on the external components and applied signals. Figure 3 shows the block diagram with these current
paths and shows internal protection devices. In active
operation mode (shutdown disabled), input signals are
applied to INP and INN. The voltage applied to the VOCM
pin sets the output common-mode voltage.
In shutdown mode, the voltages applied to INP, INN, and
VOCM will interact with the IC internal components resulting in current flowing into the IC pins. It must be noted
that the op amp’s outputs, OUT+ and OUT-, exhibit highimpedance state in shutdown mode.
Shutdown Quiescent Currents Dependency on
VCLPL and VCLPH
Supply currents exhibit dependency with respect to
clamping voltages applied to the VCLPL and VCLPH pins.
These currents will not be seen if the clamping feature
is not used or the VCLPL and VCLPH pins are left open.
RF
VS+
D1
MAX44205
VCLPH
SHDN
D1
VSVS+
CC
VS+
INN
RG
D1
IN-
GAIN
D1
IINN
VS-
VS+
IINP
D1
IN+
INP
25Ω
D1
D1
INPUT
STAGE
VOCM
INPUT
OUTPUT
D1
COMMONMODE
FEEDBACK
D1
VS-
OUTPUT
VS-
VOCM
IVOCM
VS+
D1
D1
VS-
OUT+
D1
VS+
25Ω
GAIN
RG
D1
OUT-
D1
ESD
CORE CLAMP
VS-
VS-
GND
VCLPL
RF
Figure 3. Currents Flowing when MAX44205 is in Shutdown
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Maxim Integrated │ 22
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Applications Information
The fully differential op amp is shown in Figure 5 for reference. Fully differential op amps provide a lot of advantages, including rejecting common-mode noise coupled to the
input, the output, and from the power supply. The effective
output swing is increased by a factor of two as the outputs
are equal in amplitude and 180° apart in phase.
For example, by applying a fully differential input signal of
1VP-P across INP and INN on Figure 1 there is a 2VP-P
differential output voltage swing. Another advantage of
having fully differential outputs is that even order harmonics will be suppressed at the output.
Input Impedance Mismatch Due to Source
Impedance
The impedance looking into the IN+ and IN- nodes of
Figure 5 depends on how the inputs are driven. For a
fully differential input signal, i.e., VINP = -VINM, the input
impedance looking into inputs is shown in Figure 6.
RINP = RINM = RG
For a single-ended input signal, since the inputs are not
balanced, the input impedance actually increases relative
to the fully differential case. The input impedance looking
into either input is:
R=
INP R=
INM
Potential Difference Between
Supply Voltage Pins
VS+
Apart from the single-ended input and differential input
signal cases, an input signal source from a nonzero
source impedance may cause imbalance between feedback resistor networks for single-ended input driving case
as shown in the Figure 7. A terminating resistor RT as
shown in Figure 7 is used to impedance match to the
source such that:
VS+
2.7V TO 13.2V
GND
2.7V TO 13.2V
RG
RF
 1
[1 −   ×
]
 2  (R G + R F )
≥ 0V
VS-
=
R T R INM ×
VS-
RS
R INM − R S
Figure 4. Explaining Potential Difference Between Supply
Voltage Pins
DIFFERENTIAL STRUCTURE AT INPUT, OUTPUT REJECTS COUPLED
NOISE AT THE INPUT, OUTPUT AND AT THE POWER SUPPLY
VS+
OUT+
VOCM
VOCM
OUT+
+
-
MAX44205
RG
INM
VINM
VINP
IN+
VCLPL
OUT-
VCLPH
IN-
OUT+
+
OUT-
RF
VS+
RINM
VS+
VCLPH
IN-
+5V
VCM
RG
VOCM
VOCM
MAX44205
OUT-
IN+
INP
OUT+
OUT-
VCLPL
RINP
VS-
VS-5V
RF
VS-
Figure 5. Showing Fully Differential Architecture
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Figure 6. Fully Differential Amplifier
Maxim Integrated │ 23
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
A terminating resistor is inserted to correct for impedance
mismatch between the source and input. The gain resistor mismatch across feedback networks is created due to
the parallel combination of RT and RS. So, to balance out
the gain resistor mismatch on the other input, insert RB
such that:
R=
B RT ×
[e n × (1 +
e nt =
RF 2
)] + 2 × (i n × R F ) 2
RG
RF 2
) + 2 × (e nRF ) 2
RG
ent is total output noise of the circuit shown in Figure 7
+2 × (e nRG ×
en is the input voltage-noise density
RS
RT − RS
in is the input current-noise density
Effects of Input Resistor Mismatch
If there is a mismatch between the feedback resistor (RF)
pair and gain resistor (RG) pair, there will be a small delta
in the feedback factor across the input pins. This delta in
the feedback factor is a source of common-mode error.
To apply an AC CMRR test without a differential input
signal, the common-mode rejection is proportional to
the resistor mismatch. Using 0.1% or better resistors will
mitigate most of the problems and will yield good CMRR
performance.
Noise Calculations
The MAX44205 offers input voltage and current noise
densities of 3.1nV/√Hz and 1.5pA/√Hz, respectively. From
Figure 6, the total output noise is a combination of noise
generated by the amplifier and the feedback and gain
resistors. The total output noise generated by both the
amplifier and the feedback components is given by the
equation:
enRG is the noise voltage density contributed by the gain
resistor RG
enRF is the noise voltage density contributed by the feedback resistor RF
Resistor Noise =
4 × k × T × R × ∆f in nV/√Hz
T is absolute temperature in Kelvin
k is Boltzmann constant: k = 1.38 x 10-23 in joules/Kelvin
R is resistance in ohms and ∆f is frequency range in Hertz
The MAX44205 input-referred voltage noise contributes
the equivalent noise of a 600Ω resistor. For low noise,
keep the source and feedback resistance at or below this
value, i.e. RS + RG//RF ≤ 600Ω. At combinations of below
600Ω, amplifier noise is dominant, but in the region 600Ω
to 10kΩ, the noise is dominated by resistor thermal noise.
Any larger resistances beyond that, the noise current multiplied by the total resistance dominated the noise.
RF
RF
+5V
VS+
SIGNAL
GENERATOR
RINM
VS+
RG
RS
IN-
VINM
INM
VCLPH
OUT+
RT
VOCM
RG
VOCM
OUTVCLPL
RB = RS//RT
VS-
VS-
RF
Figure 7. Compensation for Source Impedance
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OUT+
INVOCM
MAX44205
IN+
VS+
VCLPH
RG
OUT-
INP
OUT+
VOCM
RG
OUT+
MAX44205
OUT-
IN+
OUT-
VCLPL
VS-
-5V
RF
Figure 8. Fully Differential Amplifier
Maxim Integrated │ 24
MAX44205
Lower resistor values are ideal for low-noise performance
at the cost of increased distortion due to increased loading of the feedback network on the output stage. Higher
resistor values will yield better distortion performance
due to less loading on the output stage but at the cost of
increase in higher output noise.
Improving Stability using
Feedback Capacitors
When the MAX44205 is configured such that a combination of parasitic capacitances at the inverting input form
a pole whose frequency lies within the closed-loop bandwidth of the amplifier, a feedback capacitor across the
feedback resistor is needed to form a zero at a frequency
close to the frequency of the parasitic pole to recover the
lost phase margin.
Adding larger value feedback capacitors will reduce the
peaking of the amplifier but decreases the closed-loop
-3dB bandwidth.
Layout and Bypass Capacitors
For single-supply applications, it is recommended to place
a 0.1µF NPO or C0G ceramic capacitor within 1/8th of
an inch from the VS+ pin to ground and to also connect a
10µF ceramic capacitor within 1in of the VS+ pin to GND.
One can short VS-, GND, and EP in that case.
In dual-supply applications, it is recommended to place a
0.1µF NPO or C0G ceramic capacitor within 1/8th of an
inch from the VS+ and VS- pins to GND and place 10µF
ceramic capacitors within 1in of the VS+ and VS- pins to
GND. Low ESR\ESL NPO capacitors are recommended
for 0.1µF or smaller decoupling capacitors. A 0.1µF or
0.22µF capacitor should be placed as close as possible
between the VOCM input pin to ground.
Signal routing into and out of the part should be direct
and as short as possible into and out of the op amp
inputs and outputs. The feedback path should be carefully
routed with the shortest path possible without any parasitic capacitance forming between feedback trace and
board power planes. Ground and power planes should be
removed from directly under the amplifier input and output
pins. Also, care should be taken such that there will be no
parasitic capacitance formed around the summing nodes
at the inputs that could affect the phase margin of the part.
Any load capacitance beyond a few picofarads needs to
be isolated using series output resistors placed as close
as possible to the output pins to avoid excessive peaking
or instability.
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180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Driving a Fully Differential ADC
The MAX44205 was designed to drive fully differential
SAR ADCs such as the MAX11905. The MAX11905 is
part of a family of 20-/18-/16-bit, 1.6Msps/1Msps ADCs
that offer excellent AC and DC performance. The Typical
Application Circuit details a fully differential input to
the MAX44205, which then drives the fully differential
MAX11905 ADC inputs through the ADC input filter shown
in the dashed box.
The MAX6126 provides a 3V reference output voltage,
which is fed to the ADC’s reference. The MAX44205’s
common mode (VOCM) is created by dividing down the
reference voltage by a factor of two. A pair of 1kΩ 0.1%
resistors are used for this purpose. The VOCM input is
bypassed to GND with a combination of 2.2µF (X7R) and
0.1µF (NPO) capacitors.
The MAX44205 is connected in a unity-gain configuration.
The input resistors and feedback resistors are all 1kΩ
0.1% resistors. The feedback resistors are bypassed by
4.7nF (C0G, 100V) capacitors.
The ADC input filter uses a pair of 10Ω 0.1% resistors
and a 2.2nF (COG) capacitor. This input filter assists the
MAX44205’s settling response with the MAX11905’s fast
acquisition window.
Output Clamps Performance while Driving ADC
While driving ADC as shown in the Typical Operating
Circuit, it is important that the driver output swing into
ADC is contained within ADC supplies. The MAX44205 is
operated over ±5V split supplies or +5V supply and ADC
operating at slightly smaller voltage around 3.3V or 1.8V.
The MAX44205 has built-in output voltage clamp feature
that limits the output swing of the driver to within VCLPH
+ 0.34V to VCLPL - 0.42V when ADC rails are connected to Output clamp supply pins (VCLPH and VCLPL)
of MAX44205. Typical Operating Characteristic graphs
from TOC 61 thru TOC66 show the performance of this
clamping feature when output swing of the MAX44205 is
a) driven to clamp voltages, b) driven slightly above the
clamps and c) driven well beyond the clamp voltages/
ADC supply voltage. Both sinusoidal and square transient
response is shown.
The Typical Application Circuit was used to test the
AC performance in Figures 9 and 10. Data were taken
with the input frequencies at 10kHz on the MAX11905
Evaluation Kit. Figures 9 to 13 detail the results of the
MAX11905 Evaluation Kit (MAX11905DIFEVKIT#) GUI.
The sample rate for Figure 9 is 1Msps and the sample
rate for Figure 10 is 1.6Msps, the MAX11905’s maximum
Maxim Integrated │ 25
MAX44205
sample rate. As measured at the MAX11905 output, the
signal-to-noise ratio is > 97dB for both sample rates, with
total harmonic distortion > 112.9dB.
Figures 11 to 13 detail the DC performance of the
MAX44205 and MAX11905. These three figures detail
the results of shorting the inputs together to GND at the
VSIG sources and measuring the noise histogram at the
output of the ADC. All data was measured at 1Msps, with
65,536 samples taken. Figure 11 shows the results at a
20-bit code level with no averaging. Effective number of
bits (ENOB) is 17.9 bits.
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Figure 13 shows the results of averaging by 64x, which
will limit the effective sample rate to 15.6ksps (1Msps/64).
ENOB is 20.8 bits in this mode, making the MAX11905 a
lower power alternative to high-speed 24-bit delta sigma
ADCs.
One technique to improve a system’s ENOB is to average
multiple samples. The tradeoff is a reduced effective sample rate. The theoretical expected results of averaging
are a 0.5 improvement in ENOB for every average factor
of 2. Therefore, averaging by 16x should improve ENOB
by 2 bits. Figure 12 details this example, and the ENOB
is improved nearly 2 bits, from 17.9 bits to 19.8 bits.
This shows that the noise from the ADC and the op amp
are not limiting the ENOB.
Figure 9. MAX11905 FFT (fSAMPLE = 1Msps, fIN = 10kHz)
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Maxim Integrated │ 26
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Figure 10. MAX11905 FFT (fSAMPLE = 1.6Msps, fIN = 10kHz)
Figure 11. MAX11905 Output Data Histogram (Inputs Shorted, Averaging = 1, fSAMPLE = 1Msps)
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Maxim Integrated │ 27
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Figure 12. MAX11905 Output Data Histogram (Inputs Shorted, Averaging = 16, fSAMPLE = 1Msps)
Figure 13. MAX11905 Output Data Histogram (Inputs Shorted, Averaging = 64, fSAMPLE = 1Msps)
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Maxim Integrated │ 28
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
3.2V to 12.6V
3V
IN
OUT
MAX6126
1kΩ
0.1%
0V
10µF
3V
-3V
499Ω
0.1%
+5V
+
1.5V
-
3.3V
0V
VS+
VCLPH
6VP-P + 0VDC
1kΩ
GND
4.7nF
C0G
3V
10Ω
AIN+ VREF
OUT+
1.5V
MAX44205
VOCM
2.2nF
0.1µF
2.2nF
10Ω
OUT-
1kΩ
-5V
499Ω
0.1%
MAX11905
AIN-
GND
ADC INPUT FILTER
VCLPL
VS-
1kΩ
0.1%
AVDD
3V
1.5V
0V
4.7nF
C0G
Figure 14. MAX44205 Used to Drive a Single-Ended Input into a Differential, 20-Bit SAR ADC
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Maxim Integrated │ 29
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Typical Application Circuit
3V
3.2V TO 12.6V
IN
OUT
MAX6126
GND
4.7nF
C0G
1kΩ
0.1%
+5V
1kΩ
0.1%
3.3V
-
VS+
VCLPH
VSIG
+
1kΩ
0.1%
10µF
3.3V
10Ω 0.1%
REFVDD VREFIN
AIN+
OUT+
1.5V
2.2µF
X7R
0.1µF
OUTVCM
-
MAX11905
10Ω 0.1%
AINGND
ADC INPUT FILTER
VCLPL
VS-
VSIG
1kΩ
0.1%
2.2nF
COG
MAX44205
VOCM
AVDD
+
-5V
1kΩ
0.1%
1kΩ
0.1%
4.7nF
C0G
Ordering Information
PART
TEMP RANGE
Package Information
PINPACKAGE
MAX44205ATC+
-40°C to +125°C 12 TQFN-EP*
MAX44205AUB+
-40°C to +125°C 10 µMAX
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Chip Information
TOP
MARK
+ADA
+AABW
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
10 µMAX
U10E-3
21-0109
90-0148
12 TQFN-EP
T1233-4
21-0136
90-0017
PROCESS: BiCMOS
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Maxim Integrated │ 30
MAX44205
180MHz, Low-Noise, Low-Distortion,
Fully Differential Op Amp/SAR ADC Driver
Revision History
REVISION
NUMBER
REVISION
DATE
0
6/14
Initial release
12/14
Updated the Benefits and Features, Typical Application Circuit, Electrical
Characteristics, Typical Operating Characteristics, Pin Description, Functional
Diagram, Detailed Description, SHDN Operation, Applications Information, and
Ordering Information sections. Added the Output Clamps Performance While
Driving ADCs section. Updated Figures 2, 5, 6, 7, and 14.
1
PAGES
CHANGED
DESCRIPTION
—
1–17, 19, 21–26,
29, 30
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2014 Maxim Integrated Products, Inc. │ 31