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Transcript
High Efficiency, Inductorless Step-Down
DC/DC Converter
Shao Bin Yang Yujia Wang Ying Hong Zhiliang
State Key Laboratory of ASIC & System, Fudan University, Shanghai, 200433
e-mail: [email protected]
Abstract
A high efficiency, inductorless step-down DC/DC
converter is proposed. High efficiency is achieved
through the combination of the fractional conversion
ratio charge pump and load current sensing circuit. The
circuits have been designed in the TSMC 0.25um
2.5V/5V mixed signal CMOS process. The DC/DC
converter has an output voltage of 1.8V (load current<
200mA) with the accuracy of +1% and the ripple voltage
less than +lOmV for the input battery voltage from 2.8V
to 5V. The peak and average efficiency is over 85% and
65%, respectively.
Vb.,",
T
Pass
RIOscdilator
-
convert
Po,!:rStIaj
Pump with
Control &
fracton soal
Swtitch
conversion
m ad ShoC t CircuitDescrptio
Temperature
Ithsppr, an inutols
Ct
vm
rt
_ _
____
swicecaaio|CD
Se dcrition
Fig. 1. System of switched capacitor DC/DC converter
efficiencyover entire ~Dinput voltagino oa urn
method, reuofd physical volume, less EMI, low cost
and high power density.
In this paper, an inductorless switched capacitor DC/DC
ratio
It uses fractional conversion
is presented.
converter
Fig.1.ilustrate
inutoes
thPsrutreofte
and on-chip current sensing techniques to achieve high
efficiency over entire input voltage and load current
Introduction
Power management has wide spread applications in
consumer products, such as mobile phones, pagers,
PDAs, etc. It converts unregulated battery voltages to
desired regulated supply voltages for the electronic
devices. Several methods can be used to regulate the
output voltage: current control, pulse frequency
modulation (PFM) control and pulse width modulation
(PWM) control. There are three main requirements for
DC/DC converters: high efficiency for the increase of
the battery life; low output voltage for the devices
implemented in submicron process; low noise for the
integration with noise sensitive RF circuits. The two
conventional switch mode power supply (SMPS)
structures are: linear converter and inductor based
converter. The former has poor efficiency while the latter
has low power density and high cost. In recent years,
inductorless switched capacitor DC/DC converters have
become more attractive both in research area [1] and
commercial products [2], due to their simple control
range.
System and Circuit Description
System description
Fig. 1. illustrates the structure of the inductorless
switched capacitor DC/DC converter. The converter is
composed of power stage, two feedback control loops
and other protection blocks. The power stage contains
external capacitors and a power switches array, which
consists of several power transistors.
The input battery voltage is first detected by the series
res'istors formed voltage divider to produce the reference
voltages for the hysteresis comparators, which are used
to select different charge pump structures.
0-7803-9210-8/05/$20.00 © 2005 IEEE
364
Vin
voltage. So in the same charge pump structure, the
higher the input battery voltage, the lower the efficiency.
Using steady state analysis [3], the regulated output
voltage is (2):
(2)
G
Vout
VL bV,attery
1+
G2 (RI + Rpass
(
dRL
(1-d)RL
VL is the output voltage; RL is the load resistor; d is the
duty ratio of the clock; R1 and R2 are the charging and
discharging equivalent resistors, respectively; Rpass is the
equivalent resistor of the pass transistor. It has the
minimum value when the gate voltage is zero.
1
(3)
R
Fig.2. Switch array with external capacitors
Hysteresis comparators are adopted to prevent the mode
oscillation caused by the sudden change of external
situations. The mode control and switch driver block
generate the driving signals of the power transistors to
control the switches of the charge pumps. The pass
transistor, whose gate voltage is controlled by the
feedback loops, works like a current source to supply
the charge pumps for voltage regulation. Current
sensing circuit is used to sense the magnitude of load
current for the optimal selection of fractional
conversion ratios and control modes.
pass,m~n
/rpass (Vin + Vth, pass
Assume the conversion ratio is GQ there is a minimum
input voltage to prevent charge being transferred from
the output to the input battery, avoiding the undesired
battery damage.
in,min
Charge pump with fractional conversion ratios
Fractional conversion ratios can be realized by different
charge pump structures, shown in Fig.2. The charge
pump can provide three different conversion ratios (G): 1,
2/3, 1/2, constructed by the different predetermined
switch sequences, shown in Table. 1.
Table. 1. Switch sequences of the charge pump.
Ratio
Phase. 1
Phase.2
1/2
4,5,6,7
1,3,8,9
2/3
4,5,6,7
1,2,3
1
Always On: 1, 3, 5, 8, 9
(1 -G)2 R2
L
(1- G)2R+ G2(RI +Rpassmin )
dRL
(l-d)RL
G
(4)
Expression (4) indicates that Vin,min decreases when the
output resistance increases. Because Vin,min is the
reference voltage for the input detection, different
conversion ratios can be selected according to different
output loads when the input battery voltage is fixed.
Then a load current sensing circuit is needed, which can
also be used for some protection purposes, such as open
load and short circuit protections.
Current sensing circuit
Off
2
There are many internal current sensing techniques, but
only two methods are mainly used for inductorless
converters, one is to insert a series sensing resistor in the
signal path, which incurs large power loss. Another is to
add a current sensing transistor in parallel with the
power transistor, like a current mirror to sense the output
current. The latter is chosen in this design for its low
power consumption. [4]
Fig.3 shows the schematic of this current sensing
circuit, in which M1 is the power transistor,
corresponding to M5 in Fig.2. The circuit senses the
current over the power transistor through the
paralleled current mirror transistors (M2, M3, M4).
8,9
2, 4, 6, 7
For G=1, it is like the conventional LDO (low dropout
regulator) as it can produce very small ripple voltage.
G=2/3 or G=1/2 is realized in the two non-overlapped
clocks. Due to the charge conservation in the transfer
process, the ideal efficiency can be expressed as (1):
K
(1)
VL
G
G*Vbiattepy
K is the ratio of required output voltage and input battery
365
Vd
a...0~~
~
~
a
,I.
9
.-....
I
I
ts~~~~~~~~~~~
A
I
inpunt
sattay Votag (V)
Fig.4. Efficiency vs input voltage
1.810
7
20iA
1.790
loXu
1.800
ko0u
load
Vbandgap + Vsense
85
0u
85
0u
dI LC
(f1RESRd
-IG
v
rippe
'RLYf.C
d(l-d)~
87.Ou
(7)
f is the switching frequency; C is the output capacitor;
RESR is the ESR (equivalent series resistor) of C. Low
output voltage ripple can be achieved using large output
capacitor with low ESR. Ceramic capacitor is preferred
due to its low ESR. ESR can be significantly reduced by
additional capacitor in parallel with the primary one to
further filter the output voltage.
In current control mode, to reduce the output ripple, d is
fixed as near as possible to the conversion ratio under all
circumstances so that the charging current is close to the
load current. f is divided from the base clock, half for
G=1/2; one-third for G=2/3; and LDO control for G=1.
In other control methodology, such as PFM and PWM, d
or f varies with both input voltage and load current, it
can not achieve small ripple under all conditions. But
when the load resistor becomes larger, ripple is not the
main problem, as RL is in the dominator of the
expression (7). If the circuit continues to work in the
same switching frequency, it causes more efficiency
reduction. The internal power loss is mainly caused by
the power switch loss [5], which consists of two parts
(8):
(5)
The reference voltage of the input detection hysteresis
comparator (node C in Fig. 1.) is:
Khys,ref
150u
Fig.5. Output voltage ripple (input voltage=4.5V)
(In Fig 4 and 5, 2OmA and 200mA are output currents)
All of them operate in the linear region. The accuracy
mainly depends on the voltage at node A and B. An
operational amplifier is used to make the two voltages
(A and B) the same.
M10, M12, M14, M15 in Fig.3 provide the bias
currents and the current mirror M7, M8 is for the
current compensation. M2, M3 or M4 will be enabled
according to different conversion ratio when a current
flow through the power transistor MI. The sensing
current passes through the internal sensing resistor
Rsenseg the average dc voltage over Rsense (Vsense) can
be obtained by a low pass filter. Vsense is proportional
to the output current with a predetermined factor.
ml
140u
1.790
Fig.3. Schematic of current sensing circuit
Vsense = Rsen
130u
2OOA
(6)
So the segment of the input battery voltage varies with
the load current to achieve high efficiency at different
load conditions (Fig.4).
Control Methodology
There are two feedback control loops, one is current
control loop, and the other is PFM control loop. Current
control loop works in heavy load conditions to reduce
the output ripple. By steady state analysis, the output
ripple in this control mode can be expressed as (7):
Peoss,switch
Iload 'Ron + f .(C Vg
(8)
+Cgls* Vdb/sb)
The first part is conduction power loss depending on the
366
on-resistor (Ron) and the load current (Iload); the second is
the dynamic power dissipation depending on switching
frequency (f), parasitic capacitances of the transistors (Cg,
Cg/s) and voltages over the switch transistor (Vg, Vdb/sb).
The conduction and dynamic power losses are the major
parts in large and small load conditions, respectively. In
the given external situation, only switching frequency
can be adjusted to reduce the power loss, while this is the
trade-off with the ripple as shown in expression (7).
PFM control loop works in light load conditions mainly
to improve the efficiency as mentioned above. The
charge pump is occasionally charged when the output
voltage drops below the target voltage, otherwise the
circuit consumes the minimum supply current. The
switching frequency is dependent on the input voltage
and load current. By using this control method, it
produces excessive output ripple, because the charging
current is larger compared with the load current. One
simple way to overcome this problem is to make the gate
voltage of the pass transistor follow the input voltage to
limit the charging current. Fig.5 is the waveforms of the
output voltage. The ripple and switching frequency vs
input battery voltage are plotted in Fig.6 and Fig.7.
It should be mentioned that precise voltage regulation
usually requires an operational amplifier and bandgap
reference. The dc quiescent current of these circuits
can also affect the power efficiency.
Conclusion
An inductorless step down DC/DC converter has been
designed. The electrical characteristics are shown in
Table 2. It is applicable for the electronic devices
supplied by lithium-ion battery.
Table.2. Electrical characteristics
Input batter voltage
2.8V to 5V
Output voltage
Output accuracy
Output current
Output ripple
Base clock frequency
1.8V
Peak efficiency
Average efficiency
±1%
<200mA
< ± 1OmV
2MHz
>85%
>65%
367
,OF ,
l
-I
7
n~. Sir
t
otg
V
Fig.6. Output ripple vs input voltage
I'~~~~~~~~~~~
14
I)
I...1. .2
/
g
f
I
I
E
-
I
I
,
II
to
.,
,
.
B*tr
..
V*tt
50
Fig.7. Switching frequency vs input voltage
(In Fig.6 and 7, 2OmA and 200mA are output currents)
Reference
[1] Rao Arun, McIntyre Wiliam, Moon Un-Ku, et al.
Noise-Shaping Techniques Applied to Switched
Capacitor Voltage Regulators[J]. IEEE Solid-State
Circuit, 2005; 40(2): 422-429.
[2] Linear technology "LTC 191 1", datasheet.
[3] K.D.T.NGO. Steady-State Analysis and Design of a
Switched-Capacitor DC-DC Converter[J]. IEEE,
Transactions on Aerospace and Electronic Systems, 1994;
30(1): 92-100.
[4] Lee Cheung Fai, K.T.Mok Philip. A Monolithic
Current Mode CMOS DC-DC Converter with On-Chip
Current-Sensing Technique[J]. IEEE Solid-State Circuit,
2004; 39(1): 3-14..
[5] Wang Chi-Chang, Wu Jiin-chuan. Efficiency
Improvement in Charge Pump Circuits[J]. IEEE
Solid-State Circuit, 1997; 32(6): 852-860.