Download PI3HDMI412AD_HDMI_ApplicationInformation

PI3HDMI412AD
PI3HDMI412AD HDMI Application Information
by Shengjiang Pan
August 13, 2012
Table of Contents
1
Introduction ..............................................................................................................................2
2
External Component Requirements .......................................................................................2
3
Layout Design Guideline .........................................................................................................7
4
Typical Application Diagram ...................................................................................................9
Page 1 of 9
AN
Pericom Semiconductor Corp.
www.pericom.com
5/13/2017
1 Introduction
Pericom PI3HDMI412AD is a 1:2 active HDMI switch to drive differential signals to multiple video display units. Input
equalization, output swing and output pre-emphasis for both output ports of PI3HDMI412AD can be adjusted via
device pins or I2C control. When using PI3HDMI412AD as switch or splitter, cascading PI3HDMI412AD is not
suggested in application.
2 External Component Requirements
PI3HDMI412AD can accept AC-coupled or DC-coupled signals on TMDS lines.
2.1 AC Coupling Capacitor on TMDS Input
For dual-mode DP source, AC coupling capacitors should be placed before entering TMDS signal pins of
PI3HDMI412AD if signals from the dual-mode DP source are DC coupled in Figure 1.
.
.
PI3HDMI412AD
Dx-B
0.1u
Dual-mode DP
Source
Dx-
Dx+B
1:2
DEMUX
Dx+
Dx-A
0.1u
Dx+A
MS
Test_in
S[7:2]
.
.
Figure 1: AC Coupling Capacitor between DP Source and PI3HDMI412AD
Page 2 of 9
AN
Pericom Semiconductor Corp.
www.pericom.com
5/13/2017
2.2 DDC Pull-up at DDC_source
DDC of DP source is usually +3.3V tolerance, but DDC at HDMI interface is +5V. So the level shifter should be added
as shown in Figure 2. DDC at HDMI interface should be pulled up to +5V through 2KΩ resistor required by HDMI spec.
Also, DDC at DP source is suggested to pull up to +3.3V through 2K resistor.
.
.
+3V3
+5V
+5V
2k
2k
SCL_src
2k2
2k2
2k2
2k2
R228
R227
Q208
2N7002
R231
Q207
2N7002
R232
Dual-mode DP Source
R220
R233
SDA_src
PI5C3257
CEC
SCL_A
SCL_B
SDA_A
HPD
SDA_B
CEC_A
CEC
CEC_B
HPD_A
R229 10k
HPD_B
R230
18k
SEL
.
.
Figure 2: Pull-up Resistors at DDC_source
Page 3 of 9
AN
Pericom Semiconductor Corp.
www.pericom.com
5/13/2017
2.2 HPD Voltage Division Circuit
For source application, HPD is as an input signal. Generally, HPD of DP source is +3.3V tolerance, but HPD at HDMI
interface is +5V. So HPD voltage division circuit is suggested as shown in Figure 3, serial resistor is 10K while shuntdown resistor is 18K.
.
.
+3V3
+5V
+5V
2k
2k
SCL_src
2k2
2k2
2k2
2k2
R228
R227
Q208
2N7002
R231
Q207
2N7002
R232
Dual-mode DP Source
R220
R233
SDA_src
PI5C3257
CEC
SCL_A
SCL_B
SDA_A
HPD
SDA_B
CEC_A
CEC
CEC_B
HPD_A
R229 10k
HPD_B
R230
18k
SEL
.
.
Figure 3: HPD Voltage Division Circuit
Page 4 of 9
AN
Pericom Semiconductor Corp.
www.pericom.com
5/13/2017
2.2 VOFF Test Application
HDMI Test 7-3 in HDMI compliance test specification is to ensure the single-ended voltage of TMDS is within
AVcc±10mV when the source is in standby or off mode.
.
.
VDD Pin
+3V3
AVcc
2
50
1
ESD Diode
TMDS Output Pin
PI3HDMI412AD
Voff Test Fixture
.
.
Figure 4: PI3HDMI412AD Internal ESD Protection and AVcc Leakage Path
Through the test, TMDS output lines are pulled up to 3.3V AVcc through 50Ω resistor. As VDD pins and TMDS output
lines exist ESD diode protection in PI3HDMI412AD design as shown in Figure 2, the single-ended voltage of TMDS
has a diode drop.
To pass item 7-3 test, an external low voltage drop diode D1 as shown in Figure 3 is recommended to add between
internal 3.3V power and VDD pins of PI3HDMI412AD to block Output TMDS leakage mentioned in Figure 2.
Page 5 of 9
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Pericom Semiconductor Corp.
www.pericom.com
5/13/2017
+3V3
1
+3V3
B0520LW
D2
1N4148
4k7_0402
HEATGND
OE
SEL_IN
TEST_IN
GND
A3/S7
A2/S6
A1/S5
A0/S4
VDD
D0+A
D0-A
GND
D1+A
D1-A
PI3HDMI412AD@TQFN56
GND
D2+A
D2-A
GND
D3+A
D3-A
VDD
D0+B
D0-B
GND
D1+B
D1-B
GND
D2+B
42
41
40
39
38
37
36
35
34
33
32
31
30
29
15
16
17
18
19
20
21
22
23
24
25
26
27
28
MS
VDD
GND
D0+
D0VDD
D1+
D1D2+
D2VDD
D3+
D3GND
VDD
SEL_OUT
TEST_OUT
NC
SCL/S3
SDA/S2
GND
VDD
GND
VDD
D3-B
D3+B
GND
D2-B
U1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
R3
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
2
D1
Figure 5: PI3HDMI412AD Internal ESD Protection and AVcc Leakage Path
For OE pin, one external diode D2 is also recommended to add to block the leakage from AVcc to internal 3.3V power
through ESD diode.
When doing VOFF test, OE pin cannot be floating. If OE pin is floating, VOFF is measured about 0.8V as AVcc
leakages current through the internal pull-up resistor (100k) of OE pin. So to guarantee no leakage path, OE pin has
to be pulled low externally. 4.7k resistor is recommended to meet the maximum spec of low input voltage in Pericom
datasheet.
Page 6 of 9
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Pericom Semiconductor Corp.
www.pericom.com
5/13/2017
3 Layout Design Guideline
Layout guideline especially for high-speed transmission is highlighted.
3.1 Power and GROUND
More careful attention must be paid to the details associated with high-speed design as well as providing a clean
power supply, some recommendations are listed below.
 The supply (VDD) and ground (GND) pins should be connected to power planes routed on adjacent layers of
the printed circuit board. The distance to plane should be less than 50mil.
 The layer thickness of the dielectric should be minimized so that the VDD and GND planes create a low
inductance supply with distributed capacitance.
 One low-ESR 0.1uF decoupling capacitor should be mounted at each VDD pin. Smaller body size capacitors
can facilitate component placement. The capacitor should be placed next to a VDD pin, i.e. within 100mil.
 One capacitor with capacitance in the range of 4.7uF to 10uF should be incorporated in the power supply
bypassing design as well. It is can be either tantalum or an ultra-low ESR ceramic.
 A ferrite bead for isolating the power supply for Pericom device and power supplies for other parts of the
printed circuit board should also be implemented.
3.2 High-speed Signal Routing
Signal integrity is becoming critical as higher data rates are required. The layout is import for signal integrity.
 Differential pair should maintain symmetrical routing whenever possible. The mis-match length should be less
than 5mil for the same pair ( “+” and “-“).
 To minimize pair-to-pair crosstalk coupling, it is recommended to have >3X gap spacing between differential
pairs.
 Differential signals should be routed away from noise sources and other switching signals on the printed
circuit board.
 It is preferable to route differential signals on the same layer of the printed circuit board, particularly for the
input traces in source application.
 Stub creation should be avoided when placing pulled-up/down resistors on a differential pair.
Figure 6: Placement of Pull-down or Pull-up Resistors
Page 7 of 9
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Pericom Semiconductor Corp.
www.pericom.com
5/13/2017

If vias on differential pair is unavoidable, they should be used sparingly and must be placed symmetrically on
a differential pair.
Figure 7: Via Placement

AC coupling capacitor placement should be symmetrical on differential pair.
Figure 8: AC Capacitor Placement

To minimize signal loss and jitter, tight bend is not recommended. All angles should be larger than or equal to
135 degrees.
Figure 9: Acceptable Bends vs. Tight Bends
Page 8 of 9
AN
Pericom Semiconductor Corp.
www.pericom.com
5/13/2017
4 Typical Application Diagram
.
.
PI3HDMI412AD
HDMI Connector 1
Dx-B
0.1u
Dx-
0.1u
Dx+
Dx+B
1:2
DEMUX
Dx-A
Dx+A
MS
Test_in
+3V3
S[7:2]
+5V
+5V
2k
2k
SCL_src
2k2
2k2
2k2
R226
R225
Q206
2N7002
2k2
Dual-mode DP Source
R221
Q205
2N7002
R222
R218
R219
SDA_src
HDMI Connector 2
PI5C3257
CEC
SCL_A
SCL_B
SDA_A
HPD
SDA_B
CEC_A
CEC
CEC_B
HPD_A
R223 10k
HPD_B
R224
18k
SEL
.
.
Figure 10: PI3HDMI412AD Source Application
As PI3HDMI412AD only can switch TMDS data, PI5C3257 is used to switch side band data as shown in Figure 10.
Page 9 of 9
AN
Pericom Semiconductor Corp.
www.pericom.com
5/13/2017