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Transcript
1300
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 10, OCTOBER 2002
A Pixel-Level Automatic Calibration Circuit Scheme
for Capacitive Fingerprint Sensor LSIs
Hiroki Morimura, Member, IEEE, Satoshi Shigematsu, Member, IEEE, Toshishige Shimamura, Member, IEEE,
Katsuyuki Machida, Member, IEEE, and Hakaru Kyuragi
Abstract—We propose a pixel-level automatic calibration circuit
scheme that initializes a capacitive fingerprint sensor LSI to eliminate the influence of the surface condition, which is degraded by
dirt during long-time use. The scheme consists of an automatic calibration circuit for each pixel and a calibration control circuit for
the pixel array. The calibration is executed by adjusting variable
capacitance in each pixel to make the sensor signals of all pixels the
same. The calibration control circuit selects the pixels in parallel,
and calibrates all pixels in a short time. The scheme was applied to
a fingerprint sensor LSI using the 0.5- m CMOS process/sensor
process, and clear fingerprint images were obtained even for a degraded surface condition. This confirms that the scheme is effective
for capturing consistent clear images during long-time use.
Index Terms—Calibration, clear fingerprint image, dirt, fingerprint sensor, pixel, sensing circuit.
I. INTRODUCTION
U
SER AUTHENTICATION by fingerprints is an attractive
way to prevent illegal usage of mobile equipment and secure devices. Recently, capacitive fingerprint sensors using the
CMOS process have been developed for low-power low-cost
and small-size fingerprint identification systems [1]–[4]. We
have developed a fingerprint sensing circuit scheme that has
high sensitivity, a wide dynamic range, and contrast adjustment [5], and a grounded (GND)-wall-type sensor fabrication
process that offers electrostatic discharge (ESD) protection,
mechanical strength, and contamination protection [6]. Using
these techniques, we have achieved a single-chip fingerprint
sensor/identifier [7], [8].
Fig. 1 shows a top view of our fingerprint sensor chip, and
a schematic cross section of one pixel. The fingerprint sensor
has a pixel array to capture a fingerprint image. Each pixel is
composed of a sensor plate, a GND wall, and a sensing circuit
covered with a passivation film. The top of the GND wall is exposed to the surface of the sensor chip. The principle of fingerprint sensing is based on the detection of the slight capacitance
between a finger and a sensor plate: A fingerprint pattern is
captured by the detection of the capacitance, which varies with
the pattern of a fingerprint’s ridges and valleys because they are
different distances from the plates. The sensing circuit can detect even very small differences in capacitance by discharging
Manuscript received December 18, 2001; revised April 30, 2002.
H. Morimura, S. Shigematsu, and T. Shimamura are with the NTT Lifestyle
and Environmental Technology Laboratories, Atsugi, Kanagawa 243-0198,
Japan (e-mail: [email protected]).
K. Machida and H. Kyuragi are with the NTT Telecommunications Energy
Laboratories, Atsugi, Kanagawa 243-0198, Japan.
Publisher Item Identifier 10.1109/JSSC.2002.803022.
Fig. 1.
Fingerprint sensor chip.
from the sensor plate, and outputs a signal that reflects the fingerprint pattern at that point.
Since the surface of a fingerprint sensor is exposed to capture
a fingerprint image by finger touching, the condition of the
sensor surface changes during long-term use. In other words,
the sensor surface becomes dirty in practical use. Gradually,
a parasitic capacitance is formed between the dirt and the
sensor plate, and the sensed capacitance increases as a result.
This means that the output signal from the fingerprint sensor
depends on the sensor surface condition. Thus, the change of the
surface condition degrades the captured fingerprint images. The
degraded fingerprint images make accurate user authentication
impossible. To achieve accurate authentication, the fingerprint
sensor has to capture clear fingerprint images even though the
sensor surface condition has changed. Conventional fingerprint
sensors have no circuit technique that addresses this issue. To
solve this problem, we have developed a pixel-level automatic
calibration circuit [9].
This paper describes the pixel-level automatic calibration
circuit scheme, which initializes the sensing characteristics
and eliminates the influence of the sensor surface condition.
Section II describes the principle of pixel-level calibration.
The automatic calibration circuit and calibration control circuit
are described in Sections III and IV. Section V evaluates
the effectiveness of this scheme implemented in a fabricated
fingerprint sensor LSI on fingerprint image capture.
II. PRINCIPLE OF PIXEL-LEVEL CALIBRATION
The principle of pixel-level calibration is shown in Fig. 2,
which illustrates a pixel in the initial surface condition and a
pixel in the changed surface condition. In the initial condition,
all pixels output the same signals when a finger is not in contact
0018-9200/02$17.00 © 2002 IEEE
MORIMURA et al.: AUTOMATIC CALIBRATION CIRCUIT SCHEME FOR CAPACITIVE FINGERPRINT SENSOR LSIs
(a)
1301
(b)
Fig. 2. Principle of pixel-level calibration using variable capacitance. (a) Pixel
in the initial surface condition. (b) Pixel in the changed surface condition due to
dirt.
Fig. 4. Configuration of the automatic calibration circuit.
each pixel makes the sensor signals of all pixels the same. Then,
the fingerprint sensor LSI is initialized for fingerprint sensing.
III. AUTOMATIC CALIBRATION CIRCUIT
A. Circuit Configuration
Fig. 3.
Pixel architecture.
with the sensor surface [Fig. 2(a)]. During long-term use, however, the surface becomes dirty and a parasitic capacitance
is formed between the dirt and the sensor plate [Fig. 2(b)]. The
even when there is no finger on the
sensing circuit detects
plate. On the other hand, in the initial surface condition, there is
no extra capacitance. The output signals from the pixels thus depend on the sensor surface condition, and they become different
when the condition of the sensor surface changes. To eliminate
the influence of the sensor surface condition, we added a variand
in the figure. When
able capacitance to each pixel,
and
are adjusted such that
(1)
the signals output from the pixels in the initial condition and the
changed condition become the same because the sensed capacitances by the sensing circuits are the same. This is the principle
of the calibration. That is, the sensing circuits are calibrated by
adjusting the variable capacitance, and all pixels are initialized
to make the output signals the same.
Fig. 3 shows the pixel architecture for the pixel-level automatic calibration circuit scheme. Each pixel includes a sensing
circuit and an automatic calibration circuit. The calibration cirand a
control
cuit is composed of variable capacitance
control
circuit. For the calibration of the sensing circuit, the
by comparing the sensor signal output from
circuit adjusts
the sensing circuit with a reference signal. To eliminate the influence of the sensor surface condition on the sensor signals, the
sensing circuit is calibrated to make the sensor signal the same
as the reference signal automatically.
The calibration operation is executed when a finger is not
touching the sensor surface. The automatic calibration circuit in
Fig. 4 shows the automatic calibration circuit configuration.
is realized by capacitors connected in parallel from
to
. The
control circuit comprises an -bit counter and
to
is switched
a comparison circuit. The connection of
is
.
by the value of the -bit counter. The value of
is
The is the capacitance value of a unit capacitor. Then,
expressed as
(2)
is the value of the th significant bit in the counter.
where
that varies from 0 to
in steps is
Therefore,
realized.
circuit are initially open, and are
The switches in the
closed successively as the counter is incremented by pulses from
the comparison circuit. The comparison circuit compares the
sensor signal with a reference signal. When the sensor signal is
smaller than the reference signal, the comparison circuit outputs
a pulse signal and the counter is incremented. When the sensor
signal becomes larger than the reference signal, the comparison
circuit does not output a pulse signal and stops incrementing the
counter automatically. Thus, the automatic calibration circuit is
realized by this circuit configuration.
B. Operation
The automatic calibration operation is as shown in Fig. 5. The
horizontal axis is the number of calibration steps, and the vertical axis is the signal level of a sensing circuit. Before calibrain all pixels are set to the minimum by
tion, the values of
clearing the counter at a start condition, and the sensor signals
of all pixels are different due to the surface condition. Here, the
sensor signals of three pixels, A, B, and C, are explained. At
the start condition, the signals of pixels A, B, and C are different from each other and are smaller than the level of the reference signal. After the first calibration, the sensor signals become
larger than those for the previous sensing. This is because all
of the counters in the pixels are incremented and, from (2), the
1302
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 10, OCTOBER 2002
Fig. 6.
Fig. 5.
Variable capacitance Cv control circuit.
Operation of the automatic calibration.
value of
increases. After the second calibration, the signal of
pixel A becomes the same as (precisely speaking, a little larger
than) the reference. Then, the incrementing of the counter in
pixel A is automatically stopped after the third calibration and
the sensor signal does not increase. As for pixels B and C, the
sensor signals increase until they become larger than the refertimes for all pixels.
ence signal. The calibration is repeated
Finally, the sensor signals of pixels A, B, and C become almost
the same as the reference signal, which is the initialized condition. Thus, the sensing circuits of all pixels are calibrated.
Therefore, the automatic calibration circuit enables initialization of the fingerprint sensor LSI by calibrating the sensing
circuit in each pixel.
C. Circuit Techniques to Reduce Area
The pixel area has to be about 50 m square since the distance between ridges and valleys in a fingerprint pattern is of
the order of a hundred micrometers. Thus, the layout area of
the automatic calibration circuit has to be small. Though a finer
CMOS process would be useful in reducing the layout area, it
would increase the cost. To reduce the area of the calibration
control circuit
circuit without a cost increase, we devised a
with a counter based on a RAM-type latch and a NAND comparison circuit.
control circuit. For the counter, we used a
Fig. 6 shows the
RAM-type latch because a conventional D-flip-flop-based register is not suitable due to its large area. The RAM-type latch can
use a minimum gate-width transistor, which is used in a SRAM
cell. Accordingly, the layout area of the RAM-type latch can be
reduced to almost the size of the SRAM cell.
A conventional comparison circuit is input with analog
voltage signals. Thus, it needs transistors with large gate length
to obtain stable operation and a switch transistor to reduce the
sink current. This makes the area large. Using the NAND circuit
for the comparison circuit reduces the area increase because the
minimum gate-length transistors can be used and no additional
transistor is needed for power reduction. The sensing circuit we
developed enables us to use a NAND circuit as the comparison
circuit because the sensing circuit outputs a digital voltage
signal [5].
Fig. 7. Architecture of the calibration control circuit.
Therefore, the area of the automatic calibration circuit
control circuit is composed of a
is reduced because the
counter based on a RAM-type latch and a NAND circuit as the
comparison circuit.
IV. CALIBRATION CONTROL CIRCUIT
A calibration control circuit was devised to operate the automatic calibration circuit. Fig. 7 shows the relationship between
the pixel array and the calibration control circuit. The pixel array
is connected to select lines SL1 to SLp, which are selected by the
calibration control circuit according to the address signals. The
outputs of the pixels are connected to data lines DL1 to DLq.
The reference signal is input to all pixels. The sensing circuits
are calibrated in the pixels activated by the select lines.
The calibration control circuit is designed for both calibration and fingerprint sensing to suppress the area. In the sensing
operation, it activates one select line according to the address
signals. The activated pixels detect the capacitance between the
MORIMURA et al.: AUTOMATIC CALIBRATION CIRCUIT SCHEME FOR CAPACITIVE FINGERPRINT SENSOR LSIs
Fig. 8.
Fig. 10.
Sensing circuit with the automatic calibration circuit.
Fig. 11.
Timing chart of the calibration circuit.
1303
Calibration control circuit.
(a)
(b)
Fig. 9. Waveforms of select line (a) in the sensing mode and (b) in the
calibration mode.
finger and the sensor plates in the pixels, and output the sensor
signals to all data lines. In the calibration operation, it selects
select lines in parallel for fast calibration. A mode signal determines whether the operation mode is sensing or calibration.
Fig. 8 shows the configuration of the calibration control
circuit, which is based on an address decoder. It features some
blocks that include a signal-inverting circuit. The signal-inverting circuit is composed of exclusive-OR (E-OR) gates. In
the sensing mode, the mode signal is at a low level, and the
E-OR gates transfer the decoded signals through the select lines.
Thus, only one select line is activated according to the address
signals. In the calibration mode, the mode signal becomes high.
In a block selected by a block-select signal, the E-OR gates
invert the decoded signals. Thus, all the select lines are selected
except the one activated according to the address signals.
To calibrate all pixels, the operation is repeated
times
in each pixel as described in Section III-B. Thus, the block is
select lines. This enables us to select
designed to contain
select lines in the calibration mode, the same number as the
repeat times of calibration. Fig. 9 shows the waveforms of the
select lines in one block in fingerprint sensing and calibration
modes. In the sensing mode, only one select line is selected at a
select lines are selected due
time. In the calibration mode,
to the signal-inverting circuit. Thus, the time of the calibration
. There is no problem due
for one block is reduced to
to the parallel selection because the sensor signals output from
the pixel are connected to the data line by the wired OR and are
not conflicted.
Therefore, the calibration control circuit calibrates all the
pixels in a short time by the parallel select line selection, and
suppresses the area increase by operating in fingerprint sensing
and calibration modes.
V. EXPERIMENTAL RESULTS
A. Sensing Circuit With Calibration Circuit
To evaluate the proposed scheme, a fingerprint sensor LSI
was fabricated with the 0.5- m CMOS process and our sensor
process [6]. Fig. 10 shows the sensing circuit with the automatic
calibration circuit. The sensing circuit is composed of a sense
amplifier and voltage–time transform circuit [5]. The sensing
to
, and converts
to a timecircuit amplifies
for the sensor signal. This enables the sensor
variant signal
in the
signal to be compared with the reference pulse signal.
is the parasitic
calibration circuit is connected to node N1.
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 10, OCTOBER 2002
TABLE I
CHIP CHARACTERISTICS
Fig. 12.
Photograph of the fingerprint sensor LSI.
Fig. 14.
Fig. 13.
Photograph of the sensor surface with pencil marks.
Pixel layout.
capacitance of the sensor plate, and
is the capacitance for
and
are made of MOS capacitance.
offset adjustment.
Fig. 11 shows the timing chart of the calibration circuit. The
.
reference signal is a pulse that determines the pulsewidth
The calibration circuit compares the sensor signal with the refwith
. When
erence pulse signal. That is, it compares
, a pulse is output and the counter is incremented.
is shorter than . The comIn the first calibration step,
, which
parison circuit outputs a pulse with a width of
increments the counter from 000 to 001. In the second step,
is still shorter than
. Thus, another pulse is output, and the
is larger than .
counter changes to 010. In the third step,
Thus, the comparison circuit does not output a pulse. That is,
is greater than or equal to , the generation of pulses
when
stops automatically, and the counter remains the same. In this
approximately
way, the counter of each pixel is set to make
.
equal to
B. Evaluation With Fabricated Fingerprint Sensor Chip
Fig. 12 is a microphotograph of the fingerprint sensor LSI.
The size is 15 15 mm . The area of the sensor array is
12.8 11.2 mm . Each pixel is 50 m square. The number
of pixels is 256 224. The output signal of the sensor LSI is
control circuit is 3 bit.
256 grayscale. The counter in the
Thus, the calibration has an eight-level adjustment. The layout
of a pixel is shown in Fig. 13. The calibration circuit occupies
(a)
(b)
(c)
(d)
Fig. 15. Effectiveness of calibration. (a) Image before calibration without a
finger touch. (b) Image before calibration with a finger touch. (c) Image after
calibration without a finger touch. (d) Image after calibration with a finger touch.
almost half that area. The layout size of the calibration circuit
is reduced to 1/3 by using RAM-type latches. The sensing and
calibration time are 300 ms. The characteristics of the chip are
summarized in Table I.
To evaluate the effectiveness of calibration on a captured
image, we marked the sensor surface with a pencil. Fig. 14
shows a photograph of the sensor surface. The carbon from
the pencil simulates the dirty condition. Before calibration, the
image of the carbon is captured as shown in Fig. 15(a). This is
because the carbon on the surface forms capacitance against the
MORIMURA et al.: AUTOMATIC CALIBRATION CIRCUIT SCHEME FOR CAPACITIVE FINGERPRINT SENSOR LSIs
sensor plate. As a result, the fingerprint image is degraded by
the dirt as shown in Fig. 15(b). In conventional capacitive fingerprint sensors without the GND wall, fingerprint images are
also degraded due to the dirt. This decreases the accuracy of the
identification. On the other hand, when the fingerprint sensor
chip is calibrated, the pencil marks disappear from the image as
shown in Fig. 15(c). This is because the automatic calibration
circuit adjusts the sensor signal of each pixel. The captured
fingerprint image after calibration is shown in Fig. 15(d). The
influence of the dirt on the image is completely eliminated and
a clear image is obtained. Even though the dynamic range of
of the sensing circuit is reduced due to
the output signal
the calibration, there is no problem in practical use as shown
in Fig. 15(d). When the dirt is water or oil, the same results
are obtained. This confirms the effectiveness of the automatic
calibration circuit scheme on fingerprint sensing.
VI. SUMMARY
We proposed a pixel-level automatic calibration circuit
scheme for a capacitive fingerprint sensor LSI. This scheme
can initialize the sensing circuits in the sensor LSI to eliminate
the influence of the surface condition, such as dirt. The scheme
features an automatic calibration circuit and a calibration
control circuit. Each pixel includes the automatic calibration
circuit for pixel-level calibration, and the calibration control
circuit operates the automatic calibration circuits in the pixel
array.
The automatic calibration circuit is composed of variable caand a
control circuit. The principle of the calpacitance
control circuit adjusts the value of
ibration is that the
to make the sensor signals of all pixels the same as the initialized condition when a finger is not touching the sensor surface.
is realized by capacitors connected in parallel. The value
is adjusted by switching the connection of the capacitor
of
control circuit. The
with the value of the counter in the
control circuit is composed of a counter based on a RAM-type
latch and a NAND comparison circuit to reduce the layout area.
The calibration control circuit is based on an address decoder,
and includes a signal-inverting circuit. It selects the select lines
in parallel to calibrate all the pixels quickly, and causes no area
increase because it is shared with the control circuit for the fingerprint sensing operation.
A capacitive fingerprint sensor LSI was fabricated using the
0.5- m CMOS process and our sensor process to evaluate the
proposed scheme. The influence of the sensor surface condition
on the captured image was eliminated by initialization of the
sensor LSI, and a clear fingerprint images was obtained. In
conclusion, the proposed scheme is effective for capturing
consistent clear images in practical use, and overcomes the
problem of the degradation of the sensor surface’s condition
during long-term use.
ACKNOWLEDGMENT
The authors would like to thank T. Ogura, J. Yamada,
S. Konaka, and Y. Okazaki for their encouragement and
support, K. Tokunaga, K. Iizuka, and H. Kiya for the design of
1305
the chip, and Y. Tanabe, T. Kumazaki, K. Kudou, and M. Yano
for the fabrication of the chip.
REFERENCES
[1] M. Tartagni and R. Guerrieri, “A fingerprint sensor based on the feedback capacitive sensing scheme,” IEEE J. Solid-State Circuits, vol. 33,
pp. 133–142, Jan. 1998.
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Mendis, P. Silverman, G. Weber, B. Ackland, and L. O’Gorman, “A robust, 1.8 V 250 W direct-contact 500 dpi fingerprint sensor,” in IEEE
Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 1998, pp.
284–285.
[3] J. Lee, D. Min, J. Kim, and W. Kim, “A 600-dpi capacitive fingerprint
sensor chip and image-synthesis technique,” IEEE J. Solid-State Circuits, vol. 34, pp. 469–475, Apr. 1999.
[4] S. Jung, R. Thewes, T. Scheiter, K. Goser, and W. Weber, “A low-power
and high-performance CMOS fingerprint sensing and encoding architecture,” IEEE J. Solid-State Circuits, vol. 34, pp. 978–984, July 1999.
[5] H. Morimura, S. Shigematsu, and K. Machida, “A novel sensor cell architecture and sensing circuit scheme for capacitive fingerprint sensors,”
IEEE J. Solid-State Circuits, vol. 35, pp. 724–731, May 2000.
[6] K. Machida, S. Shigematsu, H. Morimura, Y. Tanabe, N. Sato, N.
Shimoyama, T. Kumazaki, K. Kudou, M. Yano, and H. Kyuragi, “A
novel semiconductor capacitive sensor for a single-chip fingerprint
sensor/identifier LSI,” IEEE Trans. Electron. Devices, vol. 48, pp.
2273–2278, Oct. 2001.
[7] S. Shigematsu, H. Morimura, Y. Tanabe, T. Adachi, and K. Machida, “A
single-chip fingerprint sensor and identifier,” IEEE J. Solid-State Circuits, vol. 34, pp. 1852–1859, Dec. 1999.
[8] H. Morimura, S. Shigematsu, T. Shimamura, K. Machida, and H.
Kyuragi, “A single-chip fingerprint sensor/identifier LSI,” AWAD, pp.
243–250, July 2001.
, “A pixel-level automatic calibration circuit scheme for sensing
[9]
initialization of a capacitive fingerprint sensor LSI,” in Symp. VLSI Circuits Dig. Tech. Papers, June 2001, pp. 171–174.
Hiroki Morimura (M’96) was born in Saitama,
Japan, on January 9, 1968. He received the B.E.
degree in physical electronics and the M.E. degree
in applied electronics from the Tokyo Institute
of Technology, Tokyo, Japan, in 1991 and 1993,
respectively.
In 1993, he joined Nippon Telegraph and
Telephone Corporation (NTT), Tokyo. He is
currently with NTT Lifestyle and Environmental
Technology Laboratories, Kanagawa, Japan. He
has been engaged in the research and development
of low-voltage low-power SRAM circuits. He is currently doing research on
sensing circuits for CMOS fingerprint sensors and developing single-chip
fingerprint sensor/identifier LSIs for portable equipment.
Mr. Morimura is a member of the Institute of Electronics, Information, and
Communication Engineers of Japan.
Satoshi Shigematsu (M’93) was born in Tokyo,
Japan, on August 2, 1967. He received the B.S. and
M.E. degrees in system engineering from Tokyo
Denki University, Tokyo, Japan, in 1990 and 1992,
respectively.
In 1992, he joined Nippon Telegraph and Telephone Corporation (NTT), Tokyo, Japan, where he
has been engaged in the research and development
of low-voltage low-power CMOS circuits. He is
currently with NTT Lifestyle and Environmental
Technology Laboratories, Kanagawa, Japan. His
research interests include biometrics sensor technology and low-power and
high-speed circuit design techniques. He is currently doing research on parallel
processing circuits for CMOS fingerprint identifier and developing single-chip
fingerprint sensor and identifier LSIs and user authentication systems.
Mr. Shigematsu is a member of the Institute of Electronics, Information, and
Communication Engineers of Japan and the Information Processing Society of
Japan.
1306
Toshishige Shimamura (M’01) was born in Kanagawa, Japan, on November 30, 1972. He received the
B.E. degree in physical electronics and the M.E. degree in advanced applied electronics from the Tokyo
Institute of Technology, Tokyo, Japan, in 1995 and
1997, respectively.
In 1997, he joined Nippon Telegraph and Telephone Corporation (NTT), Tokyo, Japan, where
he has been engaged in the research and development of low-voltage low-power CMOS circuits.
He is currently doing research on analog-circuit
design, testing, and reliability for CMOS fingerprint sensors, and developing
single-chip fingerprint sensor/identifier LSIs.
Mr. Shimamura is a member of the Institute of Electronics, Information, and
Communication Engineers of Japan.
Katsuyuki Machida (M’99) was born in Nagasaki,
Japan, on April 16, 1954. He received the B.E., M.E.,
and Dr. Eng. degrees in electronics engineering from
the Kyushu Institute of Technology, Kitakyusyu,
Japan, in 1979, 1981, and 1995, respectively.
In 1981, he joined the Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation (NTT), Musashino, Tokyo,
Japan. Since then, he has been engaged in research
on ECR plasma CVD and the development of LSI
process and manufacturing technologies. He is currently a Senior Research Engineer, Supervisor, with the NTT Telecommunications Energy Laboratories, Atsugi, Kanagawa, Japan. He is currently engaged in
research and development on the material and manufacturing technologies for
MEMS.
Dr. Machida is a member of the Japan Society of Applied Physics.
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 10, OCTOBER 2002
Hakaru Kyuragi was born in Fukuoka, Japan, on
October 4, 1954. He received the B.E., M.E., and Dr.
Eng. degrees in electronic engineering from Kyoto
University, Kyoto, Japan, in 1978, 1980, and 2000,
respectively.
Since he joined the Nippon Telegraph and
Telephone Public Corporation (NTT), Tokyo, Japan,
in 1980, he has been involved in the research and
development of Si CMOS process technology,
synchrotron radiation-excited processes, and the
application of Si-based technology to fingerprint
sensor, MEMS and millimeter-wave component module. He is currently
an Executive Manager in the Low-Energy Electronics Laboratory, NTT
Telecommunications Energy Laboratories, Atsugi, Kanagawa, Japan.
Dr. Kyuragi is a member of the Japan Society of Applied Physics and the
Institute of Electronics, Information, and Communication Engineers.