Download MAX5051 Parallelable, Clamped Two-Switch Power

EVALUATION KIT AVAILABLE
MAX5051
General Description
The MAX5051 is a clamped, two-switch power-supply
controller IC. This device can be used both in forward or
flyback configurations with input voltage ranges from 11V
to 76V. It provides comprehensive protection mechanisms
against possible faults, resulting in very high reliability
power supplies. When used in conjunction with secondary
side synchronous rectification, power-supply efficiencies
can easily reach 92% for a +3.3V output power supply
operated from a 48V bus. The integrated high- and lowside gate drivers provide more than 2A of peak gate-drive
current to two external N-channel MOSFETs. Low startup
current reduces the power loss across the bootstrap
resistor. A feed-forward voltagemode topology provides
excellent line rejection while avoiding the pitfalls of traditional current-mode control.
The MAX5051 power-supply controller is primary as well
as secondary-side parallelable, allowing the design of
scaleable power systems when necessary. When paralleling the primary side, dedicated pins allow for simultaneous wakeup or shutdown of all paralleled units, thus preventing current-hogging during startup or fault conditions.
The MAX5051 generates a lookahead signal for driving
secondary-side synchronous MOSFETs. Special primaryside synchronization inputs/outputs allow two primaries to
be operated 180° out of phase for increased output power
and lower input ripple currents.
The MAX5051 is available in a 28-pin TSSOP-EP package and operates over a wide -40°C to +125°C temperature range.
Warning: The MAX5051 is designed to work with high
voltages. Exercise caution.
Applications
●● High-Efficiency, Isolated Telecom/Datacom
Power Supplies
●● 48V and 12V Server Power Supplies
●● 48V Power-Supply Modules
●● Industrial Power Supplies
19-2964; Rev 2; 5/14
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Features
●● Wide Input Voltage Range, 11V to 76V
●● Voltage Mode with Input Voltage Feed-Forward
●● Ripple-Phased Parallel Topology for High Current/
Power Output
●● 2A Integrated High- and Low-Side MOSFET Drivers
●● SYNCIN And SYNCOUT Pins Enable 180° Out-OfPhase Operation
●● Programmable Brownout and Bootstrap UVLOs
●● High-Side Driver Bootstrap Capacitor Precharge
Driver
●● Low Current-Limit Threshold for High Efficiency
●● Programmable Switching Frequency
●● Reference Voltage Soft-Start for Startup Without
Overshoots
●● Startup Synchronization with Multiple Paralleled
Primaries
●● Programmable Integrating Current-Limit Fault
Protection
●● Look-Ahead PWM Signal for Secondary-Side
Synchronous Rectifier Drivers
●● Look-Ahead Drivers for Either A High-Speed
Optocoupler or Pulse Transformer
●● Wide -40°C to +125°C Operating Range
●● Thermally Enhanced 28-Pin TSSOP Package
Ordering Information
PART
MAX5051AUI*
TEMP RANGE
PIN-PACKAGE
-40°C to +85°C
28-TSSOP-EP**
*Contact factory for availability.
**EP = Exposed pad.
Pin Configuration appears at end of data sheet.
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Absolute Maximum Ratings
AVIN, PVIN, XFRMRH to GND..............................-0.3V to +80V
BST to GND...........................................................-0.3V to +95V
BST, DRVH to XFRMRH........................................-0.3V to +12V
REG9, DRVDD, DRVL to GND..............................-0.3V to +12V
DRVB, LXVDD, LXL, LXH to GND.........................-0.3V to +12V
UVLO, STT, COMP, CON to GND.........................-0.3V to +12V
FLTINT, RCFF to GND...........................................-0.3V to +12V
REG5, CS, CSS, FB to GND...................................-0.3V to +6V
STARTUP, SYNCIN to GND.....................................-0.3V to +6V
SYNCOUT, RCOSC to GND....................................-0.3V to +6V
PGND to GND.......................................................-0.3V to +0.3V
LXL, LXH Current Continuous...........................................±50mA
DRVL, DRVH Current Continuous..................................±100mA
DRVL, DRVH Peak Current (<500ns)....................................±5A
PVIN, REG9 Continuous Current....................................+120mA
REG5 Continuous Current................................................+80mA
DRVB, RCFF, RCOSC, CSS Continuous Current............±20mA
COMP, SYNCOUT Continuous Current............................±20mA
REG9, REG5, and COMP Short to GND...................Continuous
Continuous Power Dissipation (TA = +70°C)
28-Pin TSSOP (derate 23.8mW/°C above +70°C).....1905mW
Operating Temperature Range.......................... -40°C to +125°C
Maximum Junction Temperature (TJ)............................... +150°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (soldering, 10s).................................. +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
TSSOP
Junction-to-Ambient Thermal Resistance (θJA)...........42°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF,
CREG5 = 4.7μF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
300
450
µA
400
650
µA
0.65
1
mA
8
12
mA
76
V
SUPPLY CURRENT (AVIN, PVIN)
AVIN Standby Current
IASTBY
PVIN Standby Current
IPSTBY
AVIN Supply Current
IAVIN
PVIN Supply Current
IPVIN
AVIN Input Voltage Range
VAVIN = VPVIN = 11V to 76V;
VSTARTUP = VCS = 0V;
VBST = VXFRMRH = VDRVDD = VREG9;
RCFF floating
VAVIN = VPVIN = 11V to 76V;
VCS = 0V; VBST = VDRVDD = VREG9;
VXFRMRH = 0V; STARTUP,
RCFF floating
Inferred from AVIN supply current test
11
+9V LDO (REG9)
PVIN Input Voltage Range
VPVIN
Inferred from PVIN supply current test
11
76
V
REG9 Output-Voltage Set Point
VREG9
VPVIN = 11V
8.3
9.0
V
REG9 Line Regulation
VPVIN = 11V to 76V
REG9 Load Regulation
IREG9 = 0 to 80mA
www.maximintegrated.com
0.1
mV/V
250
mV
Maxim Integrated │ 2
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Electrical Characteristics (continued)
(AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF,
CREG5 = 4.7μF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.)
REG9 Dropout Voltage
PARAMETER
IREG9 = 80mA
SYMBOL
REG9 Undervoltage Lockout
Threshold
CONDITIONS
VREG9 falling
0.5
MIN
TYP
5.7
REG9 Undervoltage Lockout
Threshold Hysteresis
V
MAX
UNITS
6.7
V
750
mV
+5V LDO (REG5)
REG5 Output-Voltage Set Point
VREG5
4.8
REG5 Load Regulation
IREG5 = 0 to 40mA
REG5 Dropout Voltage
IREG5 = 40mA, measured with respect
to VREG9
5.1
V
50
mV
0.5
V
SOFT-START/REFERENCE (CSS)
Reference Voltage
VCSS
Soft-Start Pullup Current
ICSS
1.125
1.235
1.255
70
V
µA
ERROR AMPLIFIER (CSS, FB, COMP)
FB Input Range
VFB
Inferred from FB offset voltage test
FB Input Current
IFB
VFB = VREF
0
2.1
3
V
±250
nA
6.0
V
COMP Output Range
Inferred from FB offset voltage test
COMP Output Sink Current
VFB = 3V
20
mA
COMP Output Source Current
VFB = 0V
30
mA
Open-Loop Gain
GA
2.1V < VCOMP < 6V
80
dB
Unity-Gain Bandwidth
BW
CCOMP = 50pF, ICOMP = ±5mA
3
MHz
FB Offset Voltage
VOS
VFB = 0 to 3V; VCOMP = 2.1V to 6V;
ICOMP = -5mA to +5mA
COMP Output Slew Rate
SR
CCOMP = 50pF
-3
+3
1
mV
v/µs
PVIN UNDERVOLTAGE LOCKOUT (STT)
PVIN Undervoltage Lockout
STT Threshold
VSTT
STT Input Impedance
RSTT
VPVIN rising
22
23.5
25
V
VSTT rising
1.18
1.24
1.30
V
100
kΩ
INTEGRATING FAULT PROTECTION (FLTINT)
FLTINT Source Current
IFLTINT
μA
FLTINT Shutdown Threshold
VFLTINTSD
V
FLTINT Restart Hysteresis
VFLTINTHY
V
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Maxim Integrated │ 3
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Electrical Characteristics (continued)
(AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF,
CREG5 = 4.7μF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OSCILLATOR (RCOSC, SYNCIN, SYNCOUT)
PWM Period
Maximum PWM Duty Cycle
tS
RRCOSC = 24kΩ, CRCOSC = 100pF
3.9
μs
DMAX
RRCOSC = 24kΩ, CRCOSC = 100pF
48
%
1
MHz
500
kHz
Maximum RCOSC Frequency
fRCOSCMAX
Maximum SYNCIN Frequency
fSYNCIN
50% duty cycle
SYNCIN High-Level Voltage
VHSYNCIN
Pulse rising
SYNCIN Low-Level Voltage
VLSYNCIN
Pulse falling
2.1
V
0.8
V
SYNCIN Pulldown Resistor
100
kΩ
SYNCIN Rising to SYNCOUT
Falling Delay
30
ns
SYNCIN Falling to SYNCOUT
Rising Delay
70
ns
SYNCOUT Voltage High
Sourcing 1.2mA
SYNCOUT Voltage Low
Sinking 2.4mA
RCOSC Peak Trip Level
4.5
VTH
5.1
V
0.3
V
2.5
V
RCOSC Valley Trip Level
0.2
V
RCOSC Input Bias Current
-0.3
μA
RCOSC Discharge MOSFET
RDS(ON)
Sinking 10mA
50
RCOSC Discharge Pulse Width
100
50
Ω
ns
UNDERVOLTAGE LOCKOUT (UVLO)
UVLO Threshold
VUVLO
UVLO Hysteresis
VHYS
UVLO Input Bias Current
IBUVLO
VUVLO rising
1.18
1.24
1.30
130
VUVLO = 2.5V
V
mV
-100
+100
nA
0
3
V
100
Ω
0
6
V
2.2
2.4
V
PWM COMPARATOR
RCFF Input Voltage Range
Feed-Forward Discharge
MOSFET RDS(ON)
RDS(RCFF)
CON Input Voltage Range
RCFF Level-Shift Voltage
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VCPWM
Sinking 10mA
50
Maxim Integrated │ 4
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Electrical Characteristics (continued)
(AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF,
CREG5 = 4.7μF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.)
PARAMETER
SYMBOL
CON Input Bias Current
Propagation Delay to Output
CONDITIONS
ICON
tdCPWM
MIN
TYP
-2
DRVH, DRVL = unconnected, overdrive
= 50mV, measured from CON to DRVL
MAX
UNITS
+2
μA
90
ns
SYNCHRONOUS RECTIFIER PULSE TRANSFORMER DRIVER (LXVDD, LXH, LXL)
High-Side MOSFET R DS(ON)
RDSLXH
LXH sourcing 10mA, VLXVDD = VREG5
Low-Side MOSFET RDS(ON)
RDSLXL
LXL sinking 10mA, VLXVDD = VREG5
3
6.5
12
Ω
2.0
5
10
Ω
LXH Rising to DRVL Rising
Delay
90
ns
CURRENT-LIMIT COMPARATOR (CS)
Current-Limit Threshold Voltage
VILIM
144
Current-Limit Input Bias Current
IBILIM
0 < VCS < 0.3V
Propagation Delay to Output
tdILIM
DRVH, DRVL = unconnected, overdrive
= 10mV, measured from CS to DRVL
154
-2
164
mV
+2
μA
100
ns
LOW-SIDE MOSFET DRIVER (DRVDD, DRVL, PGND)
Peak Source Current
VDRVL = 0V, pulse width < 100ns;
VDRVDD = VREG9
2
A
Peak Sink Current
VDRVL = VREG9, pulse width < 100ns;
VDRVDD = VREG9
3
A
DRVL Resistance Sourcing
IDRVL = 50mA, VDRVDD = VREG9
1.7
3.5
Ω
DRVL Resistance Sinking
IDRVL = -50mA, VDRVDD = VREG9
0.6
1.4
Ω
HIGH-SIDE MOSFET DRIVER (BST, DRVH, XFRMRH)
Peak Source Current
VDRVH = GND, pulse width < 100ns,
VBST = VREG9, VXFRMRH = 0V
2
A
Peak Sink Current
VDRVH = VBST, pulse width < 100ns,
VBST = VREG9, VXFRMRH = 0V
5
A
DRVH Resistance Sourcing
IDRVH = 50mA, VBST = VREG9,
VXFRMRH = 0V
1.7
3.5
Ω
DRVH Resistance Sinking
IDRVH = -50mA, VBST = VREG9,
VXFRMRH = 0V
0.6
1.4
Ω
Skew Between Low-Side and
High-Side Drivers
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0
ns
Maxim Integrated │ 5
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Electrical Characteristics (continued)
(AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF,
CREG5 = 4.7μF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and reference outputs unconnected except for bypass capacitors.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
BOOST CAPACITOR CHARGE MOSFET (DRVB)
DRVB Resistance Sourcing
IDRVB = 50mA
8
35
Ω
DRVB Resistance Sinking
IDRVB = 50mA
5
35
Ω
Delay from Clock Fall
200
ns
One-Shot Pulse Width
300
ns
STARTUP (STARTUP)
Startup Threshold
VSTARTUP
VSTARTUP rising
1.4
2.1
Startup Threshold Hysteresis
V
330
Internal Pullup Current
ISTARTUP
mV
50
STARTUP Pulldown MOSFET
RDS(ON)
100
μA
Sinking 10mA
Ω
OVERTEMPERATURE SHUTDOWN
Shutdown Junction Temperature
Temperature rising
Hysteresis
150
°C
10
°C
Typical Operating Characteristics
(VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF, CREG5 =
4.7μF, TA = +25°C, unless otherwise noted.)
270
260
250
240
230
220
260
250
240
230
220
210
200
10
20
30
40
50
60
AVIN SUPPLY VOLTAGE (V)
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70
80
180
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
600
PVIN STANDBY CURRENT
vs. SUPPLY VOLTAGE
MAX5051 toc03
VUVLO = 0V
190
210
200
270
PVIN STANDBY CURRENT (µA)
280
280
AVIN STANDBY CURRENT
vs. TEMPERATURE
MAX5051 toc02
VUVLO = 0V
AVIN STANDBY CURRENT (µA)
AVIN STANDBY CURRENT (µA)
290
MAX5051 toc01
300
AVIN STANDBY CURRENT
vs. AVIN SUPPLY VOLTAGE
VUVLO = 0V
500
400
300
200
100
0
10
20
30
40
50
60
70
80
PVIN SUPPLY VOLTAGE (V)
Maxim Integrated │ 6
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Typical Operating Characteristics (continued)
(VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF, CREG5 =
4.7μF, TA = +25°C, unless otherwise noted.)
400
300
200
100
-25
0
25
50
75
100
23.3
23.2
23.1
23.0
125
-50
-25
0
25
50
75
100
125
MAX5051 toc06
8.802
8.799
8.796
8.793
8.970
10
20
30
40
50
60
70
TEMPERATURE (°C)
PVIN VOLTAGE (V)
REG9 OUTPUT VOLTAGE
vs. TEMPERATURE
REG9 OUTPUT VOLTAGE
vs. REG9 OUTPUT CURRENT
REG5 OUTPUT VOLTAGE
vs. REG5 OUTPUT CURRENT
8.84
8.82
8.80
8.78
8.76
8.74
8.9
8.8
8.7
8.6
8.5
8.4
8.3
8.2
6.0
80
MAX5051 toc09
8.86
9.0
REG5 OUTPUT VOLTAGE (V)
MAX5051 toc07
8.88
REG9 OUTPUT VOLTAGE (V)
23.4
8.805
TEMPERATURE (°C)
8.90
5.6
5.2
4.8
4.4
8.1
8.72
8.70
23.5
MAX5051 toc08
-50
REG9 OUTPUT VOLTAGE (V)
0
STT = FLOATING
REG9 OUTPUT VOLTAGE (V)
500
23.6
REG9 OUTPUT VOLTAGE
vs. PVIN VOLTAGE
MAX5051 toc05
VUVLO = 0V
PVIN STARTUP VOLTAGE (V)
MAX5051 toc04
PVIN STANDBY CURRENT (µA)
600
PVIN STARTUP VOLTAGE
vs. TEMPERATURE
PVIN STANDBY CURRENT
vs. TEMPERATURE
-50
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
8.0
0
20
40
60
80
100 120 140 160
REG9 OUTPUT CURRENT (mA)
4.0
0
10
20
30
40
50
60
70
80
90
REG5 OUTPUT CURRENT (mA)
Maxim Integrated │ 7
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Typical Operating Characteristics (continued)
(VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF, CREG5 =
4.7μF, TA = +25°C, unless otherwise noted.)
4.997
4.996
4.995
4.994
4.993
4.992
-25
0
25
50
75
100
0
125
-50
-25
0
25
50
75
100
SOFT-START/REFERENCE VOLTAGE
vs. TEMPERATURE
CSS SOFT-START CURRENT
vs. TEMPERATURE
1.220
1.215
1.210
1.205
-25
0
25
50
75
100
6.8
6.7
-50
-25
0
25
50
75
100
MAX5051 toc14
1.240
1.235
1.230
80
75
1.225
1.220
1.215
70
1.210
65
1.205
-50
-25
0
25
50
75
100
1.200
125
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
STT STARTUP THRESHOLD
vs. TEMPERATURE
FLTINT CURRENT vs. TEMPERATURE
RCFF LEVEL-SHIFT VOLTAGE
vs. TEMPERATURE
95
MAX5051 toc16
94
FLTINT CURRENT (µA)
1.230
1.225
1.220
1.215
1.210
93
92
91
90
89
88
87
1.205
86
-25
0
25
50
75
TEMPERATURE (°C)
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100
125
125
UVLO THRESHOLD vs. TEMPERATURE
TEMPERATURE (°C)
1.235
-50
6.9
TEMPERATURE (°C)
85
60
125
7.0
85
2.30
125
MAX5051 toc18
-50
VPVIN = 12V
7.1
6.6
125
UVLO (V)
1.225
90
CSS SOFT-START CURRENT (µA)
1.230
1.240
STT (V)
200
TEMPERATURE (°C)
1.235
1.200
300
TEMPERATURE (°C)
1.240
1.200
400
RCFF LEVEL-SHIFT VOLTAGE (V)
-50
MAX5051 toc13
SOFT-START/REFERENCE VOLTAGE (V)
1.245
500
100
4.991
4.990
600
7.2
PVIN SUPPLY CURRENT
vs. TEMPERATURE
MAX5051 toc15
4.998
VUVLO = 0V
MAX5051 toc17
OUTPUT VOLTAGE (V)
4.999
700
PVIN SUPPLY CURRENT (mA)
5.000
AVIN SUPPLY CURRENT (µA)
MAX5051 toc10
5.001
MAX5051 toc11
AVIN SUPPLY CURRENT
vs. TEMPERATURE
MAX5051 toc12
REG5 OUTPUT VOLTAGE
vs. TEMPERATURE
2.29
2.28
2.27
2.26
2.25
2.24
2.23
2.22
2.21
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
2.20
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
Maxim Integrated │ 8
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Typical Operating Characteristics (continued)
(VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF, CREG5 =
4.7μF, TA = +25°C, unless otherwise noted.)
20
145
0
0
25
50
75
100
125
0.1
60
1
10
DRVH AND DRVL RDSON
vs. TEMPERATURE
LXL AND LXH RDSON
vs. TEMPERATURE
-25
-50
0
25
50
75
4
125
0.980
0.970
0.960
0.950
MAX5051 toc23
-40
-15
-50
-25
10
35
60
85
0
25
50
75
TEMPERATURE (°C)
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100
125
MAX5051 toc21
30
25
20
15
110
130
120
SYNCIN FALL
TO SYNCOUT RISE
110
0
40
80
90
80
70
60
50
120
160
200
RRCOSC (kΩ)
100
30
125
5
SYNCIN RISE TO SYNCOUT FALL
DRVH MAXIMUM DUTY CYCLE
vs. TEMPERATURE
50.0
49.6
49.2
48.8
48.4
48.0
47.6
47.2
46.8
40
SWITCHING
100
35
0
DRVH DUTY CYCLE (%)
0.990
75
40
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
MAX5051 toc25
1.000
50
SWITCHING PERIOD vs. RRCOSC
SYNCIN TO SYNCOUT PROPAGATION
DELAY vs. TEMPERATURE
NORMALIZED SWITCHING FREQUENCY
vs. TEMPERATURE
1.010
25
10
TEMPERATURE (°C)
1.020
0
45
LXH SINKING 10mA
5
100
-25
-50
50
7
6
DRVH AND DRVL SINKING 50mA
ISINK = 5mA
2
TEMPERATURE (°C)
MAX5051 toc26
1.5
3
0
LXH SOURCING 10mA
8
4
1
10
RDSON (Ω)
2.0
5
0
1000 10,000
11
9
6
30
12
MAX5051 toc22
DRVH AND DRVL SOURCING 50mA
0.5
100
FREQUENCY (kHz)
1.0
NORMALIZED SWITCHING FREQUENCY
90
PHASE
-20
0.01
3.0
RDSON (Ω)
120
TEMPERATURE (°C)
3.5
2.5
150
ISOURCE = 5mA
MAX5051 toc27
-25
-50
4.0
0
180
40
150
7
MAX5051 toc24
GAIN (dB)
155
8
240
210
60
160
140
GAIN
270
COMP OUTPUT VOLTAGE (V)
80
COMP OUTPUT VOLTAGE
vs. TEMPERATURE
SWITCHING PERIOD (µs)
165
MAX5051 toc20
100
MAX5051 toc19
CS THRESHOLD VOLTAGE (mV)
170
OPEN-LOOP GAIN/PHASE
vs. FREQUENCY
PHASE (DEGREES)
CURRENT-LIMIT THRESHOLD
vs. TEMPERATURE
46.4
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
46.0
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
Maxim Integrated │ 9
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Typical Operating Characteristics (continued)
(VAVIN = VPVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF, CREG5 =
4.7μF, TA = +25°C, unless otherwise noted.)
100
95
90
85
80
75
70
50mV OVERDRIVE
140
130
120
110
100
90
65
60
150
CS CURRENT LIMIT TO DRVH
PROPAGATION DELAY vs. TEMPERATURE
MAX5051 toc29
50mV OVERDRIVE
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
105
MAX5051 toc28
110
CON TO DRVL PROPAGATION DELAY
vs. TEMPERATURE
-50
-25
0
25
50
75
100
125
80
-50
TEMPERATURE (°C)
-25
0
25
50
75
100
125
TEMPERATURE (°C)
Pin Description
PIN
NAME
1
RCOSC
2
SYNCOUT
3
RCFF
Feed-Forward Input. Connect a resistor from RCFF to AVIN and a capacitor from RCFF to GND. This is
the PWM ramp.
4
CON
PWM Comparator Noninverting Input. Connect CON to the optocoupler output for isolated applications,
or to COMP for nonisolated applications.
5
CSS
Soft-Start and Reference. Connect a 0.01μF or greater capacitor from CSS to GND. The 1.24V
reference voltage appears across this capacitor.
6
COMP
7
FB
8
REG5
5V Linear Regulator Output. Bypass REG5 to GND with a 4.7μF ceramic capacitor.
9
REG9
9V Linear Regulator Output. Bypass REG9 to GND with a 4.7μF ceramic capacitor.
10
PVIN
Regulator Voltage Input. Voltage input to the internal 5V and 9V linear regulators. A high-value resistor
connected from the input supply to PVIN provides the necessary current to charge up the startup
capacitor, and the 400μA standby current required by the MAX5051. After startup, the output of a tertiary
winding is used to provide continued bias to the controller.
11
STT
Startup Threshold Input. Leave STT floating for a default startup voltage of 24V at PVIN. STT can be
modified by connecting external resistors. For high accuracy, choose external resistors with 50kΩ or less
impedance looking back into the divider.
12
LXVDD
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FUNCTION
Reset Input. Drive RESET low to clear all latches and registers (all outputs are turned off). All OUT
pulldown currents are disabled when RESET = low.
Synchronization Output. Synchronization signal to drive SYNCIN of a second MAX5051, if used.
Internal Error Amplifier Output.
Feedback Input. Inverting input of the internal error amplifier. The soft-started reference is connected to
the noninverting input of this amplifier.
Supply Input for the Secondary-Side Synchronous Pulse Transformer or Optocoupler Driver. LXVDD is
normally connected to REG5.
Maxim Integrated │ 10
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Pin Description (continued)
PIN
NAME
FUNCTION
13
LXH
Synchronous-Pulse Transformer Driver, PMOS Open Drain. LXH is the high-side driver for the
secondaryside synchronous-pulse transformer. LXH can also drive a high-speed switching optocoupler.
If not used, connect LXH to LXVDD.
14
LXL
Synchronous-Pulse Transformer Driver, NMOS Open Drain. LXL is the low-side driver for the
secondaryside synchronous-pulse transformer. LXL can also drive a high-speed switching optocoupler. If
not used, connect LXL to PGND.
15
CS
Current-Sense Input. The current-limit threshold is internally set to 156mV relative to PGND. The device
has an internal noise filter. If necessary, connect an additional external RC filter.
16
DRVL
Gate-Drive Output for Low-Side MOSFET. DRVL is capable of sourcing and sinking approximately 2A
peak current.
17
PGND
Power Ground.
18
DRVDD
19
DRVB
20
XFRMRH
21
DRVH
Supply Input for Low-Side MOSFET Driver. Bypass DRVDD locally with good quality 1μF || 0.1μF
ceramic capacitors. DRVDD is normally connected to REG9.
Gate-Drive Output for Boost MOSFET. Connect the gate of a small high-voltage external FET to this pin
to enable charging of the high-side boost capacitor connected between pins 20 and 22. This FET may
be necessary to keep the boost capacitor charged at light loads.
Transformer Input. Transformer primary high-side connection.
Gate-Drive Output for High-Side MOSFET.
22
BST
Boost Input. Boost supply connection point for the high-side MOSFET driver. Connect at least a 1μF
|| 0.1μF ceramic capacitor from BST to XFRMRH with short and wide PC board traces. If the voltage
across the boost capacitor falls below the high-side undervoltage lockout threshold, the DRVH output
stops switching.
23
AVIN
Supply Voltage Input. Connect AVIN directly to the input supply line.
24
GND
Analog Signal Ground
25
UVLO
Undervoltage Lockout Input. An external voltage-divider from the input supply sets the startup voltage;
the threshold is 1.24V with 130mV hysteresis. UVLO can also be used as a shutdown input. If unused,
connect UVLO to REG5
26
STARTUP
Startup Input. STARTUP coordinates simultaneous startup of multiple units from faults, during initial
turnon, and UVLO recovery. When paralleling the secondaries of two MAX5051’s, the STARTUP inputs
of each device must be connected together.
FLTINT
Fault Integration Input. During persistent current-limit faults, a capacitor connected to FLTINT is charged
with an internal 90µA current source. Switching is terminated when the voltage reaches 2.9V. An
external resistor connected in parallel discharges the capacitor. Switching resumes when the voltage
drops to 2V.
SYNCIN
Synchronization Input. SYNCIN accepts the synchronization signal from SYNCOUT of another
MAX5051 and shifts the switching of the synchronized unit by 180° allowing the reduction of input
bypass capacitors. The MAX5051 switches at the same frequency at SYNCIN. SYNCIN must be 50%
duty cycle. Leave SYNCIN floating if unused.
27
28
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Maxim Integrated │ 11
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Functional Diagram
9V
LDO
PVIN
REG9
5V
LDO
REG9 OK
18R
REG5 OK
OVER
TEMP
STT
R
REG5
MAX5051
THERMAL
SHUTDOWN
BST
1.25V
1.125V
25µs
RISINGEDGE
DELAY
UVLO
LEVEL
SHIFT
60ns
RISINGEDGE
DELAY
SHDN
DRVH
XFRMRH
DRVDD
DRVL
PGND
1.25V
1.125V
LXVDD
INTERNAL
REGULATOR
AVIN
INTERNAL
SUPPLY
1.25V
REFERENCE
LEVEL
SHIFT
LXH
LXL
80µA
OSC
RCOSC
FLTINT
SYNCIN
2.7V/1.8V
SYNCOUT
CS
RCFF
2.34V
CPWM
CILIM
SHDN
1
D
CON
S
R
COMP
156mV
10MHz
Q
Q
2.7V/1.8V
50µA
FB
E/A
STARTUP
64µA
CSS
DRVDD
SHDN
GND
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SSA
1.25V
200ns
RISINGEDGE
DELAY
300ns
ONE
SHOT
LEVEL
SHIFT
DRVB
Maxim Integrated │ 12
MAX5051
Detailed Description
The MAX5051 controller IC is designed for two-switch
forward converter power-supply topologies. It incorporates an advanced set of protection features that makes
it uniquely suitable when high reliability and comprehensive fault protection are required, as in power supplies
intended for telecommunication equipment. The device
operates over a wide 11V to 76V supply range. By using
the MAX5051 with a secondary-side synchronous rectifier
circuit, a very efficient low output voltage and high outputcurrent power supply can be designed.
In a typical application, the AVIN pin is connected directly
to the input supply. The PVIN pin is connected to the input
supply through a bleed resistor. This is used to charge up
a reservoir capacitor. When the voltage across this capacitor reaches approximately 24V, then primary switching
commences. If the tertiary winding is able to supply bias
to the IC, then self boot-strapping takes place and operation continues normally. If the voltage across the reservoir capacitor connected to PVIN falls below 6.2V, then
switching stops and the capacitor starts charging up again
until the voltage across it reaches 24V.
This device incorporates synchronization circuitry,
enabling the direct paralleling of two devices for higher
output power and lower input ripple current. Using a
single pin, the circuitry synchronizes and shifts the phase
of the second device by 180°. To enable simultaneous
wakeup and shutdown, a STARTUP pin is provided.
Connect all the STARTUP pins of all MAX5051 devices
together to facilitate parallel operation in the primary side.
When each power supply generates different output voltages, connecting the STARTUP pins is not necessary.
Power Topology
The two-switch forward-converter topology offers outstanding robustness against faults and transformer saturation while allowing the use of SO-8 power MOSFETs
with a voltage rating equal to only that of the input supply
voltage.
Voltage-mode control with feed-forward compensation
allows the rejection of input supply disturbances within
a single cycle, similar to that of current-mode controlled
topologies. This control method offers some significant
benefits not possible with current-mode control. These
benefits are:
●● No minimum duty-cycle requirement because of
current-signal blanking;
www.maximintegrated.com
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
●● Clean modulator ramp and higher amplitude for
increased stability;
●● Stable operating current of the optocoupler LED and
phototransistor for maximized control-loop bandwidth
(in current-mode applications, the optocoupler bias
point is output-load dependent);
●● Predictable loop dynamics simplifying the design of
the control loop.
The two-switch power topology has the added benefit of
recovering practically all magnetizing as well as the leakage energy stored in the parasitics of the isolation transformer. The lower clamped voltages on the primary power
FETs allow for the use of low RDS(ON) devices. Figure 2
shows the schematic diagram of a 48V input 3.3V/10A
output power supply built around the MAX5051.
MOSFET Drivers
The MAX5051’s integrated high- and low-side MOSFET
drivers source and sink up to 2A of peak currents, resulting
in very low losses even when switching high gate charge
MOSFETs. The high-side gate driver requires its own
bypass capacitor connected between BST and XFRMRH.
Use high-quality ceramic capacitors close to these two
pins for bypass. Under normal operating conditions, the
energy stored in the transformer parasitics swings the
XFRMRH pin to ground while the transformer is resetting.
During this time, the charge on the boost capacitor connected to the BST pin is replenished. However, under certain conditions, such as when the magnetizing inductance
of the transformer is very high or when using conventional
rectification at the output, the duty cycle with light loads
may become very small. Thus, the energy stored could
be insufficient to swing XFRMRH to ground and replenish
the boost capacitor. Figure 3 shows the equivalent circuit
during the magnetizing inductance reset interval, assuming synchronous rectification where the output inductor is
not allowed to run discontinuous.
If the magnetizing inductance is kept below the following minimum, then the boost capacitor charge will not
deplete:
L M ≤ 0.294 d 2
2
VIN
f M Qg total + (0.005A) f S
where d is the duty cycle, VIN is the input voltage, fS is the
switching frequency, and Qgtotal is the total gate charge
for the high-side MOSFET. The above formula is only
an approximation; the actual value will depend on other
parasitics as well.
Maxim Integrated │ 13
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
VIN+
D4
MA111CT
R9
15kΩ
FLTINT
MAX5051
STARTUP
N1
SI4486
USED FOR
BOOST
CAPACITOR
PRECHARGE
DRVL
CS
PGND
L1
2µH
D5
T1
3.3V
10A
C4
3 x 270µF
N2
SI4486
RLOAD
D2
B2100
LXL
LXH
LXVDD
SYNCOUT
REG5
UVLO
FB
COMP
fs = 250kHz
D1
N3
BSS123
DRVB
CON
T1
LM: 150µH
P: 14T
S: 4T
T: 6T
B2100
DRVH
RCFF
R13
100kΩ
C5
1µF
DRVDD
RCOSC
C14
390pF
C7
4.7µF
XFRMRH
GND
C13
100pF
D3
BAT46W
R5
10Ω
BST
REG9
SYNCIN
PVIN
AVIN
CSS
C12
220nF
C8
4.7µF
C11
0.1µF
STT
R12
1MΩ
R6
47Ω
R3
475Ω
R4
28mΩ
R14
24.9kΩ
C3
150nF
U2
R15
1MΩ
R8
2.2kΩ
R10
10Ω
R11
39.2kΩ
C10
4.7µF
PS2913
R7
360Ω
C9
1µF
C2
220nF
C6
270nF
C1
47nF
MAX8515
VIN-
R1
11.5kΩ
R2
2.55kΩ
Figure 2. Typical Application Circuit
If the charge stored on the boost capacitor is not adequately replenished then the gate-driver lockout for the
high-side MOSFET is triggered, stopping the high side
from switching. The low side continues switching, eventually recharging the capacitor, at which point the high
side starts switching again. To prevent this behavior, use
the boost capacitor’s cycle-by-cycle charging circuit to
prevent unwanted shutdowns of the high side (Figure 2).
Connect the gate of a small high-voltage FET (with the
same voltage rating or higher as the main FETs) to the
DRVB output of the MAX5051. Connect the drain of this
FET to XFRMRH, and connect the source to the primary
ground. DRVB will briefly (300ns) turn this FET ON every
cycle after the main PWM clock terminates. This allows
the boost capacitor to be replenished under all conditions,
even when switching stops completely. A suitable FET for
this is BSS123 or equivalent (100V, 170mA rated). The
boost-capacitor charge diode is a high-voltage, small-sig-
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IBST
BST
IGD
IBST
DRVH
XFMRH
VIN
ILM
LM
REG9
DRVL
Figure 3. Boost Capacitor Charging Path During Transformer
Reset
Maxim Integrated │ 14
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
nal Schottky type. It may be helpful to connect a resistor in
series with this diode to minimize noise as well as reduce
the peak charging currents. As in any other switching
powersupply circuit, the gate-drive loops must be kept to
a minimum. Plan PC board layout with the critical current
carrying loops of the circuit as a starting point.
Secondary-Side Synchronization
The MAX5051 has additional (LXH and LXL) outputs to
make the driving of secondary-side synchronous rectifiers
possible with a signal from the primary. These signals
lead in time, the actual gate drive applied to the main
power FETs, and allow the secondary-side synchronous
FETs to be commutated in advance of the power pulse.
The synchronizing pulse is generated approximately 90ns
ahead of the main pulse that drives the two power FETs.
Synchronization is accomplished by connecting a small
pulse transformer between LXH and LXL, along with
some clamp diodes (D1 and D2 in Figure 4). This is
a small integrated two-switch driver configuration that
allows for full recovery of the stored energy in the magnetizing inductance of the pulse transformer, thereby significantly reducing the running bias current of the controller. It
also allows for correct transfer of DC levels without requiring series capacitors with large time constants, assuring
correct drive levels for the secondary circuit.
Select a pulse transformer, T1, so the current buildup in
its magnetizing inductance is low enough not to create a
significant voltage droop across the internal driver FETs.
Use the following formula to calculate the approximate
value of the primary magnetizing inductance of T1:
MAX5051
R1
4.7Ω
REG5
2.5
R dsLXH + R dsLXL
tS
≤ LM ≤
fS
16 C ds f S
where RdsLXH and RdsLXL are the internal high- and
lowside pulse transformer driver on-resistances, fs is the
switching frequency, LM is the pulse transformer primary
magnetizing inductance, ts is the transition time at the
drains of these FETs (typically < 40ns), and Cds is the total
drain-source capacitance (approximately 10pF).
Alternatively, a high-speed optocoupler (Figure 5) can
be used instead of the pulse transformer. The lookahead
pulse accommodates the propagation delays of the highspeed optocoupler as well as the delays through the gate
drivers of the secondary-side FETs. Choose optocouplers
with propagation delays of less than 50ns.
Error Amplifier And Reference Soft-Start
The error amplifier in the MAX5051 has an uncommitted
inverting input (FB) and output (COMP). Use this amplifier
when secondary isolation is not required. COMP can then
be directly connected to CON (the input of the PWM comparator). The noninverting input of the error amplifier is
connected to the soft-start generator and is also available
externally at CSS. A capacitor connected to CSS is slewed
linearly during initial startup with the 70μA internal current
source (see Figure 2). This provides a linearly increasing
reference to the noninverting input of the error amplifier
forcing the output voltage also to slew proportionally. This
method of soft-start is superior to other methods because
the loop is always in control. Thus, the output-voltage slew
MAX5051
REG5
LXVDD
C1
1µF
T1
D1
LXH
D3
1N4148
5V
LXVDD
R2
2kΩ
LXL
D2
PGND
T1: PULSE ENGINEERING, PE-68386.
D1, D2: CENTRAL SEMICONDUCTOR, CMOSH-3.
Figure 4. Secondary-Side Synchronous Rectifier Driver Using
Pulse Transformer
www.maximintegrated.com
R1
4.7Ω
R3
560W
LXH
LXL
PGND
R2
2kΩ
C1
1µF
U2
PS9715
HIGH-SPEED
OPTO
C2
Figure 5. Secondary-Side Synchronous Rectifier Driver Using
High-Speed Optocoupler
Maxim Integrated │ 15
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
rate is constant at light or heavy loads. Once the soft-start
ends, the voltage on CSS regulates to 1.24V. Do not load
CSS with external circuitry. A suitable range of capacitors
connected to CSS is from 10nF to 0.1μF. Calculate the
required soft-start capacitor based on the total output voltage startup time as follows:
CCSS = 56μF/s × tSS
where CCSS is the capacitor connected to CSS, tSS is the
soft-start time required for the output voltage to rise from
0V to the rated output voltage. This only applies when this
amplifier is used for output voltage regulation.
PWM Ramp
The PWM ramp is generated at RCFF. Connect a capacitor CRCFF from RCFF to ground and a resistor RRCFF
from RCFF to AVIN. The ramp generated on RCFF is internally offset by 2.3V and applied to the noninverting input of the PWM comparator. The slope of the ramp is part
of the overall loop gain. The dynamic range of RCFF is 0
to 3V, and so the ramp peak must be kept below that. Assuming the maximum duty cycle approaches 50% at minimum input voltage, use the following formula to calculate
the minimum value of either the ramp capacitor or resistor:
R RCFF C RCFF ≥
VINUVLO
2 f S VRPP
where VINUVLO is the minimum input supply voltage (typically the PWM UVLO turn-on voltage), fS is the switching
frequency, and VRPP is the peak-to-peak ramp voltage,
typically 2V.
Allow the ramp peak to be as high as possible to maximize
the signal-to-noise ratio. The low-frequency smallsignal
gain of the power stage, Gps (the gain from the inverting
input of the PWM comparator to the output) can be calculated by using the following formula:
Gps = NspRRCFFCRCFF fs
where Nsp is the secondary-to-primary power transformer
turns ratio.
Internal Regulators
The MAX5051 has two internal linear regulators that
are used to power internal and external control circuits.
The 9V regulator, REG9, is primarily used to power the
highand low-side gate drivers. Bypass REG9 with a 4.7μF
ceramic capacitor or any other high-quality capacitor; use
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low-value ceramics in parallel as necessary. A 5V regulator also is provided, REG5, primarily used to bias the
internal circuitry of the MAX5051. Bypass REG5 with a
4.7μF ceramic capacitor similar to the one used for REG9.
Both of these regulators are always powered. When using
bootstrapped startup through a bleed resistor, do not load
these outputs while the MAX5051 is in standby as it may
fail to start. Any external loading to this output should be
such that the sum of their load and the standby current
through PVIN of the MAX5051 is less than the current that
the bleed resistor can supply.
Startup Modes
The MAX5051 can be configured for two different startup
modes, allowing operation in either bootstrapped or direct
power mode.
Direct Power Mode
In direct power mode, AVIN and PVIN are connected
directly to the input supply. This is typical in 12V to 24V
systems. The undervoltage lockout set at STT needs to
be adjusted down with an external resistor-divider to an
appropriate level.
Bootstrapped Startup
In bootstrap mode, a resistor is connected from the input supply to PVIN, where a capacitor to GND is charged
towards the input supply. When this voltage reaches the
startup threshold, the device wakes up and begins switching. A tertiary winding from the transformer is then used to
sustain operation. The MAX5051 draws little current from
PVIN before reaching the threshold, which allows a largevalue bootstrap resistor and reduces its power dissipation
after startup. A large startup hysteresis helps the design
of the bootstrap circuit by providing longer running times
during startup.
After coming out of standby and before initiating the softstart, the MAX5051 turns on the low-side FET to charge
up the boost capacitor. A voltage detector has been incorporated in the high-side driver that prevents the highside switch from turning on with insufficient voltage. It is
also used to indicate when the boost capacitor has been
charged. Once the capacitor is charged, soft-start commences. If the duty cycle is low, the magnetizing energy in
the transformer may be insufficient to keep the bootstrap
capacitor charged. DRVB (see Figure 2 dotted lines) has
been provided to drive a small external FET connected
between XFRMRH and PGND, and is pulsed every cycle
to keep the capacitor charged.
Maxim Integrated │ 16
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Normally PVIN is derived from a tertiary winding of the
transformer. However, at startup there is no energy delivered through the transformer, hence, a special bootstrap sequence is required. Figure 6 shows the voltages
on PVIN, REG9, and REG5 during startup. Initially, PVIN,
REG9, and REG5 are 0V. After the input voltage is applied, C21 (Figure 8) charges PVIN through the startup
resistor, R22, to an intermediate voltage. At this point,
the internal regulators begin charging C3 and C4. The
MAX5051 uses only 400μA (typ) of the current supplied
by R22, and the remaining current charges C21, C3, and
C4. The charging of C4 and C3 stops when their voltages
reach approximately 5V and 9V, respectively, while PVIN
continues rising until it reaches the wakeup level of 24V.
Once PVIN exceeds this wakeup level, switching of the
external MOSFETs begins and energy is transferred to
the secondary and tertiary outputs. When the voltage on
the tertiary output builds to higher than 9V, startup has
been accomplished and operation is sustained. However,
if REG9 drops below 6.2V (typ) before startup is complete,
the device goes back into standby. In this case, increase
the value of C21 to store enough energy allowing for voltage buildup at the tertiary winding.
Startup Time Considerations
The PVIN bypass capacitor, C21, supplies current immediately after wakeup (see Figure 8). The size of C21 and
the connection of the tertiary winding determine the number of cycles available for startup. Large values of C21
increase the startup time and supply gate charge for more
cycles during initial startup. If the value of C21 is too small,
REG9 drops below 6.2V because the MOSFETs did not
PVIN
10V/div
REG9
5V/div
REG5
5V/div
40ms/div
Figure 5. Secondary-Side Synchronous Rectifier Driver Using
High-Speed Optocoupler
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have enough time to switch and build up sufficient voltage
across the tertiary output to power the device. The device
goes back into standby and will not attempt to restart until
PVIN rises above 24V. Use a low-leakage capacitor for
C21, C3, and C4 (see Figure 8). Generally, power supplies keep typical startup times to less than 500ms even
in low-line conditions (36VDC for telecom applications).
Size the startup resistor, R22 (Figure 8) to supply both the
maximum startup bias of the device and the charging current for C21, C3, and C4.
Oscillator and Synchronization
The MAX5051 oscillator is externally programmable
through a resistor and capacitor connected to RCOSC.
The PWM frequency will be 1/2 the frequency at RCOSC
with a 50% duty cycle, and is available at SYNCOUT. The
maximum duty cycle is limited to < 50% by a 60ns internal
blanking circuit in the power drivers in addition to the gate
and driver delays.
Use the following formula to calculate the oscillator components:
R RCOSC =
1


REG5
2 f S ( C RCOSC + C PCB ) In 

 REG5 − V TH 
where CPCB is the stray capacitance on the PC board
(about 14pF), REG5 = 5V, VTH is the RCOSC peak trip
level, and fs is the switching frequency.
The MAX5051 contains circuitry that allows it to be synchronized to an external clock whose duty cycle is 50%.
For proper synchronization, the frequency of this clock
should be 15% to 20% higher than half the RCOSC frequency of the MAX5051’s internal oscillator. This is because the external source SYNCIN directly drives the
power stage, whereas the internal clock is divided by two.
The synchronization feature in the MAX5051 has been
designed primarily for two devices connected to the same
power source with a short physical distance between the
two circuits. Under these circumstances, the SYNCOUT
from one of the circuits can be connected to the SYNCIN
of the other one; this forces the power cycle of the second unit to be 180° out-of-phase. To synchronize a second
MAX5051, feed the SYNCOUT of the first device to the
SYNCIN of the second device. If necessary, many devices
can be daisy-chained in this manner. Each device will then
have 180° phase difference from the device that drives it.
Maxim Integrated │ 17
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Integrating Fault Protection
The integrating fault protection feature allows transient
overcurrent conditions to be ignored for a programmable
amount of time, giving the power supply time to behave
like a current source to the load. This can happen, for
example, under load-current transients when the control
loop requests maximum current to keep the output voltage
from going out of regulation. The fault integration time can
be programmed externally by connecting a suitably sized
capacitor to the FLTINT pin. Under sustained overcurrent
faults, the voltage across this capacitor is allowed to ramp
up towards the FLTINT shutdown threshold (2.9V, typ).
Once the threshold is reached, the power supply shuts
down. A high-value bleed resistor connected in parallel
with the FLTINT capacitor allows it to discharge towards
the restart threshold (1.8V, typ). Once this threshold is
reached, the supply restarts with a new soft-started cycle.
Note that cycle-by-cycle current limiting is provided at all
times by CS with a threshold of 154mV (typ). The fault
integration circuit works by forcing a 90μA current out
of FLTINT every time that the current-limit comparator
(Figure 1, CILIM) is tripped. Use the following formula
to calculate the value of the capacitor necessary for the
desired shutdown time of this circuit.
C FLTINT =
IFLTINT t SH
0.9V
where IFLTINT = 90μA, tSH is the desired fault integration
time after the first shutdown cycle during which currentlimit events from the current-limit comparator are ignored.
For example, a 0.1μF capacitor gives a fault integration
time of 2.25ms.
Some testing may be required to fine-tune the actual
value of the capacitor. To calculate the required bleed
resistance RFLTINT, use the following formula:
R FLTINT =
t RT
0.9V × C FLTINT
where tRT is the desired recovery time.
#1
RCOSC
SYNCIN
MAX5051
SYNCOUT
FLTINT
RCFF
STARTUP
UVLO
CON
#2
SYNCIN
RCOSC
MAX5051
SYNCOUT
RCFF
FLTINT
STARTUP
CON
UVLO
Figure 7. Connection for Synchronized STARTUP of Two or
More MAX5051s
common connection of STARTUP ensures all paralleled
modules wakeup and shutdown in tandem. This helps
prevent startup conflicts when the secondaries of the
power supplies are paralleled. Connecting SYNCOUT
to SYNCIN is not necessary; however, when used, this
minimizes the ripple current though the input bypass
capacitors.
Applications Information
Isolated Telecom Power Supply
Figure 8 shows a complete design of an isolated synchronously rectified power supply with a 36V to 72V telecom
voltage range. This power supply is fully protected and
can sustain a continuous short circuit at its output terminals. Figures 9 though 14 show some of the performance
aspects of this power-supply design. This circuit is available as a completely built and tested evaluation kit.
Typically choose tRT = 10 x tSH. Typical values for tSH
range from a few hundred microseconds to a few milliseconds.
Synchronizing Primary-Side STARTUP For
Parallel Operation
Figure 7 shows the connection diagram of two or more
MAX5051s for synchronized primary-side operation. The
www.maximintegrated.com
Maxim Integrated │ 18
www.maximintegrated.com
2
R27
10Ω
PVIN
REG9
REG5
TP3
3
4
C19
1µF
C18
100pF
C17
0.33µF
R11
360Ω
R3
2.2kΩ
REG5
LXH
REG5
C6
0.1µF
C3
4.7µF
C4
4.7µF
R15
31.6kΩ
1%
D8
1
C2
390pF
R16
10.5kΩ
1%
TP1
C1
100pF
C5
4700pF
R25
100kΩ
C24
1000pF
+VIN
REG5 R21
24.9kΩ
1%
RCFF
14
13
12
11
10
9
8
7
6
17
18
19
20
21
22
2
1
REG9
R12
100kΩ
1%
R19
475Ω
R23
10Ω
2
VOUT
OUT
FB
4
1
2 65
U3
R17
0.027Ω
1%
D3
2
1
2
IN
1
PGND
2
GND
4
PVIN
3
7
N2
C34
330pF
8
2
VOUT
3
1
2
4
R24
10Ω
3
2
1 87
5
6
N1 8 7
D7
2
10
2T
8
+VIN
T1
XFRMRH
R22
15kΩ
R18
4.7Ω
6
4T
1
5
8T
2
1
XFRMRH
D2
D5
R13
47Ω
REG9
R5
38.3kΩ
1%
C21
4.7µF
80V
R6
1MΩ
1%
+VIN
R7
0Ω
R8
8.2Ω
R2
2.55kΩ
1%
5
SENSE (+) SENSE (-)
TRIM
3
R9
8.2Ω
1
+VIN
R14
150Ω
C9
1µF
DRVB
XFRMRH
C8
4.7µF
+VIN
D1
R4
1MΩ
1%
ON/OFF
C7
0.22µF
C27
0.15µF
C20
220pF
R20
0Ω
16
DRVL
15
CS
PGND
DRVDD
DRVB
XFRMRH
DRVH
BST
23
24
25
26
27
28
C36
C28
R1
0.22µF
0.047µF 11.5kΩ
1%
VOUT
U2
LXL
LXH
LXVDD
STT
PVIN
REG9
REG5
FB
COMP
AVIN
GND
UVLO
STARTUP
IC_PADDLE
SYNCOUT
FLTINT
MAX5051
RCOSC U1 SYNCIN
4
COM
5
CSS
3
2
1
D6
1
1
6
5
4
N3
C23
1000pF
5V
1 4
N4
56
C32
1µF
C22
2200pF
2kV
EN
IN
3
2
1
U5
HOLD
5
V+
M_OUT
REG9
C26
0.1µF
GND
4
IN- 5
IN+
6
6
5V
IN+
4
C13
270µF
4V
5V
C25
0.07µF
100V
N_OUT
GND
U4
5
P_OUT
IN-
U7
P_OUT
V+
1
2
3
7
8
N.C. 6
WDI
OUT
C12
1µF
100V
RESET
L1
2.4µH
C29
0.1µF
4
3 GND
2
1
C11
0.47µF
100V
C30 5V
0.1µF
1 87
D4
R10 2 3
20Ω
2
2
C35
1µF
C10
0.47µF
100V
+VIN
3
3
4
5
U6
GND
OUT
VCC
C15
270µF
4V
1
CA
AN
2
1
LXH
C33
1µF
10V
R29
1Ω
XFRMRH
VOUT
-VIN
U1: MAX5051
U2: PS2913-1-M
U3: MAX8515
U4, U7: MAX5048A
U5: MAX5023M
U6: PS9715
N1, N2: SI4486
N3, N4: SI4864
N5: BSS123
C31 5V
0.1µF
2
N5
C14
270µF
4V
C16
3.3µF
+VIN
R28
2kΩ
R26
560Ω
SGND
VOUT
DRVB
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Figure 8. Schematic of a 48V Input 3.3V at 15A Output Synchronously Rectified, Isolated Power Supply
Maxim Integrated │ 19
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
95
8
90
7
POWER DISSIPATION (W)
EFFICIENCY (%)
MAX5051
85
80
75
70
65
60
6
5
4
3
2
1
0
2
4
6
8
10
12
0
14
LOAD CURRENT (A)
0
2
4
6
8
10
12
14
LOAD CURRENT (A)
Figure 9. Efficiency at Nominal Output Voltage vs. Load Current
48V Nominal Input Voltage
Figure 10. Power Dissipation at Nominal Output Voltage vs.
Load Current for 48V Input Voltage.
RL = 0.22Ω
VOUT
100mV/div
VOUT
1V/div
IOUT
5A/div
IOUT
5A/div
4ms/div
Figure 11. Turn-On Transient at Full Load (Resistive Load)
www.maximintegrated.com
1ms/div
50% > 75% > 50% OF IOUT(MAX), dl/dt = 5A/µs
Figure 12. Output Voltage Response to Step-Change in Load
Current
Maxim Integrated │ 20
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
A
IOUT
10A/div
B
IOUT
10A/div
VOUT
50mV/div
A: 1ms/div
B: 20ms/div
2s/div
Figure 13. Output Voltage Ripple At Nominal Input Voltage and
Full Load Current (Scope Bandwidth = 20MHz)
Figure 14. Load Current (10A/div) as a Function of Time When
the Converter Attempts to Turn On into a 50mΩ Short Circuit
Pin Configuration
Chip Information
TRANSISTOR COUNT: 2049
TOP VIEW
PROCESS: BiCMOS/DMOS
28 SYNCIN
RCOSC 1
27 FLTINT
SYNCOUT 2
26 STARTUP
RCFF 3
25 UVLO
CON 4
CSS 5
COMP 6
Exposed Paddle Connected to GND
MAX5051
24 GND
23 AVIN
22 BST
FB 7
REG5 8
21 DRVH
REG9 9
20 XFRMRH
PVIN 10
STT 11
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
19 DRVB
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
18 DRVDD
28 TSSOP
U28E-4
21-0108
90-0146
LXVDD 12
17 PGND
LXH 13
16 DRVL
LXL 14
15 CS
TSSOP
EXPOSED PADDLE IS INTERNALLY CONNECTED TO GND.
www.maximintegrated.com
Maxim Integrated │ 21
MAX5051
Parallelable, Clamped Two-Switch
Power-Supply Controller IC
Revision History
REVISION
NUMBER
REVISION
DATE
2
5/14
PAGES
CHANGED
DESCRIPTION
No /V OPNs; removed automotive reference from Applications section
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2014 Maxim Integrated Products, Inc. │ 22