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Course Introduction Purpose This Part-A course discusses techniques that are used to reduce noise problems in the design of large scale integration (LSI) devices. Objectives Understand the requirement for electromagnetic noise countermeasures. Learn approaches and design methods for minimizing the electromagnetic interference (EMI) emitted by LSI devices. Gain insight into how Renesas applies these techniques for handling noise problems in its microcomputer products. Content Learning Time 16 pages 20 minutes 1 © 2008, Renesas Technology America, Inc., All Rights Reserved Noise Can Cause Big Problems Noise = “Unwanted electrical signals that produce undesirable effects in the circuits of control systems in which they occur.” Two types of noise: Electromagnetic Compatibility (EMC) issues encompass both types Noise reduction approaches: Techniques for reducing EMI (Electromagnetic Interference) — Cutting the noise emitted by a specific system, circuit or device that causes other devices/circuits to operate incorrectly Techniques for decreasing EMS (Electromagnetic Susceptibility) — minimizing the effect that external noise has on the operation of a system, circuit or device Noise reduction: a goal common to both microcontroller (MCU) designers and the system engineers who apply those devices 2 © 2008, Renesas Technology America, Inc., All Rights Reserved Why Is EMI Reduction Important? Example of “real-world” effects: EMI can cause problems in the AV equipment and CIS products in an automobile Antenna picks up EMI noise, which degrades radio reception Noise is emitted by MCU and harness, causing EMI Battery Audio-visual equipment, CIS products MCU LSI device Wiring harness (power line) 3 © 2008, Renesas Technology America, Inc., All Rights Reserved Minimize ALL Sources of EMI EMI reduction requires a comprehensive design approach and attention to detail If measures are taken to deal only with secondary elements… No source of noise should be overlooked! If measures are taken to deal only with elements of primary importance… 60 If measures are taken to deal with all important noise elements 60 60 Effect: -0.2dB Effect: -3dB Action: 10 dB reduction Before After countermeasure countermeasure Before 4 © 2008, Renesas Technology America, Inc., All Rights Reserved Before Total EMI Secondary Primary Sources Total EMI 30 Secondary Sources Total EMI Secondary Sources Primary Sources After 40 Primary Sources of EMI EMI level (dB) 50 -10dB Total EMI 30 Secondary Sources EMI level (dB) Total EMI Secondary Primary Sources 40 Primary Sources of EMI 50 Action: 10 dB reduction -10dB Total EMI 30 Secondary Sources 40 Primary Sources of EMI EMI level (dB) 50 Effect: -5dB After Explanation of Terms Core A microcontroller chip is composed of a core, I/O ports, and power supply circuitry. The core consists of the CPU, ROM, RAM, and blocks implementing timers, communication, and analog functions. CPG Clock Pulse Generator Driver buffer Output circuit transistors as well as output circuits for driving signals with large load capacitance and I/O port output transistors. Clock/bus driver, signals between blocks, etc. EMC Electromagnetic Compatibility EMI Electromagnetic Interference EMS Electromagnetic Susceptibility Harness Cables (wires) connecting a board and power supply or connecting one unit in a system to another. I/O Input/Output Port OSC Oscillator PLL Phase Locked Loop POR/LVD Power-On Reset/Low-Voltage Detect functions Power supply Two power supplies are applied to the LSI: Vcc and Vss. The core power supply internal to the LSI is VCL (internal step-down). The Vss-based power supply routed through the LSI is VSL. SSCG Spread-Spectrum Clock Generator WDT Watchdog Timer 5 © 2008, Renesas Technology America, Inc., All Rights Reserved Pin Assignments Help Reduce EMI Microcontroller pin assignments should provide power supply and signal pin placements that closely match those of external LSI devices Vss Allows short interconnections Vcc Helps prevent crossed wires Improves noise control Renesas microcontroller Facilitates crosstalk External LSI countermeasures Reduces parasitic loads Vss Vcc 6 © 2008, Renesas Technology America, Inc., All Rights Reserved Arrangement of Key Pins Pins should be arranged in an electrical potential gradient Pin layout should concentrate key pins in one area Arrangement should make it easy to mount bypass capacitors for noise countermeasures Standardized layouts promote design consistency NMI / VCC XIN VSS XOUT Effects of electrical potential differences are minimized /RESET XCOUT XCIN CNVSS BYTE Key pins are concentrated in a single location Oscillation capacitors Ceramic bypass capacitor Capacitor for Reset Oscillation capacitors Pin arrangement makes it easy to mount bypass capacitors between power supply lines and ground lines. To Reset IC GND GND VCC Tantalum bypass capacitor 7 © 2008, Renesas Technology America, Inc., All Rights Reserved Power Supply Pin Assignments Placing power supply pins in pairs near each other makes it easy to mount bypass capacitors where they can be effective C3 I/O PORT-1 power supply pin I/O PORT-1 CORE-1 power supply pin CORE-1 CORE-2 CORE-2 power supply pin Vcce Vcc C2 C4 Vsse Vss Vcl (Vdd) Vcl (Vdd) CA CB Vsscore Vsscore I/O PORT-2 C1, C2, C3, C4 CA, CB = Step-down power supply (Vdd) stabilization capacitors = Power supply bypass capacitors C1 I/O PORT-2 power supply pin 8 © 2008, Renesas Technology America, Inc., All Rights Reserved Analog vs. Digital Signal Pins For best analog circuit performance, some types of digital signal pins must not be located close to the analog signal pins AVCC AVSS AVREF Analog signal pins The following types of digital signal pins should not be placed in these locations: – High-current ports – Clock-related ports – High-speed telecom ports 9 © 2008, Renesas Technology America, Inc., All Rights Reserved Power Supply Circuit Internal step-down power supply circuit runs off 5V, produces precise lower voltage (Vdd) for core The lower the core voltage, the greater the EMI reduction • • • Vcl Step-down voltage EMI None Low High Reduced • • • Step-down circuit Core: External step-down power supply circuit stabilization capacitor Vcc • CPU • ROM • RAM • TIMERS • SCI • Etc. Vsl or Vss Vdd (core voltage) = 1.2V • • • 5V I/O A slower slew rate cuts EMI Vcc = 5.0V A low Vdd reduces power consumption, too. Vss • • • • • • • • • A/D, D/A Layout of internal step-down circuit (conceptual) 10 © 2008, Renesas Technology America, Inc., All Rights Reserved Step-down Power Supply Voltage Step-down voltage is used at the 0.5µm process generation and below to reduce EMI Process limitations at 0.35µm and 0.5µm process generations and below mandate lower core voltages Further decreases in Vdd are expected, allowing additional EMI reductions and power savings Core power supply voltage (Vdd), typ. [V] I/O = 5V 5.0 Process limitations 4.0 3.0V 3.0 Core voltage aimed at preventing EMI Ultralow-noise version 2.0 1.0 1.8V 1.2V Ultralow-noise version 0.8µm 0.5µm 0.35µm 0.5µm 0.18µm (with internal step-down voltage specification) 11 © 2008, Renesas Technology America, Inc., All Rights Reserved Further reductions in core voltage Process generation EMI Filter in Step-down Supply π - type R-C filter is located between step-down circuit and core Uses parasitic capacitances of step-down transistors and core and parasitic resistance of internal power supply lines Electromagnetic filter circuit Vcc To external stabilization capacitor Internal step-down circuit Parasitic resistance of internal power supply lines Parasitic capacitances Vss 12 © 2008, Renesas Technology America, Inc., All Rights Reserved Vdd CORE Wiring for Power Supply Lines In devices with multiple power supply pins, Vcc and Vss should be . . . Supplied in pairs Located near each other This design approach ensures that the chip’s internal power supply lines do not cross Core-A power supply I/O-A power supply I/O-A I/O-B Vcc Vss I/O-B Power Vss supply CORE -A Vcc CORE -B Vcc Vcc Vss 13 © 2008, Renesas Technology America, Inc., All Rights Reserved Core-B power Vss supply Main Power Supply Lines in Core Power supply lines to I/O and core are separated Mesh configuration is used for supply lines to core Bonding pads CORE Primary core supply lines Vcc CORE Vss SCI TIMER Vcc Vcc Vss Vss CPG CPU ROM I/O circuits 14 © 2008, Renesas Technology America, Inc., All Rights Reserved RAM Capacitors in Power Supply Lines Capacitors can be placed in various locations within the LSI device They deliver supplemental charge needed for driving digital-circuit switching Without embedded capacitors, ripple component of power supply waveform is large With capacitors, ripple component is small and EMI is reduced 5V-I/O Step-down circuit Embedded Capacitor A/D, D/A 15 © 2008, Renesas Technology America, Inc., All Rights Reserved Course Summary Types of noise (EMI and EMS) in microcomputers Importance of EMC Reducing EMI by using optimum methods for pin assignments, step-down power supply design, and on-chip power wiring For more information on specific devices and related support products and material, please visit our Web site: http://america.renesas.com 16 © 2008, Renesas Technology America, Inc., All Rights Reserved