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Transcript
OP-AMP PARAMETERS
In this section, several important op-amp parameters are defined. (These are listed in the
objectives that follow.) Also several common IC op-amps are compared in terms of these
parameters.
After completing this section, you should be able to
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Discuss several op-amp parameters
Define input offset voltage
Discuss input offset voltage drift with temperature
Define input bias current
Define input impedance
Define input offset current
Define output impedance
Discuss common-mode input voltage range
Discuss open-loop voltage gain
Define common-mode rejection ratio
Define slew rate
Discuss frequency response
Compare the parameters of several types of IC op-amps
Input Offset Voltage
The ideal op-amp produces zero volts out for zero volts in. In a practical op-amp, how ever, a
small dc voltage, VOUT (error) appears at the output when no differential input voltage is
applied. Its primary cause is a slight mismatch of the base-emitter voltages of the differential
input stage of an op-amp, as illustrated in Figure 1(a).
In general, the output voltage of the differential input stage is expressed as
VOUT  I c2 R c - I c1R c
A small difference in the base-emitter voltages of Q1 and Q2 causes a small difference in the
collector currents. This results in a non-zero value of VOUT (The collect resistors are equal.)
As specified on an op-amp data sheet, the input offset voltage V0S is the differential dc
voltage required between the inputs to force the differential output to zero volts. VOS is
demonstrated in Figure 1(b). Typical values of input offset voltage are in range of 2 mV or
less. In the ideal case, it is 0 V.
+VCC
+VCC
RC
IC1
IC2
RC
RC
IC1
IC1< IC2
IC2
RC
VOUT
0V
+ VOUT(error) VOS = VB1- VB2
RE
RE
-VEE
-VEE
1
Input Offset voltage Drift with Temperature
The input offset voltage drift is a parameter related to V0S that specifies how much change
occurs in the input offset voltage for each degree change in temperature. Typical values range
anywhere from about 5 V per degree Celsius to about 50 V per degree Celsius. Usually, an
op-amp with a higher nominal value of input offset voltage exhibits a higher drift.
Input Bias Current
You have seen that the input terminals of a bipolar differential amplifier are the transistor
bases and, therefore, the input currents are the base currents.
The input bias current is the dc current required by the inputs of the amplifier to properly
operate the first stage. By definition, the input bias current is the average of both input
currents and is calculated as follows:
I BIAS 
I1  I 2
2
The concept of input bias current is illustrated in Figure 2.
I1
V1
I2
V2
I BIAS 
I1  I 2
2
FIGURE 2 Input bias current is the average of the two op-amp input currents.
Input Impedance
Two basic ways of specifying the input impedance of an op-amp are the differential and the
common mode. The differential-input impedance is the total resistance between the inverting
and the non-inverting inputs, as illustrated in Figure 2(a). Differential impedance is measured
by determining the change in bias current for a given change in differential input voltage. The
common-mode input impedance is the resistance between each input and ground and is
measured by determining the change in bias current for a given change in common-mode
input voltage. It is depicted in Figure 3(b).
Zin(d)
(a) Differential input impedance
Zin(cm)
(b) Common-mode input impedance
2
Input Offset Current
Ideally, the two input bias currents are equal, and thus their difference is zero. In a practical
op-amp, however, the bias currents are not exactly equal.
The input offset current, Ios is the difference of the input bias currents, expressed as an
absolute value.
I os  I1 - I 2
Actual magnitudes of offset current are usually at least an order of magnitude (ten times) less
than the bias current. In many applications, the offset current can be neglected. However,
high-gain, high-input impedance amplifiers should have as little Ios as possible because the
difference in currents through large input resistances develops a substantial offset voltage, as
shown in Figure 4.
Zin(cm)
+VB1
I1
I1RIN
VOS
+VB2
I2RIN
I2
Effect of input offset current.
The offset voltage developed by the input offset current is
Vos  I1R in  I 2 R in  (I1  I 2 )R in
The error created by Vos is amplified by the gain Av, of the op-amp and appears in the output
as
VOUT (error)  A v I os R in
A change in offset current with temperature affects the error voltage. Values of temperature
coefficient for the offset current in the range of 0.5 nA per degree Celsius are common.
Output Impedance
The output impedance is the resistance viewed from the output terminal of the op-amp, as
indicated in Figure 5.
Zout
FIGURE 5 Op-amp
output impedance.
3
Common-Mode Input Voltage Range
All op-amps have limitations on the range of voltages over which they will operate. The
common-mode input voltage range is the range of input voltages which, when applied to both
inputs, will not cause clipping or other output distortion. Many op-amps have common-mode
input voltage ranges of 10 V with dc supply voltages of 15 V.
Open-Loop Voltage Gain, Aol
The open loop 'voltage gain of an op-amp is the internal voltage gain of the device and
represents the ratio of output voltage to input voltage when there are no external components.
The open-loop voltage gain is set entirely by the internal design. Open-loop voltage gain can
range up to 200,000 and is not a well-controlled parameter. Data sheets often refer to the
open-loop voltage gain as the large-signal voltage gain.
Common-Mode Rejection Ratio
The common-mode rejection ratio (CMRR), as discussed in conjunction with the diff-amp, is
a measure of an op-amp's ability to reject common-mode signals. An infinite value of CMRR
means that the output is zero when the same signal is applied to both inputs (common-mode),
An infinite CMRR is never achieved in practice, but a good op-amp does have a very high
value of CMRR. Common-mode signals are undesired interference voltages such as 50 Hz
power-supply ripple and noise voltages due to pick-up of radiated energy. A high CMRR
enables the op-amp to virtually eliminate these interference signals from the output.
The accepted definition of CMRR for an op-amp is the open-loop voltage gain (Aol) divided
by the common-mode gain.
CMRR 
A ol
A cm
It is commonly expressed in decibels as follows:
A 
CMRR  20 log  ol 
 A cm 
EXAMPLE 1 A certain op-amp has an open-loop voltage gain of 100,000 and a commonmode gain of 0.25. Determine the CMRR and express it in decibels.
Solution
CMRR 
A ol
A cm

100 000
 400 000
0.25
A 
CMRR  20 log  ol   20 log( 400 000)  112 dB
 A cm 
4
Slew Rate
The maximum rate of change of the output voltage in response to a step input voltage is the
slew rate of an op-amp. The slew rate is dependent upon the high-frequency response of the
amplifier stages within the op- amp.
Slew rate is measured with an op-amp connected as shown in Figure 6(a). This particular opamp connection is a unity-gain, non-inverting configuration, which will be discussed later. It
gives a worst-case (slowest) slew rate. Recall that the high-frequency components of a
voltage step are contained in the rising edge and that the upper critical frequency of an
amplifier limits its response to step input. The lower the upper critical frequency is, the more
slope there is on the output for a step input.
..
Vin 0
Vout
Vin
+
+Vmax
Vout 0
R
-Vmax
(a) Test circuit
t
(b) Step input voltage and the resulting output voltage
FIGURE 6 Slew-rate measurement
A pulse is applied to the input as shown, and the ideal output voltage is measured as indicated
in Figure 6 (b). The width of the input pulse must be sufficient to allow the output to "slew"
from its lower limit to its upper limit, as shown. As you can see, a certain time interval, At, is
required for the output voltage to go from its lower limit -Vmax to its upper limit +Vmax,
once the input step is applied. The slew rate is expressed as
Slew rate 
Vout
t
where Vout= +Vmax- (-Vmax) The unit of slew rate is volts per microsecond (V/s).
The output voltage of a certain op-amp appears as shown in Figure 6 in response to a step
input. Determine the slew rate.
Vout (V)
10
9
0
-9
-10
1 S
5
Solution The output goes from the lower to the upper limit in 1 s. Since this response is not
ideal, the limits are taken at the 90% points, as indicated. So, the upper limit is +9 V and the
lower limit is -9 V The slew rate is
Slew rate 
Vout 9  (9)

 18V / s
t
1s
Related Exercise When a pulse is applied to an op-amp, the output voltage goes from -8 V to
+7 V in 0.75 s. What is the slew rate?
Frequency Response
The internal amplifier stages that make up an op-amp have voltage gains limited by junction
capacitances. An op-amp has no internal coupling capacitors, however; therefore, the low-frequency response extends down to dc (0 Hz).
TABLE 1
Input
bias
current
(nA)
(max)
500
250
600
Input impedance
(M)
(min)
Open-loop
gain
(typ)
Slew
rate
(v/s)
(typ)
CMRR
(dB)
(min)
LM741C
LMl01A
OP1l3E
Input
offset
VoItage
(mV)
(max)
6
7.5
0.075
0.3
1.5
-
200,000
160,000
2,400,000
0.5
1.2
70
80
100
Industry standard
General-purpose
Low noise, low drift
0P177A
0P184E
AD8009AR
0.01
0.065
5
1.5
350
150
26
-
12,000,000
240,000
-
0.3
2.4
5500
130
60
50
AD8O41A
AD8O5SA
7
5
2000
1200
.16
10
56,000
3500
160
1400
74
82
Ultraprecision
Precision
BW =
700MHz,ultra fast,
Low distortion,
current feedback
BW=16OMHz
Very fast voltage
feedback
Op-amp
Comment
Comparison of Op-Amp Parameters
Table 1 provides a comparison of values of some of the parameters just described several
common IC op-amps. Any values not listed were not given on the manufacturers data sheet.
Other Features
Most available op-amps have three important features: short-circuit protection, no latch-up,
and input offset nulling. Short-circuit protection keeps the circuit from being aged if the
output becomes shorted, and the no latch-up feature prevents the op-at hanging up in one
output state (high or low voltage level) under certain input cot Input offset nulling is achieved
by an external potentiometer that sets the output at precisely zero with zero input.
6