Download Lab06 - Weber State University

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Lab 6: NPN Common-Emitter Amplifier (20 points)
1. Objectives
The purpose of this lab is to build an NPN-based common emitter amplifier that amplifies a
small AC signal.
Fig. 1 NPN Common-Emitter amplifier circuit with coupling capacitors.
Design the amplifier to achieve a small-signal gain of at least AV = -200 V/V and IC = 1 mA.
Use V+=15 V, RSIG = 50 Ω, RL = 10 kΩ, RB1 =80 kΩ, and RB2 = 20 kΩ. Although there will be
variations from transistor to transistor, you may assume β=100 in your calculations.
Fig. 1 shows an NPN Common-Emitter (Emitter is common between Base and Collector)
amplifier circuit. Note that vSIG and RSIG represent the ac signal source and its internal resistance,
respectively. For the calculation and simulation purposes, you will include RSIG; however you
will omit it in the actual circuit on the breadboard. Also, note that for simulation purposes we
will use 2N2222 but in the actual circuit it may change. You may need to adjust values of the
other components as necessary in the actual circuit in order to meet the design specifications.
Coupling capacitors CB and CL block DC voltages. Here CB blocks DC voltage, which is used to
bias the base, from entering the ac signal source. CL blocks DC voltage, which is to bias the
Weber State University
EE3110 Microelectronics I
Suketu Naik
2
collector, from appearing at the load. Ideally if we apply a small ac signal at the base and we
should obtain an ac signal at the collector with some amplification.
6.1 DC Analysis:
Sketch DC model of the circuit in your lab book. Be sure to replace the three capacitors by open
circuit. You can also omit VSIG, RSIG, and RL.
What are the values of IB and IE? What is the value of VB?
Determine the value of RE that produces vBE (base-emitter voltage drop)=0.7 V. What is VE?
Note that at this point we know neither VCE nor RC.
L1: Find IB, IE and RE.
6.2 AC (small-signal) Analysis:
Sketch small-signal model of the circuit in your lab book. Replace the transistor with its smallsignal model, capacitors with short circuits, and V+ with an AC ground. Assume VA is large, and
ignore rO. What would happen to RE? Label the voltage at base of the transistor as vi (with
reference to ground). Note that this is the small-signal voltage at the gate. What are the values of
gm and rπ. What is the ratio vi /vSIG?
L2: Derive the expression for AV = vO /vi . What is the value of RC that produces a smallsignal gain of at least AV= - 200 V/V? What would be the overall gain GV?
L3: What is the DC voltage at the collector? Does the transistor operate in active mode
with this value?
L4: What is the output resistance, Ro?
6.3 Simulation:
Simulate your circuit with CG = CL = CS = 47 μF. Note that these values may have to change in
the experiment. Use the values of RE and RC as determined by the previous calculations. Use vSIG
= 10 mVpk-pk at 1 kHz. There should be no DC voltage at the input.
L5: What are DC values: VBE, VCE, IB, IC, and IB? How closely do they match your
calculations?
L6: What is AV and GV? How closely do they match your calculations?
Weber State University
EE3110 Microelectronics I
Suketu Naik
3
6.4 Experiment:
Assemble the circuit as calculated and simulated on the breadboard. You should not include RSIG
because it represents the internal resistance of the function generator.
Using the multimeter, measure the DC voltages of your circuit at the base (VB), emitter (VE), and
collector (VC) of the transistor.
Using the function generator, apply vSIG = 10 mVpk-pk at 1 kHz (if 10 mVpk-pk is not available then
use the smallest possible value). Adjust other components as necessary in order to meet the
required specification (AVmin = -200 V/V).
L6: Generate the plots of vO and vI vs time.
L7: What is the measured value of AV and GV? How does it compare with your calculations
and simulation?
Note that the biggest source of variations from your simulation results will be due to the
variation in β.
Q1: What is the maximum gain that you can achieve without distorting the output signal?
Q2: Increase the input voltage amplitude until you start seeing distortion in the output voltage.
Can you optimize the circuit so that the transistor provides the maximum gain without distortion
at this value of input voltage?
If time permits, measure Ro as follows (it is important to know Ro so that you would know what
the next stage or the load sees as the overall amplifier resistance.)
Optional: Replace RL with 1 MΩ resistor and repeat the AC measurements. Note the amplitude
of the output waveform. Now adjust RL such that the output amplitude is 50% of what it was for
1 MΩ load. This new value of RL is the output resistance Ro. How does it compare with your
calculations and simulations? Note that this value of Ro cannot be greater than RC. What is Rin
(looking into the base of the transistor)?
Weber State University
EE3110 Microelectronics I
Suketu Naik