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Name ______________________________ ES 330 Electronics II Homework # 8 (Fall 2016 – Due Monday, November 14, 2016) Problem 1 (15 points) (W/L) = ______ Page I = ______ mA 1 Design a MOS differential amplifier illsurated in the schematic below to oprate at VOV = 0.25 volt with a transconductance gm = 1 mA/V. Find the (W/L) ratio and the bias current I to meet these requirements. The process technology used to construct the NMOS devices have parameters values of Vt = 0.5 volt and nCOX = 0.4 mA/V2. Assume the two devices are identical and ignore the drain-to-source resistance r0. Problem 2 (15 points) Design a MOS differential amplifier to operate from power supply voltages of VDD = 1 V and VSS = -1 V, and dissipate at most 1 mW of power P at its quiescent state (i.e., no applied input signal). Find the value of VOV so that a value for the differential input voltage, namely, Vid = 0.25 volt, steers all current to one device (i.e., no current to the other device so that one device is on and other is off). The magnitude of the differential voltage gain Adiff is to be 10 V/V. Assume device parameters of nCOX = 0.4 mA/V2 and neglect the Early effect (i.e., ignore r0). Find current I, the drain load resistor RD and the (W/L) ratio. I = ______ mA Page (W/L) = ______ 2 RD = ____ k Problem 3 (20 points) (a) Draw the AC schematic circuit of the differential half-circuit for the differential amplifier cell shown immediately below. Page 3 (b) Derive an expression for the differential gain Ad (defined as vod /vid) as a function of gm, RD and bridging resistor RS. Neglect the Early effect (i.e., ignore r0). (c) Evaluate the differential voltage gain with RS = 0? (d) What is the value of RS (express it in terms of 1/gm) that reduces the gain calulated in part (b) above to one-half of that value? Problem 4 (15 points) Consider the BJT differential amplifier shown below. Initially assume is very large. (a) What is the largest input common-mode signal that can be applied while the BJTs Page 4 remain confortably within the active region of operation with vCB = 0 volt? Write an expression in terms of VCC, current I and resistance RC. (b) If the available power supply VCC is 2.0 volts, what is the value of IRC that should be chosen to allow a common-mode input signal of 1 volt? (c) Using the IRC value you found in part (b), select values for I and RC. Now we assume that the current gain = 100. Use the largest possible value for current I subject to the constraint that the base current of each transistor (given that I divides equally) should not exceed 2 A (0.002 mA). Problem 5 (25 points) Page 5 Design a BJT differential amplifier to amplify a differential input signal of 0.1 volt and provide a differential output signal of 2 volts. To encure adequate linearlity it is required to limit the signal amplitude across each base-emitter junction to a maximum of 5 millivolts. yet another design requirement is that the differential input resistance be at least 100 k. The BJTs that are used in this differential amplifier have a = 100 (how convenient!). Give the circuit configuration and specify the component values (e.g., power supply voltage VCC and resistors) for all components. You may use an ideal current source for setting the tail current (IEE) in the differential amplifier. [Hint: You will probably want to use emitter degeneration resistors.] Problem 6 (10 points) Page 6 Consider the NMOS differential amplifier shown in schematic form below. Both MOSFET transistors are exactly identical, however the resistors are mismatched, where RD = 5000 ohms and RD + RD = 5015 ohms. In this problem we investigate the effect upon the magnitude of the common-mode signal when drain resistors are mismatched. Assume that the tail current source ISS has a shunt 50 k resistor (RSS) and the amplifier has an adequate supply voltage of VDD. (a) What is the percent mismatch in the drain resistors RD? (b) Let the differential pair be operated at ISS = 1.0 mA. The transistor parameters are (W/L) = 100 and nCOX = 0.25 mA/V2. Find the differential voltage gain Ad, the common-mode voltage gain |Acm| and the common-mode rejection ratio CMMR (defined as the ratio |Ad|/| Acm |) and express it in decibels (dB). [Note: For simplicity you may calculate the differential voltage gain Ad assuming both resistors are matached – that is, for the Ad calculation ignore the resistor mismatch which is small anyway.] Ad = _________ Page CMRR (dB) = _______ 7 |Acm| = _______