Download NEW CIRCUIT PRINCIPLES FOR INTEGRATED CIRCUITS

FACULTY OF ELECTRICAL ENGINEERING AND COMMUNICATION
BRNO UNIVERSITY OF TECHNOLOGY
NEW CIRCUIT PRINCIPLES FOR
INTEGRATED CIRCUITS
Part 2: Special Function Blocks for Analog
Current Signal Processing
Author:
Igor Mucha
Brno
2010
Contents
Introduction 1
Chapter I
Current Signal Processing vs.
Voltage Signal Processing 10
Chapter 2
Basic Building Blocks (not only) for
Current Mode Circuits 19
page i
Contents
Chapter 3
Current Conveyors,
Implementations and Applications 42
Chapter 4
High Current Gain Amplifiers 63
page ii
Contents
Chapter 5
Current Operational Amplifiers 74
Chapter 6
High Performance
Current Operational Amplifiers 96
page iii
Contents
Conclusions 118
Acknowledgments 120
Appendix A
Models for MOS Transistors 121
page iv
Introduction
Since the discovery of the electricity in the last century a number of electric and later
electronic devices have taken over large parts of human's activities. From their most traditional
domain of exploitation in household and communication these devices have spread to
practically each single part of human life. Nowadays electric and electronic devices control
manufacturing processes, traffic, are parts of educational and health processes, etc., to make
our life more comfortable and safer.
With the fabrication of the first integrated circuits it has become possible to design larger
electronic circuits on a single chip. In this way the space occupied by the electronics lowered,
the power consumption went down, the circuits became faster and more reliable. With
improvements on the technologies it was possible to integrate more and more discrete
elements
on a single chip and VLSI systems were born. Today practically everything
concerning electronics turns around VLSI systems.
1. Analog Signal Processing
The growing integration allowed digital circuits to become superior to the conventional
analog circuits for signal processing. This is because the digital signal is defined only in
discrete values of time and amplitude, typically in a binary weighted sum of signals having
only two defined values of amplitude. On the contrary, the analog signal is defined in a
continuous range of time and amplitude, what makes it much more sensitive to interferences
due to technology variations and noise. In addition, digital circuits offer a better possibility to
memorize the processed signal, the signal processing can be changed by software inside a
solidly designed hardware, and last but not least, the simulation of digital signal processing
can be done on block or system level without requiring sophisticated models for active
devices.
Taking these advantages into account, the designers are forced to look for digital solutions
rather than analog in VLSI systems. Therefore much more effort has been devoted to the
development of circuits, technologies, design tools, for digital rather than analog signal
processing. Nevertheless, there are two reasons, why analog signal processing will be always
required in some form. The main reason is that the real world is analog. Practically all signals
in the physical world are continuous in both amplitude and time, and hence always analog
techniques will be required for conditioning of such signals before they can be processed in
digital signal processing circuits. A typical example of this is illustrated in Fig. L 1. Another
important reason for the existence of analog signal processing is the bandwidth, which can be
some order of magnitudes higher, if the signal is processed in analog circuits than in digital. In
Fig. L2 the signal bandwidth requirements for signal processing in various application areas
can be found and Fig. I.3 indicates the possibilities of various technologies.
page 1
Introduction
Figure I. 1 General signal processing system
Figure I. 2 Bandwidths of signals used in signal processing applications
Figure I. 3 Bandwidths that can be processed by present-day technologies
page 2
Introduction
Figure I. 4 Example of a digital stereo processing system
Modern electronic signal processing systems include usually both analog and digital
processing, as it can be seen in the example of a stereo processing system in Fig. L4. Here the
physical signal is sensed by a sensor and captured as an analog electrical signal. This signal
must firstly be filtered to remove unwanted background noise signals and some analog preprocessing is performed. Then the analog signal is converted to digital and the main processing
is done by digital circuits. To be able to control the outside physical world the digital signal
must be converted back to analog.
The superiority of digital signal processing is also expressed by the technologies for the
fabrication of the chips, which are tailored mainly for digital signal processing. The classical
analog bipolar technology is abdicating to the favour of the much cheaper and for digital signal
processing more suitable CMOS technology. To be able to keep the high performance of
analog signal processing circuits also on `digital' technologies the designers have to look for
new principles for the design of circuits for analog signal processing. Terms like `switched
capacitors,' `current mode' and `switched currents' are appearing more and more in diverse
scientific and technical journals and educational publications. The current signal processing as
a part of analog signal processing is gaining an increasing attention of analog designers
because of its supplemental properties to the more classical voltage signal processing and it
offers also some advantages before the old, continuous-time, voltage-mode design techniques.
2. Current Signal Processing
During the years the analog, but also the digital designers began the think and calculate
only in terms of voltages rather than currents, although many of the signals handled by the
analog circuits are actually currents in their initial state. Examining the analog paths of the
signal processing system in Fig. L 1 shows that the output signals of the sensors, which are
very often currents or charge, were first converted to voltages by I/V converters, before they
were processed in pure voltage signal processing circuits; see Fig. I.5a. The pre-processed
voltage was then converted back to current, because many of the A/D converters need current
as input signal. A similar situation occurred at the output of the signal processing system,
page 3
Introduction
Figure I.5 Signal processing systems using
a) voltage processing circuits
b) current processing circuits
where the output current of the D/A converter was first converted to voltage, then postprocessed and finally often converted back to current to drive a physical transducer.
A much simpler way here is to use analog circuits directly processing the signals in form
of currents, like indicated in Fig. I.5b. This would skip the V/I and I/V converters necessary
to adjust the input signal for voltage processing and for converting to digital signals. The
chip area as well as the energy needed to drive the V/I and I/V converters would be saved,
and in addition, the accuracy of the signal processing could be higher, because a possible
sources of errors would be canceled too.
3. Outline of the Thesis
The reason, why current signal processing was not able to establish itself until now, was
the missing of high-performance current processing circuits. While there are a number of
well established building blocks for voltage processing circuits, e.g. operational amplifiers,
comparators, etc., there was not enough attention paid to the design of similar building
blocks for current processing circuits. In this thesis two different approaches to the design of
linear, continuous-time, current processing circuits will be given, the current-mode approach
page 4
lntroduction
and the design of high-current-gain devices able to work in negative-feedback configurations.
In Chapter 1 a comparison of the current signal processing to the voltage signal processing
is given. This chapter offers all theoretical background for the design of current processing
circuits described in the following chapters. Basic building blocks, not only for current
processing circuits, are described and their various modifications are compared in Chapter 2.
Everything about current conveyors, which are very useful building blocks of both voltage and
current processing circuits, is told in Chapter 3. Beside already well known and established
circuits based on current conveyors some new current conveyor implementations are proposed
and the results obtained from measurements on fabricated test chips are briefly presented.
The main part of the thesis concerns high-current-gain devices. In Chapter 4 the principle
of achieving a high current gain is explained and some high-current-gain stages are presented.
Built on these high-current-gain stages current operational amplifiers are proposed in Chapter
5. Here the theoretical considerations about the configuration of the current operational
amplifiers, as adjoint elements to the voltage operational amplifiers, can be found, and their
first and second order parameters are defined. This ís followed by experimental results
obtained from simulations done on two current operational amplifiers considered for
fabrication. In the end of the chapter also some examples of the possible exploitation of current
operational amplifiers are illustrated. Some more proposals of current operational amplifiers
for high-performance current signal processing are given in Chapter 6. In this chapter some
general properties of the current operational amplifiers suitable for VLSI design are indicated,
4. Notation, Symbology and Terminology
The notation, symbology and terminology used throughout this thesis coincides with the
standards proposed by technical societies and given by the International System of Units.
Signals, as voltages and currents, are designated as a quantity with a subscript, both either
upper or lower case according to the convention illustrated in the Table I.1 and Fig. L6. In
accordance with Table I_ 1 also large-signal parameters are given by an upper case quantity as
well as upper case subscript and small-signal parameters opposite by a lower case quantity and
subscript. The notations for signals and parameters associated with elements of circuits
illustrated in figures are supplemented by their names in the subscript.
To maintain a good survey also in large circuits, the symbols of MOS transistors shown in
Fig. L7 have been chosen. The bulk terminals are missing here, while the bulks of all MOS
transistors are connected either to the positive supply voltage for the p-channel or to the
negative supply voltage for the n-channel devices, respectively, if not stated else in the text.
page 5
Introduction
Table I. I
Figure I. 6 Notation for signals
Figure I. 7 Symbols of MOS transistors
a) n-channel MOS (bulk is connected to the negative supply voltage)
b) p-channel MOS (bulk is connected to the positive supply voltage)
page 6
Introduction
5. List of Symbols
page 7
Introduction
page 8
Introduction
page 9
Chapter 1
Current Signal Processing vs.
Voltage Signal Processing
Any signal processing done in electric or electronic circuits is performed by means of
more or less organized movement of charge, where voltages and currents are usually the
variables of the signal processing, and time, resistances, capacitances and inductances are
parameters of the circuit defining the properties of the signal processing. The main reason
for using only voltages and currents in analog signal processing is that active devices, which
are exploited in analog
electronics, operate mostly with resistances, or their inverted
counterparts conductances, as parameters for controlling the signal processing. The signal is
then processed by miscellaneous
voltage-current and current-voltage conversions,
amplification, weighted addition and multiplication, etc.
The starting chapter of the thesis gives a global overview above the basic laws and rules
of signal processing. It identifies and compares both the so-called voltage signal processing
and the so-called current signal processing as a complementary view onto signal processing.
At the end also the adjoint network theorem, which can be seen as the coupling link between
voltage and current signal processing, will set the theoretical fundamentals for the design of
current processing circuits.
1. Fundamentals of Signal Processing
A. A Very Brief Definition of Basic Variables and Parameters
The possibility of any electrical operation is due to the existence of charged microparticles
able to transport or trap the charge. The smallest existing particles used in electronics are
electrons carrying the charge
Since the electrons are parts of larger systems, crystals, which appear electrically neutral
from outside, the missing of an electron in a part of the crystal can be modeled by defining a
quasiparticle called `hole' carrying the opposite value of the charge carried by the electron
page 10
Chapter l
Current Signal Processing vs. Voltae Signal Processing
Any electrical operation done in solid-state electronics makes use of these two microparticles.
The term current is used to express any organized flow of the charge. Thus the current is
defined as the amount of charge being transported in a unity time period
and it is usually used as a continuous time variable, although the carriers of the charge
creating the current by their movement are actually discrete. The relationship between the
flow of discrete carriers of charge and the continuous variable current can be expressed by
the noise, which has its origin in the probability of grouping and ungrouping of the discrete
carriers, their trapping and releasing in the conductive `channels,' and the probability of
penetrating potential barriers. In this way the noise establishes a nature bottom limit for the
size of the recognizable signal current, called also the dynamic range.
Any organized movement of the carriers of charge needs to consume energy, which is
expressed in terms of voltage. The voltage is defined as the energy needed for moving a unity
charge from a lower energy state to a higher state
Two points inside an electric field have a difference of potentials - voltage of 1 V, if the
movement of a unity positive charge from one point to the other requires the energy of 1 J.
The relationship between the voltage and current is expressed by the Ohm's law
where a new variable, the electrical resistance R =
V
_
I
has been defined as the ability of
conductors to hinder the organized movement of the carriers of charge. Thus, a conductor has
the resistance I S2 (ohm), if the current 1 A flowing inside is achieved by the voltage of 1 V.
By inverting the resistance R the conductance is obtained
The ability of storing of the charge is expressed by the definition of the capacitance
page 11
Chapter 7
Current Signal Processing vs. Voltage Signal Processing
where the charge 1 C increases the voltage by 1 V if the storage capacitance is 1 F.
B. Voltage Signal Processing
To simplify the design of signal processing circuits only one of the two main variables of
signal processing, either voltage or current, is taken into account for the considerations and
calculations, while the other is usually handled only as an unwanted parasitic. Historically
voltage has been used as the main variable for signal processing, probably because the thinking
in terms of voltages is easier and simpler for the designers, then the thinking in terms of
currents. However, during the years the analog electronics became practically only voltage
processing and the most building blocks used by analog electronics are typical voltage
processing circuits.
A block diagram of a pure voltage processing system is shown in Fig. 1.1. The input
terminals of voltage processing blocks are usually high-impedance, ideally approaching infinite
ohms, so that there is only a small current, ideally no current, flowing into or out of these
terminals. This allows to supply more input terminals connected in parallel by a single output
terminal. The output terminals are opposite to the inputs low-impedance, ideally having zero
ohms. That makes it possible both to supply more input terminals and to drive heavy loads by a
single output, without a severe degradation of the processed signal.
A general model of a voltage processing circuit is illustrated in Fig. 1.2. The input
terminals exhibit parasitic input resistances as well as capacitances, which may affect the interblock performance of the voltage processing system the blocks are used in. The outputs of the
voltage processing block are voltage sources controlled by the voltages at the input nodes of
the block. The outputs are influenced by parasitic resistances and capacitances, which do not
allow a too heavy loading of the output terminals. The influence of parasitic inductances has no
significant meaning in real VLSI signal processing systems. Internally the block can content
any circuitry
Figure 1.1 Block diagram of a voltage processing system
page 12
Chapter I
Current Signal Processing vs. Voltage Signal Processing
Figure 1.2 Model of a voltage processing circuit
ensuring the input-output transfer function T„ . The output voltages can be in general obtained
from an equation similar to
In a linear signal processing circuits this equation can be modified to
where Tvjk,j = 1, 2,..., n, and k= 1, 2, .. , m are the respective voltage transfer functions from
the k-th input to the j-th output.
A remarkable property of voltage processing circuits that has to be underlined once again
is
that a single voltage-output terminal can supply more voltage-input terminals
connected in parallel.
page 13
Chapter l
Current Signal Processing vs. Voltage Signal Processing
Figure 1.3 Block diagram of a current processing system
Figure 1.4 Model of a current processing circuit
C. Current Signal Processing
Opposite to the pure voltage processing circuits stand the pure current processing circuits.
An example of a current processing system can be found in Fig. 1.3. A current processing
circuit has low-impedance input terminals capable of accepting current without high voltage
swings occurring at these nodes. The outputs need to be high-impedance terminals, what
should make it possible to supply also inputs with relatively high impedances.
A typical current processing building block with included parasitic resistances and
capacitances is drawn in Fig. 1.4. The input currents, which are flowing through the parasitic
input resistances to a reference voltage source, usually ground with symmetrical supply
voltages, are sensed and further processed by the internal
page 14
Chapter I
Current Signal Processing vs. Iioltage Signal Processing
circuitry. The processing can be described by the input-output transfer function T; . The output
currents are then calculated from
If the current processing circuit is linear, the output currents are given by
where Tijk, j = 1, 2, ..., n, and k = 1, 2, ..., m are the respective current transfer functions from
the k-th input to the j-th output.
The difference between voltage and current processing circuits is that a single output
terminal of a current processing block is able to supply only a single input terminal,
since the inputs of current processing blocks can not be arranged into a serial connection.
Therefore, if more input terminals are required to be supplied by the same input signal, it is
necessary to design current processing building blocks with multiple outputs giving the same
output signal.
2. The Adjoint Network Theorem
To simplify the design of current processing circuits, by using already well known and
well- explored voltage processing networks, the adjoint network theorem [1, 2], originally
defined to facilitate the expressing of network sensitivities, can be used. The adjoint network
theorem is based on the definition of reciprocal and interreciprocal networks.
Two networks are considered reciprocal if the same input-output transfer function
results as the excitation and the response are interchanged, like indicated in Fig. 1.5. If the
network N from Fig. 1.5 contents active elements, it does not posses this
reciprocal behavior. Nevertheless, to any given network N a corresponding network Na, referred
to as the adjoint network to N, can be created such that when the excitation and response of
network N are interchanged and network N is replaced by
page 15
Chapter l
Current Signal Processing vs. Voltage Signal Processing
Figure 1.5 Reciprocal networks of a
a) voltage processing circuit
b) current processing circuit
Figure 1.6 Interreciprocal networks of a
a) voltage processing circuit
b) current processing circuit
network Na the input-output transfer function remains the same, like expressed by (1.12). The
networks N and Na are said to be interreciprocal to each other. This situation is depicted in
Fig. 1.6. By definition, reciprocal networks are interreciprocal with themselves.
The design of current processing circuits becomes a simple task, if the adjoint elements to
ones used in voltage processing circuits can be found. Fig. 1.7 gives a list of elements used in
voltage processing circuits with their adjoint counterparts for current signal processing.
Already from Fig. 1.5 and Fig. 1.6 it is apparent that the input voltage source of the voltage
processing network has been replaced by a short circuit and the current flowing through it
has become the output response variable. Accordingly, the output voltage port of the voltage
processing network is being excited by an input current source in the current processing
network. Passive elements
R, C, and L remain the same in both voltage and current
processing networks. Finally, a voltage controlled voltage source (voltage amplifier) with
infinite input impedance and zero output impedance is converted into a current controlled
current source (current amplifier) exhibiting
zero input impedance and infinite output
impedance.
page 16
Chapter I
Current Signal Processing vs. Voltage Signal Processing
Figure 1.7 Some elements for voltage signal processing and their adjoint elements for current
processing
3.
Voltage
Processing
Circuits
versus
Current
Processing Circuits
The increasing popularity of digital designs and the respective tailoring of the
technologies for digital signal processing requires new design techniques for analog circuits,
which are considered to be fabricated on a common chip with digital functions [3, 4]. The
scaling down of the dimensions of the devices is also accompanied by a respective scaling of
supply voltages [5], what sets directly an upper limit for the dynamic range of the signal, if
this is processed as voltage. The result of such a development is that special rail-to-rail
building blocks for voltage signal processing have to be designed and used [6, 7, 8].
An alternative for solving the above described problems offer current processing circuits.
Here the decreasing of the supply voltage does not directly limit the dynamic range of the
signal processing circuits. In addition, the immunity of current processing circuits to the
`digital' noise, which can be found on supply voltage rails of mixed analog and digital
circuits, expressed by the means of power supply rejection ratio having the dimension of
ohms, is better to control in current processing circuits [9].
A very interesting feature of current processing circuits is also their ability to be used in
high- performance voltage processing applications. Recently voltage amplifiers based on
current controlled current sources, which achieve much higher frequency parameters than
conventional voltage operational amplifiers, were reported [ 10, 11]. Obviously, taking the
adjoint network theorem into account, voltage controlled voltage sources can be used in
high-performance current processing applications too, but this is not the scope of this thesis.
page 17
Chapter 7
Current Signal Processing v.s. Voltage Signal Processing
In the following chapters real current processing building blocks considered to be used in real
current processing circuits will be described.
References
page 18
Chapter 2
Basic Building Blocks (not only) for
Current Mode Circuits
Current-mode circuits have been gaining the attention of analog designers over the
last decades as an important class of analog circuits. Using current as the medium of
signal processing allows to influence the power supply rejection ratio as well as to set
the signal range more effective than it is done in voltage processing circuits, where the
maximal signal range is solidly given by the size of the supply voltage. The key
performance feature of current-mode circuits is however their inherent wide
bandwidth capability [1]. This is due to the fact that current-mode circuits do not
include any internal high-impedance node and because of this all poles and zeroes of
their transfer functions lie very high on the frequency axis, approaching the fTs of
transistors in the used technology.
At the begin of this chapter the translinear principle, which is the theoretical basis
for all current-mode circuits, will be defined. After that basic building blocks for
current-mode and current processing circuits generally, current mirrors and voltage
followers, will be described and the presented alternatives will be compared.
1. The Translinear Principle
The translinear principle was introduced by Gilbert in 1975 [2] and originally
defined for circuits with bipolar transistors. The term translinear expresses the
property of translinear circuits that the transconductance of a bipolar junction
transistor (BJT) is linearly proportional to its collector current [3]. Although this
principle has mostly been used to describe the performance of nonlinear circuits like
multipliers, dividers, squarers, function
generators, r.m.s. convertors, vector
magnitude generators, etc. it holds also for circuits performing linear functions like
current mirrors, voltage followers; and/or current conveyors, current feedback
amplifiers, current-mode amplifiers, and other more.
A. Definition of the Translinear Principle
In a closed loop, see Fig. 2.1, containing N PN junctions biased into forward
conduction the junction voltages VFk must sum to zero:
page 19
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.1 Bipolar single-loop translinear circuit
The junctions represent here usually the base-emitter junctions of BJTs, so that the VFks represent
base-emitter voltages VBEs of the transistors and the junction currents represent usually collector
currents ICk ideally equal to emitter currents IEk . Then (2.1) can be rewritten to
and
For the product to remain unity two fundamental conditions must be met:
1) There must be an even number of junctions in the translinear loop.
2) There must be an equal number of clockwise-facing (CVV) and
counterclockwise-facing (CCW) junctions.
Considering this symmetry conditions (2.3) can be stated as:
where the subscript with even values stands for clockwise faced junctions and the subscript with
odd values denotes the counterclockwise faced junctions.
The saturation current of a PN junction ISk is directly proportional to the base-emitter junction
area Ak, resulting in the adjustment of (2.4) to
page 20
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
and recognizing that the ratios ICk /Ak are just the emitter current densities the translinear
principle can be written in its most succint form:
Summing up [3]:
In a closed loop containing an even number of forward biased junctions, arranged so
that there are an equal number of clockwise-facing and counterclockwise-facing
polarities, the product the current densities in the clockwise direction is equal to the
product of the current densities in the counterclockwise direction.
Since this thesis is on circuit design in CMOS we will leave the bipolar transistors
now and concentrate on their unipolar counterparts only.
B. Translinear Principle for MOS Transistors
The translinear principle was redefined for use with MOS transistors by Seevinck
and Wiegerink in 1991 [4]. The derivation of the MOS translinear principle will be
redraught in the next lines.
Let us consider a loop of even number of MOS transistors with equal numbers of
clockwise and counterclockwise arranged gate-source voltages VGSs, like illustrated in
Fig. 2.2. From Kirchhofs voltage law
Figure 2.2 MOS single-loop translinear circuit
page 2l
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
If all transistors in the loop are saturated and we apply the square-law model from
(A.2) and we neglect for the moment the channel length modulation effect, (2.7) can be
rewritten to
Assuming well-matched threshold voltages VTk
~ and neglecting the body effect allows the threshold voltages to be dropped. The
technology parameters μO and COX will be considered common so that they can be
Equation (2.9) is the statement of the translinear principle for MOS transistors.
However, for the application of the translinear principle in real MOS circuits two
important considerations have to be made:
I ) We cannot expect well-matched n-channel and p-channel transistor
parameters. If a good matching is required, only single-channel
transistors must be used.
2) Drain currents of MOS transistors are also influenced by body effect and
channel length modulation.
An extensive description of using the square-law characteristics of MOS transistors in
analog circuit design for nonlinear signal processing has been given already by Bult and
Waflinga in [5] without defining the translinear principle for MOS transistors.
2. Current Mirrors
Current mirrors, which are practically the simplest current controlled current sources,
are also one of the simplest circuits the translinear principle can be applied to. In the
next subsections different current mirrors will be shown and their properties compared.
page 22
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.3 Block schematics of ideal current mirrors
a) universal
b) n-channel
c) p-channel
A. Ideal Current Mirror
The ideal current mirror shown in Fig. 2.3 is a two-port having a low-impedance (ideally
zero ohm) grounded input terminal capable of accepting the input current IIN and a highimpedance output terminal (ideally approaching infinity) into which a replication of the input
current, the output current IOUT is forced to flow to. The sum of the input current IIN and the
output current IOUT flows into a common node, which is usually grounded to either the
positive or negative supply voltage. If current mirrors built of either n-channel or p-channel
MOS transistors are employed only single polarity input current will be transferred to the
output, as indicated by the arrows in Figure 2.3b,c.
In many cases the input-output current transfer is unity Iou/IIN = 1, but sometimes current
gain or attenuation AI = IOUT/IIN ≠ 1 is required. This input-output current transfer rates are
essentially independent of the voltage on the output terminal and the magnitude and
frequency of the transferred currents. In addition, the voltage at the input terminal remains
constant over a large range of input currents.
B. Simple Widlar Current Mirror
The simplest current mirror was proposed by Widlar [6, 7], firstly for the bipolar
technology. The MOS Widlar current mirror drawn in Fig. 2.4 [8] consists of two singlechannel MOS transistors forming a translinear loop- Transistor M1 with its drain connected to
the gate forms the input node of the current mirror giving the input resistance
page 23
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.4 Simple Widlar MOS current mirror
Enhancement-mode MOS transistors remain in the saturated mode operation in this
configuration. If the condition that the voltage at the output node of the current mirror is larger
then the value
than the conditions for (2.8) are fulfilled and the statement of the translinear principle for MOS
transistors (2.9) can be applied to find the input-output current transfer of this circuit:
where AI is the large-signal current gain and at the same time the small-signal current gain of
the current mirror at low frequency.
Keeping in mind the second consideration for the application of the translinear principle
with MOS transistors, the definition of the input-output current transfer stands precise only
if the output voltage equals the input voltage vOUT = vIN and so vDSM2 = vDSM1 = vGSM1 . With a
variation of the voltage at the output node of the current mirror the input-output current
transfer varies in a relatively large range due to the channel length modulation effect of M2.
The influence of the channel length modulation effect can be expressed by the small-signal
output resistance of the current mirror given by [9]
page 24
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
C. Wilson Current Mirror
An improvement of the properties of the simple Widlar current mirror has been achieved
by Wilson [10] by adding a single transistor into the output branch, like illustrated in Fig.
2.5a. In the bipolar technology, where it has been proposed for originally, it suppressed the
loss of the transferred current due to the non-infinite beta of the BJTs and thus the
appearance of base currents. For the MOS technology this property is irrelevant.
Nevertheless, the output resistance of the Wilson current mirror indicates an improvement in
comparison with (2.13)
If both devices M2 and M3 shall be operated in the saturated region the voltage at the output
node must be kept at least as high as
page 25
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
D. Improved Wilson Current Mirror
The additional transistor M4 of the improved Wilson current mirror drawn in Fig. 2.5b
ensures that vGSM1 = vGSM2 and thus improves the accuracy of the input-output current
transfer of the current mirror. With
the output resistance of the improved Wilson current mirror is only slightly higher than the
output resistance expressed by (2.14). The output voltage range of the improved Wilson
current mirror is given by (2.15).
E. Cascode Current Mirror
In the MOS technology the cascode current mirror shown in Fig. 2.6 is often used.
Transistor M4 shields M2 from the variation of the voltage that occurs at the output node of
the current mirror by the factor of approximately gmM4 /gdsM4. The resulting output resistance of
the cascode current mirror is then
(2.17)
Its output voltage range is given by (2.15) too.
Figure 2.6 Cascode current mirror
page 26
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.7 Regulated cascode current mirror
F. Regulated Cascode Current Mirror
A current mirror with improved output resistance as well as voltage range available at the
output was introduced by Säckinger and Guggenbühl in [ 11 ] and is described in detail in
[12]. The proposed regulated cascode current mirror, which can be found in Fig. 2.7, employs
a feedback loop consisting of an amplifier built of M3 and IBIAS , and the source follower
M2. In this configuration the drain-source voltage of M1 is regulated to a fixed value defined
by the gate-source voltage of M3. The resulting small-signal output resistance is then
approximately
where gout BIAS is the output conductance of the current source I BIAS. Since M2 does not need
to remain in saturation for a proper performance the usable output voltage range of the
regulated cascode current mirror is
where
page 27
Chaptler 2
Basic Building Blocks (not only) jor Current Mode Circuits
Figure 2.8 Cascode current mirror with gain enhancement
G. Cascoded Current Mirror With Gain Stage Enhancement
A cascode current mirror employing an amplifier in a negative feedback loop shown in Fig.
2.8 was proposed by Bult and Geelen in [13, 14]. The output resistance of this current mirror is
and the size of its output voltage range is identical to that of the regulated cascode current
mirror. The advantage of this current mirror is a very high output resistance which can be
achieved by using high-gain operational amplifiers. On the other hand, the using of
operational amplifiers may be also treated as a drawback of this current mirror configuration
since they are additional devices of the current mirrors and which usually have to be
operated very close to one of the supply voltages.
H. High Swing Current Mirrors
In order to increase the voltage range available at the output terminal of current mirrors the
cascode transistor M4 has to be biased in such a way that M2 is kept in saturation only by a
minimal exceed of vDSatM2 . The voltage at the output of the current mirrors must be higher
than
page 28
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.9 High-swing cascode current mirrors of:
a) Choi at. al. [ 19]
b) Babanezhad and Gregorian [20], generalized by Crawley and
Roberts [21 ]
c) Gruziński and Kulej [22], found in [23 ]
page 29
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
what is only approximately as twice as high than the value for the simple Widlar current mirror
from (2.11). Different proposals for very high swing current mirrors [ 19, 20, 22] can be found
in Fig. 2.9.
I. The Folded Cascode Principle
A very interesting opportunity for obtaining a high output voltage swing as well as
negative current mirroring is offered by the folded cascode principle. A folded cascode
current mirror is drawn in Fig. 2.10. Transistor M1 of the current mirror is a constant current
source either sinking or sourcing a DC current IDM1. The input current IIN flowing into the
drain of Ml becomes a part of IDM1 and the DC current obtained at the output is
The current input-output transfer function of the folded cascode current mirror is then
always
if the condition IIN < IBIAS is fulfilled. The output resistance of the folded cascode current
mirror from Fig. 2.10 equals the output resistance of cascode current mirror given by (2.17).
Of course, different cascoding methods can be applied to M1 to obtain folded cascode
current mirrors. These cascoding methods refer to the above described various cascode
current mirrors and the resulting output impedances of such folded cascode current mirrors
are given by the respective expressions.
Figure 2.10 Folded cascode current mirror
page 30
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Since the gate voltage of M2 needs to be kept only as high as Ml remains in the saturated
region, the minimal voltage at the output node of the folded cascode current mirror for a proper
operation is as high as (2.22). This property makes the folded cascode current mirror also
preferable if high-voltage-swings are needed [24].
3. Voltage Followers
Although voltage followers are usually not treated as current-mode or current processing
circuits, because both the input and the output variables are voltages; they are typical voltage
controlled voltage sources, they will be mentioned in this chapter too. This is because voltage
followers are used to implement the voltage follower function of current conveyors [ 15, 16]
and input stages of class AB current mirrors [ 17] and current amplifiers. These
implementations will be also the topic of the following chapters.
If voltage followers are used as input stages of current processing circuits, their voltage
range is irrelevant, since they operate always at a stable voltage defining the reference voltage
of current input terminals, usually ground with symmetrical supply voltages. Therefore
lowering the supply voltage does not have a negative influence onto the performance of the
input stage implementations of the voltage followers.
Some of the transistor-implemented voltage buffers fit the translinear principle described
at the begin of this chapter
A. Ideal Voltage Follower
Likewise the ideal current mirror the ideal voltage follower illustrated in Fig. 2.11 is a two
port. The voltage follower has a high-impedance, voltage-input terminal, which ideally
approaches infinity and a low-impedance output terminal with ideally zero ohms onto which a
replica of the input voltage VOUT = VIN can be found.
The input-output voltage transfer function of the ideal voltage follower is always unity
and it is essentially independent of the current flowing in or out of the output terminal, of the
magnitude and frequency of the voltages the follower operates with. In addition, there is no
current flowing into the input terminal.
Figure 2.11 Block schematic of an ideal voltage follower
page 31
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.12 Single MOS transistor source follower
B. Class A MOS Transistor Source Follower
The simplest voltage follower is a transistor in a common drain arrangement shown in Fig.
2.12. The input resistance of this class A voltage follower is very high, given by the high
resistance of the insulator at the gate of a MOS transistor, the output resistance is
The input-output voltage transfer of this voltage follower at low frequency is [18]
It means that the bulk effect as well as the output conductance of M1 gdsMl and the output
conductance of the current source IBIAS goutBIAS are responsible for the non-unity inputoutput voltage transfer of the voltage follower. If M1 is not put into a well with the source
connected to the bulk, the influence of the output conductances can be neglected due to their
much smaller influence onto the voltage transfer function.
For both voltage and current processing mostly class AB voltage followers are required.
They are able to deliver current of both polarities into the load connected to the output of the
voltage follower. In the following sections a number of class AB voltage followers will be
described.
C. Class AB Complementary Source Follower Cascade
The voltage follower in Fig. 2.13, consisting of two cascaded class A source followers M1M4 and M2-M3 connected in parallel, and creating so a translinear loop, was firstly used
page 32
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.13 Complementary source follower cascade
in bipolar technology [25]. In this technology the fabrication of well matched NPN and PNP
transistors on a single chip is possible and therefore an accurate input- output voltage transfer
can be achieved.
In MOS technology this voltage follower exhibits some reduction on accuracy of the
transfer function [26, 27]. The input resistance of the voltage follower is again very high due
to the gates of M1 and M2 creating the input terminal. Its output resistance is
Following the translinear principle for MOS transistors [4] (2.9) the drain currents of M3
and M4 should equal the drain currents of M 1 and M2 if the sizes of the respective
transistors are equal and their parameters are perfectly matched. Because the threshold
voltages of n-channel devices do not match well the threshold voltages of p-channel devices,
and in addition, the bulk effect increases the threshold voltages of M3 and M4 in comparison
to Ml and M2 [18], the drain current of M3 and M4 will be something higher than they
should be ideally and the output voltage will be shifted against the input voltage. The smallsignal gate and bulk transconductances of the respective transistors, derived for transistors in
saturation in Table A.3, will have different values and the input-output voltage transfer of
this follower expressed by [26]
becomes then less than unity. The attenuation factor of this voltage follower measured in [26] is
approximately 0.9 and the follower exhibits a remarkable input-output voltage offset of more
than 0.5V.
page 33
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.14 Single stage complementary source follower
D. Class AB Single Stage Complementary Source Follower
The voltage follower in Fig. 2.14 [28, 26, 27] showing similarities with the earlier
described simple Widlar current mirror [6] is a translinear loop where the gate-source
voltages VGS of two n-channel (Ml-M3) and two p-channel (M2-M4) devices are supposed to
match. In this loop the input voltage is transferred to the output of the follower precisely, if
the drain currents of M1- M2 equal the drain current of M3-M4 and vice versa, the drain
current of Ml-M2 is transferred precisely to M3-M4 if the input and the output voltages and
so the gate-source voltages VGS of the respective transistors as well as the sizes of the
respective devices are equal. The resulting transfer function is now [26]
Since the output voltage of this source follower approaches the input voltage, the source
voltages of all transistors in the loop are equal and so the influence of the bulk effect of MlM2 is canceled by the bulk effect of M3-M4 very precisely. The equilibrium between the
input and output voltage and the quiescent drain currents of M1-M2 and M3-M4 is disturbed
only by the non-zero output conductances gds of the transistors and their different drainsource voltages VDS. The offset voltage measured in [26] has the size of only some milivolts
and the gain approaches unity very closely.
While the definition of the output resistance of this voltage follower is the same as
derived in (2.27), the input resistance is inversely dependent on the output conductances of
the two bias current sources IBIAS
page 34
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.15 Voltage operational amplifier based voltage follower
E. very-Low-Output-Impedance voltage Followers Utilizing
Voltage Operational Amplifiers
One of the very critical parameters of voltage followers is their output impedance. To
prevent the voltage gain or closed-loop stability from degrading while driving heavy resistive
and/or capacitive loads; understand low resistances and/or high capacitances, the output
resistance of voltage output devices must be very low. A commonly used voltage follower is
here a voltage operational amplifier in a unity-gain feedback configuration, see Fig. 2.1 S,
too often treated as the adjoint element to current mirrors [30]. At low frequency its output
resistance is
where routOL is the small-signal, open-loop output resistance and Av is the open-loop gain of
the operational amplifier.
Another operational amplifier based very-low-output-impedance voltage follower, a
pseudo source follower can be found in Fig. 2.16 [28]. The output resistance of this voltage
follower is
where Av1 and Av2 are the open loop gains of the respective operational amplifiers. The main
problem of this structure is the controlling of the quiescent drain currents
of MS and M6. A too high open-loop gain of the used operational amplifiers associated with
the variation of their input offsets can create an unacceptable chip-to-chip variation of the
drain currents of MS and M6, a short connection of the supply voltages in the worst case
[28]. Second, the frequency characteristics must be given a careful attention to, if the buffer
will be used in feedback configurations. And third, a high input common mode range as well
as output voltage swing of the operational amplifeirs is welcome.
page 35
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.16 Pseudo source follower
The drawbacks of the previous voltage follower is solved by merging the single stage
complementary source follower together with the lately described pseudo source follower,
like illustrated in Fig. 2.17 [29]. By building a small input offset voltage into the two
operational amplifiers, transistors MS and M6 are turned off, if the follower is operated close
to the quiescent state. In this state the output current is supplied by transistors M3 and M4. If
the output current becomes very high, its main portion is sinked by MS or sourced by M6,
respectively. Following these considerations the definition of the output resistance of this
voltage follower at the quiescent state equals the definition from (2.27), while with high
output current it approaches (2.32).
Figure 2.17 Combined voltage follower of Fisher [29]
page 36
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Figure 2.18 Voltage follower exploiting current gain
F. Voltage Follower Exploiting Current Gain
Although high-current-gain stages will be described in detail in Chapter 4 a voltage
follower exploiting a high-current-gain amplifier in a unity-gain feedback configuration [31]
will be shown here. Transistors Ml-M4 in Fig. 2.18 build the basic core of the voltage
follower, similarly to Fig. 2.14. If the drains of M3, M4 are connected to the high-impedance
constant current sources M5, M6 instead of low-impedance supply voltage rails or inputs of
current mirrors, a strong voltage variation occurs at the high-impedance nodes T 1 and T2
with an imbalance of the drain currents of M3, M4. The connection of the gates of the
common source transistors M7, M8 to these nodes accomplishes the current gain action. If the
output of the current amplifier, the drains of M7, M8 are connected to the output of the
voltage follower, the major fraction of the output current flows through M7, M8 instead of
M3, M4. When this occurs, the output resistance of the voltage follower becomes
The output impedance of the voltage follower exhibits a dominant zero at
page 37
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
where CT1 and CT2 are the capacitances associated with the high-impedance nodes T1 and
T2, respectively. Behind this zero the output resistance given by (2.33) increases. The
function of transistors M9, M10 is to control the quiescent drain currents of M7, M8 by
controlling their gate voltages at the quiescent state [32], without affecting the resistive part
of the impedance of the nodes T 1, T2 and so the definition of the output resistance of the
voltage follower itself.
G. Compensated Low-Output-Impedance Voltage Follower
A different possibility for obtaining a very-low-output-impedance voltage follower offers
the compensation technique shown in Fig. 2.19 [33]. Transistors M1-M4 build again the
basic voltage follower from Fig. 2.14 and the devices MS-M9 establish an additional gatesource voltage, VGS stage to M1-M4. Transistors M8, M9 are biased by the current mirror
M13-M16 sensing the output current of the voltage follower in such a way that any variation
of the gate- source voltages of M3, M4 caused by the variation of the output current of the
voltage follower across the non-infinite gate transconductances of M3, M4 is outcompensated by the opposite variation of the gate-source voltages of M7, M8. The outcompensated output resistance is then
(2.3 5)
The dominant zero of the output impedance can be found at
Figure 2.19 Compensated voltage follower
page 38
Chapter 2
Basic Building Blocks (not only) for Current Mode
where M is the mirroring ratio or the gain of the current mirror M 13-M I 6 and CT1 and CT2 are
capacitances associated with the nodes T1, T2.
H. Further Improvements on Accuracy of Voltage Followers
From (2.27) and (2.29) it is obvious that if the influence of the bulk effect on the accuracy
of the input-output voltage transfer of voltage followers is suppressed by a symmetrical MOS
transistor arrangement in a translinear loop, like it has been done in the single stage
complementary source follower from Fig. 2.14, the non-zero output conductances of the
output transistors together with the different drain-source voltage of the input and output
transistor pairs are beside mismatching the major source of inaccuracy.
This problem can be solved by cascoding of the transistors of the voltage followers [34],
similarly to the cascoding of transistors in current mirrors shown in Fig. 2.5-9. An example of
a voltage follower build of cascoded transistors is shown in Fig. 2.20. Using such a cascoding
the drain current of M3 and M4 approaches much more the drain current of M1 and M2. This
results in closer values for their gate and bulk transconductances given by (A.14) and (A. I5);
see also Table A.3. Thus, the gate and bulk transconductances of (2.29) cancel each other
much better than without cascoded transistors.
Figure 2.20 Single stage complementary source follower with cascoded transistors
page 39
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
Of course, the fee paid for higher accuracy is here the restricted voltage range of this
follower which is not too serious, if it is used as an input stage of a current processing circuit.
References
page 40
Chapter 2
Basic Building Blocks (not only) for Current Mode Circuits
page 41
Chapter 3
Current Conveyors,
Applications
Implementations
and
Current conveyors were introduced in the late sixties, early seventies by Smith and Sedra [1, 2].
They were considered to be used as controlled voltage and current sources, impedance converters and
inverters, etc., but also as function generators, amplifiers, filters, etc., in current processing circuits
mainly for instrumentation and measurement applications [3].
In the first years of their appearance the performance of current conveyors was severally limited by
the available technologies, which did not allow well-matched devices on fabricated chips [4]. Since the
technologies have improved in the eighties, the current conveyors gained the attention of many analog
designers. Today the current conveyors have developed to very useful building blocks of analog
electronics. They are parts of a number of very often used circuits, like active filters, transimpedance and
`current feedback' operational amplifiers, voltage and current operational amplifiers and other more, and
their main application areas are in high-speed, high-frequency circuits for both voltage and current signal
processing.
Since the current conveyor approach to the design of current operational amplifiers was the first
attempt to design high-current-gain amplifiers, which are described later in Chapter 4 and Chapter 5 and
the adjoint network mechanisms are better to understand by means of these devices too, a partial
attention of this thesis is given to them. This chapter gives a wide overview above the current conveyors,
their basic implementations as well as a brief contribution of the author to the research of the
exploitation of the current conveyors in both voltage and current processing circuits.
I. Definition of Current Conveyors
A. First Generation of Current Conveyors (CCI)
The current conveyor concept was introduced by Smith and Sedra in 1969 [1]. The current
conveyor was defined as a three-port device, which can be represented by a box drawn in Fig. 3.1a.
This device operates so that the voltage applied to its high-impedance Y-terminal appears also at its
low-impedance X-terminal. The current being forced into the X-terminal is conveyed to the highimpedance output terminal Z of the current conveyor as well as to its input terminal Y.
Mathematically the performance of the current conveyor can be described by the hybrid equation
page 42
Chapter 3
Current Conveyors, Implementations and Applications
Figure 3. I A first generation current conveyor
a) symbol
b) nullator-norator representation
where the + sign applies for positive current conveyors denoted as CCI+, in which the current
flows into both the X- and Z-terminal in the same direction, and the - sign stands for the
opposite polarity of the X-to-Z-terminal current transfer of the negative current conveyor
CCI-. The orientation of the voltages and currents expressed in (3.1) follows the denotation
from Fig. 3.1a. A nullator-norator representation of the first generation current conveyors
can be found in Fig. 3.1 b.
Although some reports on applications using the first generation current conveyors can be
found [5, 6], this device has not gained as much importance in analog circuit design as its
second generation counterpart.
B. Second Generation Current Conveyors (CCII)
To increase the versatility of the current conveyors the second generation of current
conveyors was proposed [2]. In this device no current flows into its input terminal Y and so the
mathematical representation of the CCI from (3.1) changes to
for the CCII, where again the + sign denotes the positive X-to-Z current transfer of the positive
current conveyor CCII+ and the - sign determines the negative X-to-Z
page 43
Chapter 3
Current Conveyors, Implementations and Applications
Figure 3.2 Second generation current conveyor
a) nullator-norator representation
b) voltage/current-follower representation
current transfer of the negative current conveyor CCTI-. Utilizing the same block representation
of the CCII as illustrated in Fig. 3.1 a for the CCI including the denotation of the voltages and
currents given in (3.2) the nullator-norator diagram of the second generation current conveyor
can be seen in Fig. 3.2a.
For practical reasons also a voltage- and current-follower representation of the CCII can be
derived, as presented in Fig. 3.2b [7). Here the voltage follower (buffer) VB represents the Y-toX terminal voltage following function and the current mirrors CMn and CMp accomplish the Xto-Z-terminal current follower function of the CCII. According to the Kirchhof s current low the
current flowing in/out of the X-terminal of the current conveyor must be equal to the sum of the
currents from the supply rails to the voltage buffer, if the condition of a zero current flowing into
the Y-terminal of the current conveyor is fulfilled. Sensing the supply currents of the voltage
buffer by the inputs of the current mirrors CMn, CMp gives the replica of the input current
flowing into the X-terminal at the output terminal Z of the current conveyor.
C. Current Conveyors and Current Gain
In most of their applications the X-to-Y-terminal current transfer of the current conveyors is
required to be unity, like indicated in (3.1) and (3.2). However, in some cases a certain
amplification of the input current is needed. In this case the aspect ratios of the transistors
implementing the current mirrors CMn, CMp determine the current gain of the current
conveyors. Equation (3.2) can be generalized to
where A ; represents the X-to-Z-terminal current gain of the current conveyor.
page 44
Chapter 3
Current Conveyors, Implementations and Applications
2. Implementation of Current Conveyors
Since the second generation current conveyors are the mostly used current conveyors and they
are also used throughout the work described in this thesis, all implementations of the current
conveyors and applications based on these devices shown in the following sections of this
chapter will concern only the CCII.
A. Voltage Operational Amplifier implementation of the CCII
The first high-performance current conveyor implementations were based on voltage
operational amplifiers. Based on the earlier in this chapter described current conveyor
representation from Fig. 3.2b, the voltage operational amplifier implementation of the CCII
illustrated in Fig. 3.3 can be found [7]. Here the voltage operational amplifier in a unity-gain
feedback arrangement; see also Fig. 2.15, replaces the voltage follower VB from Fig. 3.2b and
accomplishes so the Y-to-X-terminal voltage following action of the current conveyor. The
supply terminals of the voltage operational amplifier are sensed by the current mirrors CMn,
CMp in the same manner, like in Fig. 3.2b.
Although the voltage operational amplifier implementation of the CCII exhibits remarkable
low X-terminal impedances; see (2.31), the speed of the current conveyor is degraded because
of the internal high-impedance node of the voltage operational amplifier. However, many of
the high-accuracy current conveyors are based on this CCII implementation [8, 9, 10].
Fig. 3.4 shows CMOS implementations of the CCII+ and CCII- using a voltage operational
amplifier as the voltage follower [ 10]. The impedance of their Y-terminals in very high,
because the gate of an MOS transistor is used as the input of the operational amplifier. The
other terminal resistances of the current conveyors are
Figure 3 .3 Block diagram of a CCII+ based on voltage operational amplifier
page 45
Chapter 3
Current Conveyors. Implementations and Applications
Figure 3.4 CMOS implementation of a voltage operational amplifier based
a) CCII+
b) CCII
proposed by Surakampontorn at.al. [10]
and
for the two current conveyor implementations, respectively.
B. Simple CMOS Implementations of the CCII
Since the current conveyors have been proposed to be used mainly in high-frequency
circuits, other current conveyor implementations allowing high-speed performance have to be
used. Fig. 3.5 presents positive current conveyors based on a single stage complementary
source follower from Fig. 2.14 and a complementary source follower cascade shown in Fig.
2.13 [11]. Widlar current mirrors build the current mirrors CMn, CMp transferring the
current from the X- terminals of the current conveyors to their Z-terminals. By using two
stacked current mirrors or folded cascoded current mirrors at the place of CMn, CMp also
CCII- can be designed. Equally to (2.27) the X-terminal resistance of these current conveyors
is
page 46
Chapter 3
Current Conveyors, Implementations and Applications
Figure 3.5
CCII+ based on
a) single stage complementary source follower
b) complementary source follower cascade studied
by Bruun in [11]
and according to (2.13) the Z-terminal resistance is
While the Y-terminal resistance of the current conveyor based on a single stage
complementary source follower is dependent on the output conductances of the bias current
sources M 11, M I2
the Y-terminal resistance of the current conveyor based on a complementary source follower
cascade is as high as the respective resistance of the previously in Fig. 3.3 shown voltage
operational amplifier based CCII.
Except of the difference between the Y-terminal impedances of these two CCII
implementations another deviation between their performances must be depicted. The inputoutput voltage transfers of the used voltage followers given by (2.29) for the single stage
complementary source follower and (2.28) for the complementary source follower cascade
appear also with the current conveyors described in this section. In addition there is a
significant voltage offset between the Y- and X-terminal of the CCII based on the
complementary source follower cascade.
page 47
Chapter 3
Current Conveyors, Implementations and Applications
C. Current Conveyors with very High Z-Terminal Impedances
In order to increase the Z-terminal impedance of the previously shown current conveyors
diverse cascoded current mirrors can be used at the place of CMn, CMp in Fig. 3.2b. These
cascoded current mirrors have been described in Chapter 2 and will not be shown here again.
The same cascoding can be used to improve the Y-terminal impedance of the current
conveyor from Fig. 3.5a.
D. Current Conveyors with very Low X-Terminal Impedances
Similarly, the X-terminal resistance of the current conveyors given by (3.6) can be lowered
by using very-low-output-impedance voltage followers also illustrated in Chapter 2. In fact,
the in Fig. 3.3 and Fig. 3.4 firstly shown current conveyors based on a voltage operational
amplifier in a unity-gain configuration is such a very-low-X-terminal-impedance current
conveyor.
3. Applications Based on Current Conveyors
Some possible applications of current conveyors have been mentioned already at the begin
of this chapter. In the following sections diverse voltage and current operational amplifiers
based on current conveyors will be shown and their adjoint properties will be pointed out.
Finally, also a current conveyor implementation of a gyrator will be presented.
A. ′Current Feedback' Voltage Operational Amplifier
′Current feedback' voltage operational amplifiers were designed in the eighties [12, 13].
Their block diagram based on current conveyors is drawn in Fig. 3.6 [14, 15]. The Y-terminal
of the CCII+ is the high-impedance non-inverting input terminal, while its X-terminal creates a
low- impedance inverting terminal of the operational amplifier. The output of the `current
feedback' operational amplifier is buffered by the voltage follower VB. The high-impedance
output Z of the CCII+ connected to the high-impedance input of the voltage follower creates an
internal high- impedance node, denoted usually as the transimpedance node. Because the
voltage of the X- terminal of the current conveyor is forced to follow the voltage at its Yterminal, the differential voltage at the two input terminals of the operational amplifier is
converted to a current flowing out of the X-terminal of the CCII+
page 48
Chapter 3
Current Conveyors, Implementations and Applications
Figure 3.6 Block diagram of a ′current feedback' voltage operational amplifier
Since this current is conveyed to the Z-terminal of the CCII+, a voltage swing appears at the
transimpedance node. This voltage is then buffered to the output of the operational amplifier
Both resistances RX and RT would be normally parasitics of the current conveyor and the voltage
follower. Taking the parasitic capacitance CT of the transimpedance node into account the overall
gain of the current conveyor based ′current feedback' voltage operational amplifier is
where pd = - 1 / CT RT is the dominant pole of the transfer function. The capacitance associated
with the transimpedance node CT can be also used for compensation of the `current feedback'
voltage operational amplifier.
Although the first current feedback' voltage operational amplifiers found their applications
mainly in the bipolar technology, there were attempts to design this circuit in CMOS too. The
best results here were obtained by Bruun [11]. He designed two ′current feedback' voltage
operational amplifiers, which use different voltage followers in their input current conveyors,
already illustrated in Fig. 2.14 and Fig. 2.13. The schematics of both CMOS `current feedback'
voltage operational amplifiers can be found in Fig. 3.7. Bruun showed that the configuration
with the complementary source follower cascade ín Fig. 3.7b is not appropriate for `current
feedback' operational amplifiers due to a large gain error. The other structure, based on the single
stage complementary source follower from Fig. 3.7a exhibits a rather small variation of the
bandwidth with the gain. This property follows the theoretical predictions on `current feedback'
voltage operational amplifiers that their bandwidth is independent on closed-loop gain [ 16],
page 49
Chapter 3
Current Conveyors, Implementations and Applications
Figure 3.7 CMOS `current feedback' voltage operational amplifiers based on current
conveyors with
a) a single stage complementary source follower
b) a complementary source follower cascade
if RT >> RFB +RX |AVCL| and RX << RFB / AVCL, where RFB is the feedback resistance from the
output of the operational amplifier to its low-impedance inverting input terminal and A VCL, is
the low-frequency, closed-loop gain. These constant bandwidth characteristics determine that
the `current feedback' voltage operational amplifier belongs to the class of the so-called
transimpedance amplifiers.
Another key property of the `current feedback' voltage operational amplifiers is that they are
not slew-rate limited. This is because the current needed to charge and discharge the capacitance
CT is not limited by a constant tail current source, like in the case of standard voltage
operational amplifiers [17]. This current is obtained from the low-impedance inverting input
terminal of the `current feedback' voltage operational amplifier. The inverting input terminal
creates a kind of class AB
page 50
Chapter 3
Current Conveyors, Implementations and Applications
transconductance stage, built of a class AB voltage follower, in this way. Therefore, the `current
feedback' voltage operational amplifier is well suited for high-frequency and noncontinuous time
processing circuits.
B. Voltage Operational Amplifier
Bruun also showed that classical voltage operational amplifiers can be designed using
current conveyors too [14]. He extended the input of the `current feedback' voltage operational
amplifier to a fully symmetrical configuration using two CCII+, resulting in the voltage
operational amplifier presented in Fig. 3.8. Several CMOS voltage operational amplifiers
based on current conveyors have been reported in [ 15, 18, 19, 20]. The device works as
follows. The difference of the input voltages is converted to the current flowing between the
X-terminals of the two current conveyors at the input of the operational amplifier. This current
conveyed to the transimpedance node of the amplifier is converted to the voltage buffered to
the output of the device. Following (3.11) the transfer function of this voltage operational
amplifier is
where pd = - 1 / CT RT is the dominant pole of the open-loop transfer function.
A fully differential voltage operational amplifier based on current conveyors was designed
and fabricated in a standard industry, commercially available, 2.4μm CMOS technology. The
schematic of the circuit extensively reported in [15] is drawn in Fig. 3.9. The current conveyors
are based on complementary source follower cascades to obtain very high resistances of the
input terminals of the operational amplifier. The non-ideal voltage transfer of these followers
does not limit the overall performance of
Figure 3.8 Voltage operational amplifier based on current conveyors
page 51
Chapter 3
Current Conveyors. Implementations and Applications
Figure 3.9 Fully differential, current conveyor based CMOS voltage operational amplifier
page 52
Chapter 3
Current Conveyors, Implementations and Applications
the input stage of the operational amplifier, if both the offset and the gain of the complementary
source follower cascades are equal, and so cancel each other. This requires the transistors M5+
through M8+ to be well matched to their counterparts from the inverting input, MS- through
M8- , respectively.
The measurement results are collected in Table 3.1 and the ac characteristics of the
operational amplifier for different gain settings can be found in Fig. 3.10. Measuring five
samples the final input offset of the operational amplifier was less then 10mV. The open-loop
gain higher than 90dB was achieved by using regulated cascoded current mirrors M14-M30 at
the place of the current conveyors. With the phase margin of approximately 85° the operational
amplifier is overcompensated. The unity-gain bandwidth is so with 2MHz less than the
maximal possible with the given transistor sizes and the quiescent current consumption of
5mA.
Like indicated in Fig. 3.10, the proposed voltage operational amplifier exhibits a typical
constant gain-bandwidth product in negative feedback configurations. In spite all properties are
indicating classical voltage operational amplifier operation, this operational amplifier
configuration does not exhibit slew-rate limitation either, because the current charging and
discharging the capacitance CT associated with the transimpedance node is obtained directly
from the class AB transconductance stage built of class AB voltage followers of the current
conveyors.
Table 3.1
Figure 3.10 Measured ac characteristics of the voltage operational amplifier from Fig. 3.9
for different closed-loop gain settings
page 53
Chapter 3
Current Conveyors, Implementations and Applications
C. Current Operational Amplifier
The previous two current conveyor implementations were typical voltage processing
circuits, where current as the carrier of the processed signal has appeared only internally.
The next two circuits will be considered for true current signal processing. The first circuit
shown in Fig. 3.11 is a current operational amplifier intended by Bruun [21 ] and it is
supposed to be the adjoint element of the fully differential voltage operational amplifier
described in the last section.
Thus, the current operational amplifier proposed in [21 ] is a fully differential device and
its operation can be described as follows. The input currents iIN+ and iIN are conveyed by a
CCII+ and CCII- into the transimpedance node, where their difference is converted to the
voltage vT,
This voltage is then converted back to differential output current by the transconductance stage
built of another current conveyor connected by its Y-terminal to the transimpedance node. The
X- terminal of the differential-output CCII following the voltage vT drives the current
through the grounded resistance Rx. The current ix is then conveyed to the output terminals of
the CCII resulting in the overall open-loop gain
Figure 3.11 Current operational amplifier based on current conveyors
page 54
Chapter 3
Current Conveyors, Implementations and Applications
of the current operational amplifier, where CT is the capacitance associated with the
transimpedance node.
Based on the;block diagram from Fig. 3.11 Kaulberg designed a CMOS current operational
amplifier, which was fabricated in the above mentioned 2.4μtm CMOS technology [22, 23].
With the dc gain approximately 72dB and the gain-bandwidth of 3MHz, while the phase
margin was set to 60°, the performance of this current operational amplifier approaches that of
the voltage operational amplifier described in the last subsection. In addition, the proposed
current operational amplifier exhibits constant gain-bandwidth product characteristics, if it is
being used in a classical negative feedback configuration for operational amplifiers; see
further in Section 5.4, Fig. 5.11. Similarly, to the previously described voltage operational
amplifiers, the current operational amplifier from Fig. 3.11 does not exhibit any slew-rate
limitation due to the feedback current conveyed into the transimpedance node.
D. 'Voltage Feedback' Current Operational Amplifier?
A drawback of the in the last subsection shown current operational amplifier can be its
constant gain bandwidth characteristics, which do not allow to use it in high-gain, highfrequency applications. This drawback can be corrected by a transimpedance current
operational amplifier configuration introduced by Bruun too [24], derived from the current
operational amplifier shown in Fig. 3.11 by pulling out the X-terminal of the CCII at the
output and using it in the feedback loop, like indicated in Fig. 3.12. Kaulberg has done the
same in his design [22,23] and proved the constant bandwidth characteristics of this
configuration given by (3.12), also by measurements of his design in a transimpedance current
amplifier feedback arrangement.
The transimpedance current amplifier can be simplified by omitting its inverting output and
recognizing the outpulled X-terminal as a low-impedance inverting output of the amplifier
[26]. The schematic of the proposed configuration presented in Fig 3.13 remains very much,
and it really is, an adjoint element of the `current feedback' voltage operational amplifier. To
underline that the proposed device was given the name 'voltage feedback' current operational
amplifier.
Figure 3.12 Transimpedance current amplifier
page 55
Chapter 3
Current Conveyors, Implementations and Applications
Figure 3.13 `Voltage feedback' current operational amplifier
Simulations of the `voltage feedback' current operational amplifier shown in Fig. 3.14 were
done on SPICE, using LEVEL 2 model parameters for the 2.4μm CMOS process mentioned
before. The ac characteristics of the circuit in Fig. 3.15 using different closed-loop gain
settings indicates the constant bandwidth characteristics of this configuration.
Figure 3.14
CMOS `voltage feedback' current operational amplifier
page 56
Chapter 3
Current Conveyors, Implementations and Applications
Figure 3.15 Simulated ac characteristics of the `voltage feedback' current operational amplifier
from Fig. 3.14 using different gain settings
E. Gyrator Based on Current Conveyors
A current conveyor implementation of a gyrator derived from the block diagram presented
in [2] and shown in Fig. 3.16 has been designed and fabricated in the 2.4μm CMOS
technology to verify the versatility of these building blocks again [26].
The impedance matrix of a gyrator, which is defined as a positive immitance inverter [27],
is
where R01and R02 are the gyration resistances. Then, if the impedance Z2 is connected to one
terminal of the gyrator, the other terminal exhibits the impedance
This property makes it possible to use the gyrators in filter circuits, where they allow to replace
coils, which are not available in fully integrated systems. To show the skills of the proposed
current conveyor based gyrator implementation the bandpass function was chosen.
The resonance frequency of a bandpass filter exploiting such a gyrator, illustrated in Fig.
3.16, is
page 57
Chapter 3
Current Conveyors, Implementations and Applications
Figure 3.16
Bandpass filter exploiting a gyrator based on current conveyors
and its quality is
where C1, C2, R01, R02, RY1, and RY2 are the components from Fig. 3.16. RY1, and RY2 represent the
parasitic Y-terminal resistances of the current conveyors. The respective sensitivities derived
from (3.19) are
The full schematic of the fabricated gyrator is drawn in Fig. 3.17. The CCII+ has been
described in Fig. 3.5a, the CCII- uses folded cascoded current mirrors to achieve the required
negative X-to-Z-terminal current transfer. By using regulated cascoded current mirrors the Yterminal resistances of the current conveyors RYn, n = 1, 2 are increased and so the quality of
the gyrator is improved. Using the regulated cascode stages also at the place of single stage
voltage followers improves the accuracy of the quiescent current transfer along the whole
gyrator and thus the accuracy of the Y-to-X-terminal voltage transfer of the current conveyors
is improved too.
After a detailed analysis of the final schematic of the gyrator equations (3.19) and (3 20)
have to be corrected to [26J
page 58
Chapter 3
Current Conveyors. Implementations and Applications
Figure 3.17 CMOS implementation of the gyrator based on current conveyors
page 59
Chapter 3
Current Conveyors, Implementations and Applications
and
where
and
where rx1 , rx2 , ry1 , and ry2 are the respective parasitic terminal resistances of the current conveyors
given by their small-signal representations in (2.27) and (2.18), respectively. The denotation for
(3.24) should be obvious from Fig. 2.14. The sensitivities from (3.21) then have to be corrected to
From (3.23) optimal gyration resistances for obtaining the highest possible quality of the
bandpass filter at low frequency can be found
where R0opt =R0lopt =R02opt if rm =rm1 -rm2 and ry =ry1 -ry2.
The measured parasitics of the gyrator are collected in Table 3.2. Fig. 3.18a shows the
measured frequency dependence of the quality of the bandpass filter using three different
gyration resistances. It can be seen that using R0l =-R02 ≈ 80kΩ the best quality at lower
frequency can be achieved, what corresponds to the results obtained by calculations using (3.27).
The quality of the bandpass filter at low frequency exceeded the mathematical prediction from
(3.23), like indicated in Fig. 3.18b,
page 60
Chapter 3
Current Conveyors, Implementations and Applications
Table 3.2
Figure 3.18 Frequency dependence of the quality of the bandpass filter
a) measurements done with three different gyration resistances
b) comparison of the measurements with the mathematical prediction
because of the jump phenomenon reported in [28J, which was observed in this design too.
References
page 61
Chapter 3
Current Conveyors, Implementations and Applications
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
G.C. Temes, W.H. Ki, "Fast CMOS Current Amplifier and Buffer Stage," Electronics
Letters, vol. 23, 1987, pp. 69697.
A. Fabre, M. Alami, "Insensitive Current-Mode Bandpass Implementations- Based
Nonideal Gyrators," IEEE Transactions on Circuits and Systems-I: Fundamental
Theory and Applications, vol. CAS-39, 1992, pp. 152-155.
B. Wilson, "High-Performance Current Conveyor Implementation," Electronics
Letters, vol. 20, 1984, pp. 990-991.
W. Surakampontorn, K. Kumwachara, "CMOS-Based Electronically Tunable Current
Conveyor," Electronics Letters, vol. 28, 1992, pp. 1316-1317.
Th. Laopoulos, S. Siskos, M. Bafleur, Ph. Givelin, "CMOS Current Conveyor,"
Electronis Letters, vol. 28, 1992, pp. 2261-2262.
W. Surakampontorn, V. Riewruja, K. Kumwachara, K. Dejhan, "Accurate CMOSBased Current Conveyors," IEEE Transactions on Instrumentation and Measurement,
vol. IM-40, 1991, pp. 699-702.
E. Bruun, "CMOS High Speed, High Precision Current Conveyor and Current
Feedback Amplifier Structures," International Journal of Electronics, voL 74, 1993,
pp. 93-100.
D.F. Bowers, "A Precision Dual "Current Feedback" Operational Amplifier,"
Proceedings of the IEEE Bipolar Circuits and Technology Meeting, 1988,
Minneapolis, U.S.A., pp. 68-70. [13] D.F. Bowers, "Applying "Current Feedback" to
Voltage Amplifiers," Chapter 16 in Analogue
IC Design: The Current Mode Approach, edited by C. Toumazou, F.1. Lidgey, D.G.
Haigh, Peter Peregrinus Ltd., London, 1990.
E. Bruun, "High Speed, Current Conveyor Based Voltage Mode Operational
Amplifier," Electronics Letters, vol. 28, 1992, pp. 742-744.
I. Mucha, "Fully Differential, Current Conveyor Based CMOS Operational
Amplifier," International Journal of Electronics, vol. 74, 1993, pp. 697-703_
E. Bruun, "Feedback Analysis of Transimpedance Operational Amplifiers," IEEE
Transactions on Circuis and Systems-l: Fundamental Theory and Applications, voL
CAS-40, 1993, pp. 275-278.
P.R Gray, R.G. Meyer, "MOS Operational Amplifier Design - A Tutorial Overview,"
IEEE Journal of Solid-State Circuits, vol. SC-17, 1982, pp. 969-982.
E. Bruun, "A Dual Current Feedback CMOS Op Amp," Proceedings of 10th
NORCHIP Seminar, 1992, pp. A9-A11.
E. Bruun, "CMOS Technology and Current-Feedback Op-Amps," Proceedings of
IEEE International Symposium on Cřrcuřts and Systems, 1993, pp. 1062-1065.
E. Bruun, "Non-Slew Rate Limited CMOS Op-Amp Configurations," Proceedings of
European Conference on Circuits Theory and Design, 1993, Davos, Switzerland, pp.
907-910.
E. Bruun, "A Differential-Input, Differential-Output Current Mode Operational
Amplifier," International Journal of Electronics, vol. 71, 1991, pp. 1047-1056.
T. Kaulberg, "CMOS Current-Mode Operational Amplifier," Proceedings of the 18th
European Solid-State Circuits Conference, 1992, Copenhagen, Denmark, pp. 246249.
T. Kaulberg, "A CMOS Current-Mode Operational Amplifier," IEEE Journal of
Solid-State Circuits, vol. SC-28, 1993, pp. 849-852.
[24] E. Bruun, "Constant-Bandwidth Current Mode Operational Amplifier,"
Electronics Letters, vol. 27, 1991, pp. 1673-1674.
I. Mucha, "`Voltage Feedback' Current Operational Amplifier," Proceedings of the
Electronic Devices and Systems Seminar, Brno, Czech Republic, 1993, pp. 216-219.
I. Mucha, "A CMOS Current Conveyor Based Gyrator," Proceedings of the 11th
European Conference on Circuit Theory and Design, 1993, Davos, Switzerland, pp.
page 62
Chapter 4
High Current Gain Amplifiers
In the previous chapters the current-mode approach to the design of current processing
circuits was given. By the side of different current and voltage processing applications of
current- mode circuits also the basic principle of current-mode amplifiers has been shown. A
common feature of typical current-mode amplifiers is the inherent wide bandwidth but also
the low open- loop gain, typically approaching unity and practically always less then 20dB
[1-6]. This property does not allow to use the current-mode amplifiers with gain-controlling,
negative feedback, and so they require tuning of the gain, if high accuracy is necessary.
The scope of this chapter will be to show high-current-gain amplifiers, which achieve a
gain of typically more then 40dB. Of course, the bandwidth of these amplifiers will be
limited by a high-impedance node, which has to be included into the circuit to be able to
achieve such high gain, but with lowering the gain by a negative-feedback closed loop the
bandwidth of the current amplifier will increase, respectively.
1. High Current Gain Stages
To be able to understand the principle of high-current-gain amplifiers better, a brief
description of the principles of both current-mode amplifiers and high-gain voltage amplifiers
will be given in the following paragraphs.
A. Gain of Current Mode Amplifiers
In Fig. 4.1 the simplest current-mode amplifier based on a Widlar current mirror can be
found. Neglecting for the moment the channel length modulation effect as well as the influence
of parasitic capacitances, its small-signal transfer function is from (2.12)
It is obvious that if a high gain shall be obtained, the transistors Ml and M2 must have very
different sizes so that the division of their aspect ratios gives the high gain. So for example, if
the final current gain shall be Ai = 100 = 40dB, the respective dimensions of the transistors from
Fig. 4.1 a must be WM2= 100 WM1 and LM1 = LM2 , or WM2 = 10 WM1 and LM1 = 10 LM2 if the chip
area shall be minimized. However, if high accuracy of the current gain is required,
page 63
Chapter 4
High Current Gain Amplifiers
Figure 4.1 Simple current-mode amplifier, the Widlar current mirror a) with
scaled dimensions
b) with multiple transistor M2
not the channel width of M2 WM2 must be increased, but a respective number of parallel
transistors with the same channel dimensions must be used, like illustrated in Fig. 4.1b,
where the achieved gain Ai is identical with the number of the used transistors n.
The drawback of the low current gain of current-mode amplifiers is tried to be solved by
high- current-gain amplifiers based on a different principle of current amplification. This
principle will be presented in the next subsections.
B. Gain Stages of voltage Amplifiers
The basic principle of operation of high-gain voltage amplifiers can be explained by means
of the voltage gain stage shown in Fig. 4.2a [7]. The small-signal input voltage connected to
the gain transistor M1 is here converted to the drain current of Ml by the gate
transconductance of Ml
If the drain of M1 is loaded by a high impedance, the load transistor M2, the drain current of
M1 is converted back to voltage
where rt is the resistive part of the impedance of the high-impedance (transimpedance) node T.
The final small-signal voltage gain can then be expressed as
page 64
Chapter 4
High Current Gain Amplifiers
A voltage amplifier often needs a low-impedance output to be able to drive lowimpedance or multiple loads without degrading the gain of the amplifier. Therefore in MOS
technology unity- gain voltage followers, voltage buffers described in Chapter 2 are needed.
In Fig. 4.2a this is accomplished by the buffer transistor M3 connected to the output of the
amplifier by the dashed line and the current source M4, giving an output resistance, which
can be derived from (2.25).
Putting the above described together the block diagram of a one-gain-stage voltage
amplifier in Fig. 4.2b can be drawn. The input voltage Vin is converted to current by a
transconductance stage Gm and this current is converted back to the output voltage by a
transresistance stage R, . The output voltage Vout is buffered to the output by a unity-gain
voltage follower (buffer) VB. The resulting gain is then
where Gm is the transconductance of the transconductance stage Gm and Rt is the resistance of
the transresistance stage Rt of the amplifier. If the input-output voltage transfer of the voltage
buffer is not unity, its gain (attenuation) has to be multiplied to the gain of the high-gain stage
Gm-Rt to obtain the overall gain of the voltage amplifier
where Avb is the input-output transfer function of the voltage buffer VB at the output.
page 65
Chapter 4
High Current Gain Amplifiers
C. High-Gain Stages of Current Amplifiers
Following a scheme similar to the one described in the last subsection, the principles of
the construction of high-gain current amplifiers can be found. The block diagram of a onegain-stage current amplifier is presented in Fig. 4.3a. The input current Iin is first converted
to voltage by a transresistance stage Rt . This voltage is then converted to the output current
Iout by a transconductance stage Gm giving the current gain
If a current buffer is used in order to obtain a low-impedance input, the final current gain is
where Acb is the input-output current transfer function of the input current buffer CB. This
principle was used by Bruun in his first attempt to design a high-gain current
operational amplifier based on current conveyors in 1991 [8]; see also Section 3.3.C. A onegain- stage current amplifier is drawn in Fig. 4.4. The design of Bruun relays on a current-tovoltage conversion across the high, Y-terminal impedance of the current conveyor and a
reverse voltage- to-current conversion across the low, X-terminal impedance of the current
conveyor. The achieved current gain is then
Figure 4.3 Current amplifier
a) block diagram
b) CMOS implementation
page 66
Chapter 4
High Current Gain Amplifiers
Figure 4.4 Current conveyor implementation of a current operational amplifier
This technique of current amplification allowing a gain of more than 40dB for standard
CMOS processes was generalized in 1992 by Zele et.al. in [9]. They showed a current-gain
stage, given in Fig. 4.3b, based on a common-source transistor Ml biased by the constant
current source M2. The small-signal input current iin is here converted to voltage across the high
output resistance of the current source r0
where r0 is usually the function of the drain-source transconductances of the output transistors
of the current source
The contribution of the input of M1 to the conversion can be neglected because of the very high
gate resistances of MOS transistors.
This voltage is then converted back to current via the gate transconductance of the commonsource transistor Ml. By grounding the output terminal the output current
flowing into the ground, is obtained. The final small-signal gain of this current amplifier is then
page 67
Chapter 4
High Current Gain Amplifiers
where the sum of gdsM4 +gdsM5 represents the drain-source transconductances of the output
transistors of the current source mentioned in (4.11), and this is the output conductance of the
current buffer connected to the gain stage by the dashed line in Fig. 4.3b.
The comparisons of (4.5) to (4.7), (4.6) to (4.8), and (4.4) to (4.13) prove that the gains of
both the voltage amplifiers from Fig. 4.2 and current amplifiers from Fig. 4.3 are achieved by
equal mechanisms, and thus the absolute values of these gains are comparable, if not
completely equal.
2. Advanced High Current Gain Stages
In the last section the basic principle of achieving of high-current-gain amplification was
presented. In following paragraphs some proposals of high-current-gain stages offering
enhanced performance will be proposed.
A. Push-Pull Current Gain Stage
The drawback of the current-gain stage in Fig. 4.3a is that the output current flowing in the
direction out of the amplifier is limited by the bias current source transistor M2. This limitation
can be overcome, if the gates of both M 1 and M2 are connected to the input, like in Fig. 4.5a
[7]. This arrangement gives the gain
which is approximately as twice as high than the gain from (4.13).
Figure 4.5
Push-pull current gain stage
a) simple
b) with quiescent current control mechanism
page 68
Chapter 4
High Current Gain Amplifiers
This arrangement is also very often used in digital electronics to complete the inverter
function. In stable state always one of the transistors M 1 or M2 is operated very deeply in the
linear region so that the quiescent current and thus the power consumption of this inverter is
very small. In analog electronics, where both transistors are operated in the saturation region,
the quiescent current of this circuit is not well defined, and more it is very dependent on the
supply voltage and technology parameters. Because of this, additional circuitry to control the
quiescent current of M1 and M2 has to be used.
A mechanism to control the bias current of M1 and M2 was proposed by Babanezhad [10].
This mechanism is implemented for the current gain stage in Fig. 4.5b [11]. Transistors M1
and M2 are the conventional push-pull current gain stage. The devices M6 and M7 split the
high- impedance input node T of the gain stage to two high-impedance nodes T 1 and T2,
which are the inputs to the gates of M 1 and M2, respectively. In this way transistors M6 and
M7 provide a definition for the gate-source voltages of M1 and M2 in the quiescent state
VGSM1 and VGSM2, without affecting the definition of the gain of the current-gain stage, which
remains the same like in (4.14).
B. Differential Current Gain Stages
Differential amplifiers play an important role in voltage processing circuits. It can be
expected, that a similar importance will be given to differential current amplifiers.
A differential-input, differential-output current gain stage was introduced by Arbel and
Goldminz [12]; see Fig. 4.6, called floating current source. In fact it can be seen also as a
fully differential transconductance amplifier, which has been introduced by Huijsing under
the name floating operational amplifier [13, 14]. However, we will use it here as a fully
differential current gain stage.
The stage consists of two complementary, source-coupled, differential transconductance
stages, known and often used as input stages of voltage operational
Figure 4.6
Differential-input, differential-output current gain stage of Arbel and
Goldminz.
page 69
Chapter 4
High Current Gain Amplifiers
amplifiers. Both the inputs and outputs of this current gain stage are connected, respectively.
The input currents from the input current sources IIN+ and IIN not drawn in Fig. 4.6, are
converted to voltages across the output resistances of the current sources. These voltages are
converted back to output currents by the transconductance of this stage with a current gain of
if both input current sources are considered to have equal output resistances r0 . The
output resistance of the differential current-gain stage is
where transistors M11-M13 and M12-M14 are considered to have equal small-signal
parameters. This output resistance can be increased by cascoding the current sources M15
and M16 as well as cascoding the transconductance transistors M11-M14. However, the
second option is associated with additional complications with the voltage levels at the gates
of the cascode transistors and it is not recommended for most applications.
The proposed differential-input, differential-output current gain stage can be also used as
a single-input, differential-output stage if one of its input terminals is grounded. The
resulting current gain is then
The bulk effect of transistors Ml1-M14 is neglected in (4.15), (4.16) and (4.17).
page 70
Chapter 4
High Current Gain Amplifiers
3. Input Current Buffers
As shown in the block diagram of high-current-gain amplifiers in Fig. 4.3a, input current
buffers are needed to obtain a low-impedance input of a current amplifier. Additionally, the
input current buffers set a reference voltage for the input terminal of the current amplifier.
A. Non-Inverting Input Current Buffer
In Fig. 4.7 an input current buffer developed from the voltage follower shown in Fig. 2.14
can be found. Its input resistance is according to (2.27)
If the output of the current buffer is not grounded but it is connected to the high-impedance
input of a current gain stage, for instance from Fig. 4.3a, Fig. 4.5 or Fig. 4.6, the current to
voltage conversion expressed in (4.10) occurs at the output of the current buffer across its output
resistance
which has been roughly described by (4.11).
Figure 4.7 Non-inverting input current buffer
page 71
Chapter 4
High Current Gain Amplifiers
Figure 4.8 Inverting input current buffer
B. Inverting Input Current Buffer
Sometimes the voltage at the output of the input current buffer needs to be inverted. This
can occur, if a differential-input current amplifier is required (see the following chapter). An
example of a current buffer with an inversion of the input signal to the output can be seen in
Fig. 4.8. Both the input and the output resistances of the inverting input current buffer are
equal to the parameters of the non-inverting input current buffer described by (4.18) and
(4.19).
References
[1] G.C. Temes, W.H. Ki, “Fast CMOS Current Amplifier and Buffer Stage,” ElectronicsLetters,
vol. 25, 1987, pp. 696-697.
[2]
Z. Wang, W. Guggenbühl, “Adjustable Bidirectional MOS Current Amplifier,”
Electronics Letters, vol. 25, 1989, pp. 673-675.
[3] E.A.M. Klumperink, E. Seevinck, “MOS Current Gain Cells with Electronically Variable Gain
and Constant Bandwidth,” IEEE Journal of Solid-State Circuits, vol. SC-24, 1989, pp. 14651467.
[4]
Z. Wang, “Wideband Class AB (Push-Pull) Current Amplifier in CMOS Technology,”
Electronics Letters, vol. 26, 1990, pp. 543-545.
(5J E.A.M. Klumperink, H.1. Janssen, “Complementary CMOS Current Gain Cell,” Electronics
Letters, vol. 27, 1991, pp. 38-40.
[6]
E.A.M. Klumperink, “Cascadable CMOS Current Gain Cell with Gain Insensitive Phase
Shift,” Electronics Letters, vol. 29, 1993, pp. 2027-2028.
[7] P.E. Allen, D.R. Holberg, “CMOS Analog Circuit Design,” Holt, Rinehart and Winston, Inc.,
Orlando, U.S.A., 1987.
[8] E. Bruun, “A Differential-Output, Differential-Input Current Mode Operational Amplifier,”
International Journal of Electronics, vol. 71, 1991, pp. 1048-1056.
[9] RH. Zele, S.S. Lee, D.J. Allstot, “A High Gain Current-Mode Operational Amplifier,”
Proceedings of the IEEE International Symposium on Circuits and Systems, 1992, San Diego,
U.S.A., pp. 2852-2855.
page 72
Chapter 4
High Current Gain Amplifiers
[10]
[11]
[12]
[13]
[14]
J.N. Babanezhad, "A Low-Output-Impedance Fully Differential Op Amp with Large Output
Swing and Continuous-Time Common-Mode Feedback," IEEE Journal of Solid-State Circuits,
vol. SC- 26, 1991, pp. 1825-1833.
I. Mucha, "Towards a True Curtent Operational Amplifier," Proceedings of IEEE
International Symposium on Circuits and Systems, 1994, London, U.K., part 5, pp. 389-392.
A.F. Arbel, L. Goldminz, "Output Stage for Current-Mode Feedback Amplifiers, Theory and
Applications," Analog Integrated Circuits and Signal Processing, vol. 4, 1994, 243-255.
J.H. Huijsing, "Operational Floating Amplifier," IEE Proceedings, vol. 137, 1990, Pt. G, pp.
131- 136.
J.H. Huijsing, "Design and Applications of the Operational Floating Amplifier (OFA): The
Most Universal Operational Amplifier," Analog Integrated Circuits and Signal Processing, vol.
4, 1994, pp.115-129.
page 73
Chapter 5
Current Operational Amplifiers
In the last chapter high current gain amplifiers were described. Their gain given by a g„,
/gds ratio of the used transistors (4.13) is not well defined and very dependent on technology
parameters and bias condition of the transistors. Because of this to control the gain of these
amplifiers precisely negative feedback has to be used.
The mostly used high-gain voltage amplifier in voltage processing circuits is the
operational amplifier. It can be expected that a similar high-current-gain device, can be also
called operational amplifier, will be an important element of current processing circuits. To
differ between the two operational amplifiers, the operational amplifier processing voltage
will be called the 'voltage operational amplifier' and its counterpart for current signal
processing will be given the name `current operational amplifier throughout this thesis.
1. Configuration of Current Operational Amplifiers
The voltage operational amplifier is one of the most versatile and so mostly used building
block of analog electronics for voltage signal processing. Their adjoint elements, current
operational amplifiers are considered to be an important supplement of their voltage
processing counterparts. Because of this the aim of the effort of many analog designers is to
find the final configuration of the current operational amplifier being able to act as adjoint
element of voltage operational amplifier in current signal processing circuits interreciprocal
to the well-known voltage processing circuits.
A. voltage Operational Amplifier
Similarly to the last chapter on high-current-gain amplifiers, the reviewing of the
configuration and exploitation of the voltage operational amplifiers in simple applications
will be the starting point for looking for the optimal configuration of the current operational
amplifier.
The basic idea of operational amplifiers is to have a device providing a high differential
gain. This is fully accomplished by voltage operational amplifiers, illustrated in Fig. 5.1a,
having a transfer function
page 74
Chapter 5
Current Operational Amplifiers
Figure 5.1
Voltage operational amplifier:
a) schematic of the device,
b) non-inverting amplifier application,
c) inverting amplifier application.
where Av is the is the open-loop voltage gain of the voltage operational amplifier, ideally
approaching infinity, and Vin+, Vin- and Vout are the voltages at the respective input and output
terminals of the voltage operational amplifier.
If negative feedback is used with the voltage operational amplifier shown in Fig. 5. lb,c, the
voltage gains of the non-inverting and inverting amplifiers are
and
respectively.
B. Differential-Input, Single-Output Current Operational Amplifier
There were already some proposals for the configuration of current operational amplifiers
(or current-mode operational amplifiers). Toumazou and Lidgey proposed in [1] a four-port,
a differential-input, differential-output device and Bruun [2] and Kaulberg [3] showed also
current conveyor based implementations of differential-input, differential-output current
operational amplifiers. However, the voltage operational amplifier is a three-port only and it
can be expected that the current operational amplifier will be a three-port too.
page 75
Chapter 5
Current Operational Amplifiers
Figure 5.2 Current operational amplifier with a differential input and single output:
a) schematic of the device,
b) non-inverting amplifier application,
c) inverting amplifier application.
Zele at.al. reported the realization of the first high-gain current operational amplifier in
CMOS [4]. It was a differential-input, single-output device; see Fig. 5.2a, with the open-loop
transfer function equal to (4.13)
where Ai is the open-loop current gain of the current operational amplifier and ideally
approaches infinity too, and Iin+, Iin- and Iout are the respective input and output currents of the
current operational amplifier. With the negative feedback, the gains of the non-inverting and the
inverting current amplifiers drawn in Fig. 5.2b,c are set to
and
In the inverting configuration; see Fig. 5.2b, the performance of the differential-input,
single- output current operational amplifier is fully identical to the performance of the voltage
operational amplifier, whereas in the non-inverting configuration; see Fig. 5.2c, a number of
dissimilarities can be found. The different definitions of the closed-loop gains of these two
devices have already been shown in (5.2) and (5.5). Further, the impedance of the input
terminals of the current operational amplifier has an influence on the accuracy of the current
transfer and therefore special, very-low-input-impedance current buffers have to be used in
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Chapter 5
Current Operational Amplifiers
this configuration [4, 5]. Finally, the offset resulting from mismatching of the current transfer
from the non-inverting and the inverting input terminal to the current subtraction node is
amplified by the factor of the open-loop gain of the current operational amplifier and can not
be reduced by the negative feedback loop. From the application point of view, this current
operational amplifier configuration does not seem to be the adjoint element of the voltage
operational amplifier.
C. Single-Input, Differential-Output Current Operational Amplifier
Analyzing the latter described knowledge and strictly considering the adjoint network
theorem [6, 7] the conclusion must be accepted that the current operational amplifier as the
adjoint element of the voltage operational amplifier must be a single-input, differential-output
device [8]. Its block schematic can ben found in Fig. 5.3 a and its transfer function is
Applying negative feedback the closed-loop current gains of the non-inverting and inverting
current amplifiers illustrated in Fig. 5.3b,c are
and
Figure 5.3
Current operational amplifier with a single input and differential output:
a) schematic of the device,
b) non-inverting amplifier application,
c) inverting amplifier application.
page 77
Chapter 5
Current Operational Amplifiers
Although the open-loop transfer function of the single-input, differential-output current
operational amplifier given in (5.7) differs from the open-loop transfer function of the voltage
operational amplifier from (5.1), both the resistive networks of the accurate current amplifiers
in Fig. 5.3b,c and their gain definitions in (5.8) and (5.9) are completely identical with the
networks and gain definitions of the respective voltage amplifiers given in Fig. 5.lb,c and
(5.1), (5.2). From this point, the single-input, differential-output current operational amplifier
will be considered the adjoint element of the voltage operational amplifier and if not else, the
term current operational amplifier will denote this configuration of this current operational
amplifier configuration.
2. Parameters of Current Operational Amplifiers
A. Basic Architecture and Design
Following the block diagram of a high-current-gain amplifier shown in Fig. 4.3a and
using the cells shown in Fig. 4.6 and Fig. 4.7a the block diagram and the basic CMOS
implementation of a one-gain-stage, single-input, differential-output current operational
amplifier shown in Fig. 5.4 can be constructed. With neglected bulk effect the lowfrequency, open-loop gain of the current operational amplifier is
Like the one-gain-stage voltage operational amplifier this current operational amplifier
architecture includes a single high-impedance (transimpedance) node T responsible for the
dominant pole of the open-loop transfer function
where CT is the capacitance associated with this node and can be used for compensation of the
current operational amplifier to maintain a safe phase margin while using it with negative
feedback. The gain-bandwidth product of the proposed current operational amplifier is then
page 78
Chapter 5
Current Operational Amplifiers
Figure 5.4
Current opamp
a) block diagram
b) CMOS implementation
If well compensated, the unity gain-bandwidth of the current operational amplifier equals to
the gain-bandwidth product
The basic strategy of the design of the current operational amplifier becomes now similar
to the design of a conventional one-gain-stage voltage operational amplifier described
extensively in [9, l0]. In the case of a two-gain-stage current operational amplifier the Miller
capacitance, interconnecting the two high-impedance nodes of the two high-gain stages,
becomes the parameter to set for the compensation.
Fig. 5.5 shows the Bode plot of the current operational amplifier in Fig. 5.4b obtained from
simulations on SPICE using LEVEL 2 transistor models with parameters for a typical
commercially available 2.4μm CMOS process. The input terminal of the current operational
amplifier loaded by the capacitance l0pF was the first nondominant pole limiting the unitygain bandwidth of the current operational amplifier. With the low-frequency, open-loop gain
of 60dB and gain-bandwidth
page 79
Chapter 5
Current Operational Amplifiers
Figure 5.5
Bode plot of the current opamp in Fig. 5.4b
product of 2.1MHz the same parameters were obtained, as for a similar voltage operational
amplifier. The phase margin was set to 75° by the compensation capacitance connected
between the high-impedance node T and the negative supply voltage.
B. Second Order Parameters
A comparison of the most important parameters of the conventional voltage operational
amplifier and the proposed current operational amplifier is given in Table 5.1.
Table 5.1
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Chapter 5
Current Operational Amplifiers
Fig. 5.6
Transient response of the current opamp in Fig. 5.4b in a unity-gai
configuration
Slew-Rate
In Fig. 5.4b it can be seen, that the current available to charge and discharge the
compensation capacitance CT of the current operational amplifier is not limited by any
constant current source, like with conventional voltage operational amplifiers exploiting the
source (emitter) connected differential transistor pair, but it is obtained from its input
terminal. Therefore the current operational amplifier behaves as a current-feedback
operational amplifier [11] and is not slew-rate limited. Using a single-pole model of the
current operational amplifier, (5.10) and (5.11), the response of the amplifier exploiting the
proposed current operational amplifier on a step function at its input can be described as
where I(0) and I(t) are the output currents at the time 0 and t, Ai is the gain, ISt the step size at
the input, and f-3dB is the -3dB frequency of the current amplifier.
The simulated response of a unity-gain current amplifier exploiting the proposed current
operational amplifier on an input current step is displayed in Fig. 5.6. The settling time,
considering the accuracy of 9S°/a to the final settled value, is less then 180ns, which
corresponds to the result obtained from calculations using (5.14).
Input and Output Current Range
The input current range ICR of the current operational amplifier is limited by the range,
where the circuit works properly. This range is set by the available voltage range at the highimpedance node T. In the case of the current operational amplifier in Fig. 5.4b the input
current range is limited to
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Chapter 5
Current Operational Amplifiers
The output current range OCR of the proposed current operational amplifier is limited by
the current sources M15, M16,
Power Supply Rejection Ratio
The power supply rejection ratio describes the influence of either the positive or negative
power supply onto the output variable, current. For the current operational amplifier it can be
defined as
and its unit is Ω. Neglecting higher order poles and zeroes the final expressions of the power
supply rejection ratios for the proposed basic current operational amplifier architecture are
Figure 5.7 Simulated power supply rejection ratio of the current opamp in Fig. 5.4b
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Chapter 5
Current Operational Amplifiers
where CT+ and CT- are the capacitances of the high-impedance node T related to the positive
and negative supply voltages, respectively.
In Fig. 5.7 the plots of both the positive and the negative power supply rejection ratios are
shown. The compensation capacitance CT is connected to the negative supply voltage and so
the dominant pole of the PSRR- is placed much lower then the pole of the PSRR+ .
Generally, the power supply rejection ratio of current amplifiers will be always related to
the output conductances of current sources feeding currents into the high-impedance
(transimpedance) nodes of the current operational amplifiers. This inference emphasizes the
necessity to design current operational amplifiers with very high transimpedance stages rt =
1/(gdsM7 +gdsM8), instead of trying to increase the gain by high transconductances (5.10). This
design technique requires also smaller compensation capacitances (5.11).
Common Mode Rejection Ratio
The low-frequency common mode gain of the current operational amplifier in Fig. 5.4b is
[12, 13]
Thus, the common mode rejection ratio is
DC Offset
The DC current offset of the current operational amplifier consists of two components, the
output offset and the input offset. Their definition and meaning are obvious from Fig. 5.8.
The output offset is a parameter of the mismatching of the drain currents of the current
sources M15 and M16 in Fig. 5.4b and it is comparable to the input voltage offset of the
differential-input transconductance stage of a voltage operational amplifier. This offset current
can not be reduced by the negative feedback and introduces a large-signal output error in the
performance of the current operational amplifier.
The input offset is determined by the size of the input current, which is necessary to drive
the output transconductance stage, so that the difference of the currents of
page 83
Chapter 5
Current Operational Amplifiers
Figure 5.8
Definition of the offset currents of the current opamp
the non-inverting and the inverting outputs is zero. The influence of the input offset is reduced
by negative feedback.
Considering the two sources of offset the output current of the current operational amplifier
becomes
Input Reference Voltage
The input reference voltage is set by the input current buffer. Usually it is a voltage right in
the middle between the supply voltages VDD and VSS . However, for some applications special
input reference voltage requirements are possible.
During the performance of the current operational amplifier the input reference voltage
may differ from the value VREF set by the input current buffer. This difference will occur
because of the input-output offset of the reference voltage of the voltage follower of the input
current buffer VOFF,ICB and the non-zero input resistance of the input current buffer, its smallsignal value has been calculated in (4.18). The voltage at the input terminal of the current
operational amplifier can be expressed as
Noise
The noise performance of the a current operational amplifier can be modeled by the inputreferred, mean-square current-noise source. The influence of the noise sources placed at the
input stage, namely transistors M17, M18, and M1-M4, can be neglected, because the noise
resulting from these noise sources appears only as a
page 84
Chapter 5
Current Operational Amplifiers
voltage at the input terminal of the current operational amplifier and drain current of both M3
and M4, which is canceled finally after the current mirror MS-M7. On the contrary, the currentnoise sources defined by (A.11) referred to the current mirror MS-M8 sum to the input-referred
noise
In terms of equivalent input-mean-square voltage noise (A.12) the equivalent input noise can
be expressed as
3. Experimental results
To prove the above described theory samples of both the differential-input, single-output
and single-input, differential-output current operational amplifiers were implemented in a
commercially not available 5μm, p-well, CMOS test technology of the Institute for
Telecommunication Technique in Prague. Because the fabricated chips have not been
packaged and the measurements were performed by the Department of Microelectronics of
the Czech Technical University in Prague, only simulation results will be presented in this
thesis.
A. Differential-_Input, Single-Output Current Operational Amplifier
Although this configuration of the current operational amplifier was not recognized as the
adjoint element of the voltage operational amplifier, we decided to consider this
configuration for fabrication too, to be able to compare its basic parameters to the parameters
of a voltage operational amplifier and the single-input, differential-output current operational
amplifier.
The final schematic of the proposed differential-input, single-output current operational
amplifier is shown in Fig. 5.9 [8]. Transistors M1-M10 ensure the bias conditions for the
whole circuit. M11-16 build the inputs of both the non-inverting and the inverting input
current buffer. They define the reference voltage VREF for the input terminals as well as their
low input impedances. The folded cascode current mirrors M17-M20 establish the current
transfer from the inverting input, and cascoded current mirrors M21-M26 transfer the current
from the non- inverting input, both into summing high-impedance nodes. Devices M27, M28
are the node splitting mechanism shown in Fig. 4.5b and together with the voltage level
shifters M29-M32 they set the conditions of the quiescent current of the current-gain stage
M33-M36 at the output of the differential-input, single-output current operational amplifier.
page 85
Chapter 5
Current Operational Amplifiers
Figure 5.9
Schematic of the differential-input, single-output current operational amplifier
considered for fabrication
page 86
Chapter 5
Current Operational Amplifiers
Figure 5.10
Schematic of the single-input, differential-output current operational
amplifier considered for fabrication
page 87
Chapter 5
Current Operational Amplifiers
B. Single-Input, Differential-Output Current Operational Amplifier
The schematic of the fabricated single-input, differential-output current operational
amplifier is shown in Fig. 5.10. Similarly to the previously described version of the current
operational amplifier the devices M 1-M8 set the bias conditions of the whole circuit and M9M 12 define both the reference voltage VREF and the impedance at the input terminal of the
current operational amplifier. Transistors M13-M18 mirror the input current into the highimpedance node, the input of the differential current-gain stage consisting of M23-M30
shown already in Fig. 4.6 and voltage level shifters M23, M24 and M35, M36 which increase
the voltage range available at the outputs of the current operational amplifier.
C. Simulation Results
Both current operational amplifiers were designed to operate with l0V supply voltage and
a quiescent supply current of 1mA and 2mA., respectively. The phase margins of both
operational amplifiers were set to 60°.
The expected parameters of the two proposed current operational amplifiers obtained by
simulations on PSPICE using LEVEL 3 transistor model parameters supplied by the
manufacturer are collected in Table 5.2. With the gain of approximately 70dB and the unitygain bandwidth more than 4MHz the basic parameters are the same as the parameters of a
similar voltage operational amplifier. The transient response of neither of the current
operational amplifiers was slew-rate limited, if a ±l0μA step function was applied at the input
of a current amplifier in a unity-gain configuration using the two designed current operational
amplifiers.
Table 5 2
page 88
Chapter 5
Current Operational Amplifiers
D. Advantages and Drawbacks of the Proposed
Current Operational Amplifiers
From both the open-loop gain and the unity-gain bandwidth of the current operational
amplifiers it is obvious that the basic parameters of voltage and current operational amplifiers
do not differ at all. Therefore it can be expected that current signal processing applications
and voltage processing applications interreciprocal to each other will have the same or
similar accuracy and frequency properties too.
A general advantage of the current operational amplifiers is their transient response,
which is not slew-rate limited. Because of thisproperty, current operational amplifiers are
perfectly suited for fast noncontinuous time signal processing circuits, similar to switched
capacitor circuits with voltage operational amplifiers.
A relative drawback of the proposed current operational amplifiers is their high supply
voltage requirement. However, these operational amplifiers were not designed for lowvoltage applications. The power consumption of the proposed current operational amplifiers
is also quite high. More the power consumption of the adjoint element to the voltage
operational amplifier, the single-input, differential-output current operational amplifier is
directly dependent on the output current range, since the output current can not be higher
than the current of the constant current sources biasing the differential current-gain stage.
A further drawback of the differential-input, single-output current operational amplifier is
the input offset defined as the difference of the input currents which is necessary to ensure a
zero output current. In the non-inverting current amplifier shown in Fig. 5.2b this input offset
is not lowered by the negative feedback but it is amplified by the open-loop gain of the
current operational amplifier to the output of the amplifier and causes that the output current
often clamps to one end of the output current range. The input offset of the fabricated
differential- input, single-output current operational amplifier was approximately 2-3μA and
it was not possible to measure this current operational amplifier in the non-inverting
configuration.
In a similar manner also the input impedance of the differential-input, single-output
current operational amplifier is not lowered by the negative feedback, and it has to be added
to the feedback resistance R2 and the gain definition in (5.5) becomes inaccurate in this way.
A solution of these two problems of differential-input current amplifiers could bring a
common-mode balancing mechanism of the differential inputs, similar to the mechanism used
to balance the outputs of differential-output voltage operational amplifiers [10, 14].
4. Exploitation of Current Operational Amplifiers
As mentioned earlier, current operational amplifiers are considered to be used in current
signal processing circuits interreciprocal to voltage processing circuits with voltage operational
amplifiers. They can be also used in some circuit components
page 89
Chapter 5
Current Operational Amplifiers
which substitute passive components, which are usually not available in standard MOS
technologies, for instance a gyrator is commonly used to substitute an inductance.
A. Accurate Current Amplifiers
Since the accurate current amplifiers using current operational amplifiers have been
already used as means for finding the adjoint element to the voltage operational amplifiers
and so described earlier in this chapter, their performance will be only briefly repeated here.
In Fig. 5.3 accurate current amplifiers based on single-input, differential-output current
operational amplifiers are shown. In Fig. 5.11 the same amplifiers are compared to voltage
amplifiers based on voltage operational amplifiers. To emphasis the interreciprocity of these
circuits the current amplifiers are mirrored horizontally, their inputs are at the right side and
their outputs at the left hand side. It can be clearly seen now that the same resistive network
is used in both the voltage and current amplifiers and all conditions of the adjoint network
theorem [6, 7] are fulfilled. In addition, the gain definitions of the amplifiers given by (5.2),
(5.3) and (5.8), (5.9) equal too.
Figure 5.11
Accurate amplifiers based on voltage and current operational amplifiers
a) non-inverting
b) inverting
page 90
Chapter 5
Current Operational Amplifiers
B. Current Filters
The network applied around the current operational amplifiers can generally include any
kind of impedance. So active current filters, derived originally as voltage filters using
voltage operational amplifiers, can be built using the single-input, differential-output current
operational amplifiers. Fig. 5.12a showes continuous-time lowpass filters for both voltage
and current signal processing. Their transfer functions of the two filters are
and
respectively.
The adjointnetwork theorem is not valid for continuous-time signal processing
circuits only, and the current operational amplifier can be used in switched circuits too. This
is proven by the switched-capacitor lowpass filter illustrated in Fig. 5.12b. Although the term
`switched capacitor' is usually not used with current signal
Figure 5.12
Low pass filters
a) continuous time
b) switched capacitor
page 91
Chapter 5
Current Operational Amplifiers
processing, it will be used here to indicate current signal processing circuits interreciprocal to
the voltage processing switched capacitor circuits. The output voltage of the voltage filter in
Fig. 5.12b is [15]
giving the transfer function
after taking the z-transform. In the same way the output current of the switched capacitor
current filter is
and after taking the z-transform the transfer function is
page 92
Chapter S
Current Operational Amplifiers
Figure 5.13 Instrumentation amplifier for
a) voltage signal processing
b) current signal processing
C. Instrumentation Amplifier
In instrumentation applications often floating electrical variables have to be handled. This is
done using fully differential amplifiers like the voltage instrumentation amplifier, that can be
found in Fig. 5.13a. The output voltages of the amplifier are
The same definition of the output currents,
exhibits the instrumentation amplifier for current signal processing in Fig. 5.13b.
page 93
Chapter 5
Current Operational Amplifiers
Figure 5.14
Gyrator built of
a) voltage operational amplifiers
b) current operational amplifiers
D. Gyrator
The last example of exploitation of current operational amplifiers is a gyrator built of three
operational amplifiers, like illustrated in Fig. 5.14. Either voltage or current operational
amplifiers can be used to build this gyrator and its parameters will remain equal if the
parameters of both the voltage operational amplifiers and the current operational amplifiers
are equal too. Of course, both gyrators based on voltage operational amplifiers; drawn in Fig.
5.14a, as well as current operational amplifiers; drawn in Fig. 5.14b, can be used in filtering
in both voltage and current signal processing.
1.
2.
C. Toumazou, F.J. Lidgey, "Universal Current-Mode Analogue Amplifiers," Chapter 4
in Analogue IC Design: The Current-Mode Approach, edited by C. Toumazou, F.J.
Lidgey, D.G. Haigh, Peter Peregrinus Ltd., London, 1990.
E. Bruun, "A Differential-Output, Differential-Input Current Mode Operational
Amplifier," International Journal of Electronics, vol. 71, 1991, pp. 1048-1056.
page 94
Chapter 5
Current Operational Amplifiers
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
T. Kaulberg, "A CMOS Current-Mode Operational Amplifier," IEEE Journal of
Solid-State Circuits, vol. SC-28, 1993, pp. 849-852.
R.H. Zele, S.S. Lee, D.J. Allstot, "A High Gain Current-Mode Operational
Amplifier," Proceedings of the IEEE International Symposium on Circuits and
Systems, 1992, San Diego, U.S.A., pp. 2852-2855.
I. Mucha, "Thousand and One Improvements on Current Operational Amplifiers,"
Proceedings of IEEE International Symposium on Circuits and Systems, 1994,
London, U.K., part 5, pp. 533-536.
S.W. Director, R.A. Rohrer, "The Generalized Adjoint Network and Network
Sensitivities," IEEE Transactions on Circuit Theory, vol. CT. 16, 1969, pp. 318-323.
G.W. Roberts, A.S. Sedra, "All Current-Mode Frequency Selective Circuits,"
Electronics Letters, vol. 25, 1989, pp. 759-761.
I. Mucha, "Towards a True Current Operational Amplifier," Proceedings of IEEE
International Symposium on Circuits and Systems, 1994, London, U.K., part 5, pp.
389-392.
P.E. Allen, D.R. Holberg, "CMOS Analog Circuit Design," Holt, Rinehart and
Winston, Inc., Orlando, U.S.A., 1987.
P.R. Gray, R.G. Meyer, "MOS Operational Amplifier Design - A Tutorial
Overview," IEEE Journal of Solid-State Circuits, vol. SC-17, 1982, pp. 969-982.
D.F. Bowers, "A Precision Dual "Current Feedback" Operational Amplifier,"
Proceedings of the IEEEBipolar Circuits and TechnologyMeeting, 1988,
Minneapolis, U.S.A., pp. 68-70.
E. Bruun, "Design Considerations For a High Speed CMOS Current Operational
Amplifier,"Proceedings of the NORCHIP Seminar, 1993, Trontheim, Norway, pp.
24-31.
E. Bruun, "A High-Speed CMOS Current operational amplifier for Very Low
Supply Voltage Operation," Proceedings of IEEE International Symposium on
Circuits and Systems, 1994, London, U.K., part 5, pp. 509-512.
M. Banu, J.M. Khoury, Y. Tsividis, "Fully Differential Operational Amplifiers with
Accurate Output Balancing," IEEE Journal of Solid-State Circuits, vol. SC-23, 1988,
pp. 1410 1414.
F. Maloberti, "Switched Capacitor Filters," notes from the EUROCHIP course on
Advanced Analog Digital Design, Leuven, 1992.
page 95
Chapter 6
High Performance
Current Operational Amplifiers
In the last chapter the design and the first and second order parameters of current
operational amplifiers have been described. Here the single-input, differential-output device
has been recognized the adjoint element of the differential-input, single-output voltage
operational amplifier. Nevertheless, in voltage processing circuits also fully differential
voltage operational amplifiers are used to obtain a better power-supply rejection and increase
the dynamic range of the circuits [1]. In this chapter both single-input, differential-output and
fully-differential current operational amplifiers will be considered.
At first the attention will be given to the input stage and some possibilities of lowering
their input impedances will be shown. Similarly, improvements made to the differentialoutput current- gain stage will be presented to achieve both multiple-outputs and high voltage
swings available at the output terminals of the current operational amplifier. In the second
section of this chapter some design techniques for current operational amplifiers towards high
frequency, low supply voltage, and low power consumption will be illustrated. The chapter
will conclude with an example of the design of a multiple-output, low-power current
operational amplifier, which has been designed for fabrication.
1. Low Impedance Input Current Buffers
In some applications of current operational amplifiers, usually if no negative feedback is
applied to one of its input terminals, very-low-input-impedance input current buffers are
required. In this case the impedance of the order of magnitude of some hundreds ohms
through kiloohms obtained using transistors in a common-base configuration at the input is
not sufficiently low. In the following subsections some possibilities of lowering the input
impedance of input current buffers will be shown. The improvements will be based on the
improvements of voltage followers presented in Section 2.3.
A. General Remarks on Low-Impedance Input Current Buffers
In Section 3.2 it has been shown how to lower the X-terminal impedance of current
conveyors. Well, the X-terminal of the current conveyor performs both the output of the voltage
follower as well as the input of the current follower of the current conveyor. Here the idea of
using very-low-output-impedance voltage followers from Chapter 2 was presented.
page 96
Chapter 6
High Performance Current Operational Amplifiers
Certainly, this idea can be used to the input stages of current operational amplifiers too. The
proposals presented in the next paragraphs will refer to the previously in this thesis shown
very-low-output-impedance voltage followers.
B. Very-Low-Input-Impedance Current Followers Utilizing
Voltage Operational Amplifiers
A current follower exhibiting a very low input impedance (2.31)
where routOL and Av are the open-loop output resistance and gain of the voltage operational
amplifier, respectively, has been shown in Fig. 3.3. Utilizing the voltage follower from Fig.
2.16 the input current buffer drawn in Fig. 6.1 can be designed. Its input impedance is (2.32)
where Av1 and Av2 are the open-loop gains of the respective operational amplifiers. Although
the latter mentioned low-input-impedance current buffers will probably
not find applications in real current processing circuits they give a good theoretical basis for the
design of useful low-input-impedance current buffers.
Figure 6.1
Input current buffer utilizing voltage operational amplifiers derived from the
voltage buffer from Fig. 2.16.
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Chapter 6
High Performance Current Operational Amplifiers
Figure 6.2
Input current buffer based on a unity-gain `voltage feedback' current
operational amplifier
C. ' Voltage Feedback' Current Operational Amplifier in a
Unity-Gain Arrangement
The idea of using and operational amplifier in a unity-gain arrangement the obtain a verylow- input-impedance current buffer can be draught also to the current processing counterparts
of voltage operational amplifiers. As an example a `voltage feedback' current operational
amplifier [3] can serve. Using it in a unity-gain arrangement like illustrated in Fig. 6.2 [2]
results in a current buffer with a very low input impedance of the size of
Similarly, arbitrary current operational amplifier can be used at the place of the `voltage
feedback' current operational amplifier.
D. Input Current Buffer Exploiting Current Gain
That the current amplifier utilized to obtain a very-low-input-impedance current buffer does
not need to be an operational amplifier proves the input current buffer
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Chapter 6
High Performance Current Operational Amplifiers
Figure 6.3
Input current buffer exploiting current gain
drawn in Fig. 6.3, which corresponds to the voltage follower from Fig. 2.18 [2]. The very low
input resistance of this current buffer is achieved by amplifying the input current flowing
through the channels of M3 and M4 and feeding the amplified current back to the input
terminal by M11 and M12. Since the major portion of the input current of the current buffer
flows through M11 and M12, by adding M13 and M14 the input current can be copied to the
output of the current buffer. The resulting input impedance of this current buffer is according
to (2.33) and (2.34)
where CT1 and CT2 are capacitances associated with the high-impedance nodes T 1 and T2,
respectively.
E. Compensated Low-Input-Impedance Current Buffer
Similarly to the very-low-output-impedance voltage follower from Fig. 2.19 the current
follower in Fig. 6.4 exploits a compensation technique to obtain the very-low-input-impedance
page 99
Chapter 6
High Performance Current Operational Amplifiers
Figure 6.4 Compensated low input impedance current buffer
expressed by (2.35) and (2.36), where M is the gain of the current mirror M13-M16. The input
current sensed by M13, M14 is mirrored to the output of the current follower by M I 7, M 18.
2. Improvements on the Differential-Output
Current Gain Stage
The basic fully differential current-gain stage from Fig. 4.1 suffers of two significant
drawbacks; the limited voltage range available at the output terminals and the lack of
cascoding possibilities of the output transistors to increase the output resistance of the stage.
Due to this very high resistances can not be driven by this stage. In addition, to be able to
supply more input terminals by the same output current multiple output terminals should be
available [4, 5]. These drawbacks will be tried to solve in the following lines.
A. Simple, Multiple-Output Current Gain Stage
To be able to supply multiple current-input terminals the basic current-gain stage can be
simply multiplied to as many branches as necessary, like indicated in Fig. 6.5 [6]. The accuracy
of the output currents from the unique output terminals depends on the matching properties of
the transistors in the branches Mla,b,c,...-M3a,b,c,... and M2a,b,c,...M4a,b,c... . The advantage of
this circuit is its simplicity.
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Chapter 6
High Performance Current Operational Amplifiers
Figure 6.5
Simple multiple output current gain stage
B. Multiple Output Current Gain Stage with a
Rail-to-Rail Voltage Swing
The voltage range available at the output terminals of the basic fully differential currentgain stage can be improved by inserting of voltage shifting stages between the gates of the
transconductance transistors; like done in the design in Fig. 5.10 [7]. Although this solution
increases the available voltage ranges it does not extend them to a rail-to-rail performance.
This can be achieved by disconnecting the drains of transistors M1-M4 and connecting them
cross
coupled to current mirrors M7-M10 mirroring the drain currents of the
transconductance transistors to the output terminals, like shown in Fig. 6.6. In such a way
both multiple outputs and any kind of cascoding of the output transistors are possible. The
mismatching of the current mirrors M7-M7a,b,c... through M10-M10a,b,c,... determines the
mismatching of the output currents.
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Figure 6.6
Multiple output current gain stage with a rail-to-rail voltage swing
3. Design of High-Performance Current Operational
Amplifiers
For different applications of the current operational amplifier miscellaneous design
techniques are necessary. Large VLSI systems delimit usually only a small area for analog
functions and so low area designs are often needed to fit into the given area. The scaling down
of device sizes followed by a respective scaling of the supply voltage requires low-voltage
building blocks. The rising need for portable, battery driven equipment sets again the
limitation on power consumption. The using of low-power analog circuits is here the
condition for long time operation of the battery driven equipment. Finally, also the highfrequency behavior is very important for modulated audio applications and video applications
requiring high bandwidth capabilities. All these considerations will be followed in the next
paragraphs.
A. Low Area Designs
The main area of application of current operational amplifiers will be certainly in VLSI
systems, where especially because of their high transient-response capability as well as
unconventionally defined power supply rejection ratio they will be preferable in use together
with digital functions on a single chip.
In the case of VLSI systems often only a strictly determined performance is required,
where some parts of the basic architecture of the current operational amplifiers may be
omitted to save area on chip. Examples of such up-to-the-necessity
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Chapter 6
High Performance Current Operational Amplifiers
Figure 6.7
Low area current operational amplifiers with
a) large voltage swing at the non-inverting output
b) large voltage swing at the inverting output
restricted cascoded current operational amplifiers are shown in Fig. 6.7 [8]. Both amplifiers
provide only a unidirectional input-output current transfer.
The input device of the current operational amplifier from Fig. 6.7a, transistor M1a defines
by its gate-source voltage VGSM1a the reference voltage VREF at the input terminal of the current
operational amplifier, where
is the input resistance of this terminal. The current operational amplifier in Fig. 6.7b uses M3b
as the input device and the respective input resistance is
Neglecting higher order poles and zeroes and the bulk effect the open-loop gain of both
presented current operational amplifiers is
The dashed lined in Fig. 6.7 indicate the unity-gain feedback loops of the current operational
amplifiers.
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High Performance Current Operational Amplifiers
Figure 6.8
Current operational amplifier used by Bruun for studying the
optimization towards high frequency [9]
B. Design Towards High-Frequency
Considerations for the design of high-speed current operational amplifiers in the CMOS
technology were extensively presented by Bruun in (9]. For any high-frequency amplifier a
single dominant pole design has to be implemented. In order to be able to calculate the highest
possible frequency to be transferred by the amplifier the first higher order pole needs to be
identifiable. Here the design of the layout plays an important rule, were the junction
capacitances of diffusion areas belonging to nodes associated with the first higher order poles
must be as low as possible. This requires also special design considerations for these diffusion
areas.
For purpose of studying the laws of high-frequency designs the current operational
amplifier in Fig. 6.8 [9] was used. The circuit designed for operation at a supply voltage of
3V and a supply current of 25μA was simulated in a commercially available 2μm CMOS
process. The resulting open-loop, differential gain of the current operational amplifier was
94dB and the gain- bandwidth product 128MHz. The extremely wide bandwidth was achieved
by the optimization of the design described below.
In the design the channel widths of p-channel transistors were made three times wider then
the channel widths of n-channel devices to approach the parameters of the two counterparts.
Taking this consideration into account the most significant capacitances influencing the
position of the dominant pole associated with the transimpedance node T
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High Performance Current Operational Amplifiers
afe (CGDM21 + CGSM22) / 2, CBDM15 , CGDM15 , CGDM21 and CBDM19 . While the gate-source
capacitances can not be reduced by a careful layout design, the diffusion- substrate/well
junction capacitances can. For instance, using a finger structure for the gates of respective
transistors reduces these capacitances by the factor of 2 approximately [10]. Bruun proved
that the dominant pole of the current operational amplifier responsible for the bandwidth can
be increased by the factor of 1.5 with a careful layout design.
If the current operational amplifier is an on-chip device without connection to the
input/output pins and thus without parasitic bonding capacitances the first nondominant pole
is assumed to be caused by the p-channel current mirror M13-M16 positioned at the input
node I of the current mirror
Here the layout dependent capacitances are CBDM13 and CBDM1 , where CBDM13 is
usually the dominant one. Using the finger structure for the respective transistors increases
the bandwidth of the current mirror by the factor of circa 1.25.
The above described optimization using a finger-structure geometry for transistors results
in a first nondominant pole at a lower frequency than the gain-bandwidth product of the
current operational amplifier. This leads to an unacceptable phase margin and even
instability if the operational amplifier is connected in a low-gain configuration. The logical
improvement here is to lower the dominant pole of the current operational amplifier by
adding a compensation capacitor to the high-impedance node T. A more sophisticated
method is to reduce the gain of the current mirrors M13-M20 resulting in increasing of the
resistive part of the impedance at node T and thus lowering the position of the dominant
pole. In addition by reducing CGSM16 the first nondominant pole is moved slightly upwards.
Bruun showed that the optimal gain of the current mirror for achieving the highest possible
speed parameters is approximately 0.3 for a typical CMOS process [9].
Further optimization of the frequency properties of the current operational amplifier can
be made by optimizing the quiescent current densities in transistors in paths critical for the
speed.
C. Low-voltage Current Operational Amplifier
With their range of the processed signal not directly dependent on the size of the supply
voltage current operational amplifiers are well suited for circuits where the supply voltage is
considered to be scaled down. However, the minimal supply voltage that can be applied to
the previously described current operational amplifiers is limited by the threshold voltages
VT of MOS transistors in the used technology, which are for
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Chapter 6
High Performance Current Operational Amplifiers
Figure 6.9
Example of a low voltage current operational amplifier design
most CMOS technologies in the range of 0.8-1.2V. Although in the previously described design
Bruun used the supply voltage of 3 V [9] it can be expected that the nature limit for the supply
voltage will be 1.5V for the given VTs . That corresponds also to the requirements of singlebattery driven electronic equipment.
The basic architecture of the current operational amplifier from Fig. 5.4b sets the limit for
low-voltage performance at two places. Transistors M3-M6 establish a chain of two threshold
and two saturation voltages included in
Another limitation are transistors M11-M16 setting the minimal value for the supply voltage to
If VGSM13 = VGSM11 and VGSM14 = VGSM12 what allows to reduce the supply voltage to 3V only.
An improvement of both (6.11) and (6.12) can be achieved by omitting M4, M11 and M13
from Fig. 5.4b and using a folded cascode current mirror leaving the circuit of the current
operational amplifier illustrated in Fig. 6.9. The minimal supply voltage is here limited to
or
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Chapter 6
High Performance Current Operational Amplifiers
Figure
6.10 Low voltage current operational amplifier of Bruun [ 11 ]
A similar low-voltage current operational amplifier, shown in Fig. 6.10, has been designed
by Bruun [11]. Although the minimal supply voltage given by (6.13) is increased by VDSM7
(sat.) the fabricated circuit has been and proven to operate under the estimated supply voltage
of 1.5V.
D. Approaching Low-Power
In the last section low-voltage current operational amplifier architectures suitable for
battery driven electronic circuits were shown. However, to ensure a long-term operation of
battery driven circuits their quiescent power consumption must be as low as possible. In the
above shown current operational amplifiers this requirement stands in conflict with the need
for a certain, relatively large signal range. This is mainly due to the differential current-gain
stage, which limits the output current range of the current operational amplifier to the size of
bias current of the current-gain stage.
A similar problem has already occurred with the voltage operational amplifiers, where a
constant current source biasing the source-coupled, differential-input transistor pair caused
the slew-rate limitation of these devices [ 1 ]. The slew-rate problems of the voltage
operational amplifiers have been solved by using either adaptive biasing [13] or a class AB
differential-input stage like in `current feedback' voltage operational amplifiers [14] or
voltage operational amplifiers based on current conveyors [ 15, 16] also having class AB
differential-input stages. We will follow the second option to obtain current operational
amplifiers suitable for low-power designs.
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Chapter 6
High Performance Current Operational Amplifiers
Figure 6.11 `Voltage feedback' current operational amplifier for low-power
applications
As the first design suitable for low-power applications the `voltage feedback' current
operational amplifier will be considered [3, 12]. A detailed description of the basics of this
circuit has been given in Section 3.3. For low-power applications the non-inverting output
from Fig. 3.14 has to be changed to avoid the quiescent current sources M15, M16 limiting
the output current range of this circuit.
A CMOS schematic of a `voltage feedback' current operational amplifier for low-power
applications is illustrated in Fig. 6.11. Neglecting the bulk effect the small-signal, open-loop
current gain of this circuit is
The output current range of this `voltage feedback' current operational amplifier in an open-loop
configuration with grounded inverting output terminal is
where VDD and VSS are the positive and negative supply voltages, respectively, and vTM13
and vTM14 are the threshold voltages of the respective devices with the bulk effects included.
The exact values for the threshold voltages can be calculated from (A.3) considering the
source voltages of both devices being grounded and thus vSBM13 = |VSS| and VSBM14 = - |VDD|
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High Performance Current Operational Amplifiers
Figure 6.12 Current operational amplifier with a class AB current gain stage
a) current conveyor representation
b) CMOS implementation
Another option for achieving a current operational amplifier with an output current range
independent of a constant current source offers a true current operational amplifier
configuration adjoint to the current conveyor based voltage operational amplifier from Fig.
3.8. The current conveyor representation of such a current operational amplifier is drawn in
Fig. 6.12a and its basic CMOS implementation can be found in Fig. 6.12b. The open-loop
gain of this circuit can be calculated as
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Chapter 6
High Performance Current Operational Amplifiers
while the output current range is
what is approximately two times lower than the output current range of the `voltage feedback'
current operational amplifier. In addition the current operational amplifier from Fig. 6.12b
allows both multiple output terminals as well as a rail-to-rail voltage swing at the output.
E. Considerations for Low-Noise Designs
A general condition for low-noise amplifier designs is that the first stage shall introduce as
less noise as possible, since the contribution of this stage is amplified mostly and it is the
major part of the noise appearing at the output of the amplifier. In (5.23) and (5.24) the inputreferred noise contribution of the basic current operational amplifier in Fig. 5.4b has been
calculated. Here the devices MS-M8 are the most important noise contributors and from
(5.24) it is obvious that both the equivalent input-mean-square voltage noise and the smallsignal gate transconductance of these devices must be as small as possible, where the later
one is not so important as the first one since the noise of MOS transistors is modeled as a
current flowing through the drain. This conditions express the preference of p-channel
devices with small aspect ratios W/L and small drain currents.
An open question stays here the complete omitting of the input stage, the input current
buffer resulting in a single-input, differential-output transimpedance amplifier. Here the
input-referred noise should be theoretically zero, but this statement should be first proved
experimentally.
F. Operational Transimpedance Amplifiers for Current Signal Processing
As mentioned above, certain considerations lead to a complete omission of the input
current buffer from the basic current operational amplifier configuration. This transimpedance
amplifier can be used as a true current operational amplifier if its input is loaded by a high
resistance or only a capacitive load. The closed loop operation of such a device corresponds to
the closed-loop operation of current operational amplifiers shown in Fig. 5.11-14.
The fully differential version of this circuit, the differential-input, differential-output
transimpedance amplifier exhibits completely identical inside configuration as well as to
outside exhibiting performance as the fully differential transconductance amplifier for voltage
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Chapter 6
High Performance Current Operational Amplifiers
Figure 6.13 Fully differential amplifiers based on the operational floating amplifier
a) voltage amplifier
b) current amplifier
Figure 6.14 Current conveyor representation of a fully differential transconductance amplifier
signal processing. In fact, the so-called operational floating amplifier introduced by Huijsing
[17, 18] is actually suitable for both voltage and current processing circuits. This statement
can easily be proven by the closed-loop configurations of fully differential voltage and
current amplifier based on this device illustrated in Fig. 6.13.
A current conveyor representation of the fully differential transimpedance amplifier is
drawn in Fig. 6.14. The input-output transfer function of this circuit is
where RX is the resistance of the X-terminal of the current conveyors.
A possible CMOS implementation of the introduced transimpedance amplifier was
proposed by Arbel and Goldminz [19] and has been used in Fig. 4.6 as a differential
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Chapter 6
High Performance Current Operational Amplifiers
current amplifier. Applying a differential voltage at its inputs the differential output currents can
be calculated from
where Gm is the input-output transconductance of the circuit.
4.
A Multiple-Output, Low-Power
Operational Amplifier
Current
Summing the in this chapter described knowledge about high-performance current operational
amplifiers, the device in Fig. 6.15 has been designed for fabrication in the commercially available 2.4μm
CMOS technology. The circuit offers a single, low-impedance input terminal and four parallel noninverting as well as four parallel inverting, high-impedance output terminals.
A. Design Strategy and Operation
Because the circuit is symmetrical along the horizontal axis, the strategy of approximately
equal small-signal parameters of n- and p-channel devices was chosen for the design. This is
accomplished by setting the channel dimensions of p-channel devices to WP = 2 WN and LP =
3/4LN for the respective groups of transistors. Since a high-frequency operational amplifier was
also aimed, the shortest possible channel length for the p-channel transistors 2.4μm was used,
leading to 3.2μm for the channel length of all n-channel devices. The remaining calculations of
the channel dimensions concerned further only the channel widths.
The bias current of the circuit was supposed to be only IBIAS = 1 μA, what keeps the MOS
transistors close to the edge between strong and week inversion. With the gate-source voltages
close to the threshold voltages the devices remain in saturation also if large voltage swings
occur, or the rail-to-rail supply voltage is screwed down to 3 V. The very low bias current IBIAS
is transferred to all branches of the circuit, with one exception only, thus the mismatching
between the currents flowing in the unique branches may occur very high due to the large
contribution of mismatching of threshold voltages [20, 21, 22]. The influence of this
mismatching onto the input-output transfer function of the current operational amplifier can be
neglected in the high-gain stage and it will be lowered significantly with higher output currents
in the output branches.
The single input terminal of the proposed low-power current operational amplifier is built
of an input current buffer exploiting the single stage complementary source follower M7-M10,
giving the output impedance according to (2.27)
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Chapter 6
High Performance Current Operational Amplifiers
Figure 6.15
Multiple-output, low-power current operational amplifier
page 113
Chapter 6
High Performance Current Operational Amplifiers
The input current is mirrored by the current mirrors M13-M18 to the transimpedance
node of the amplifier, where the conversion to voltage takes place. In accordance with the
considerations on the design of high-speed current operational amplifiers in Section 3 of
this chapter the mirroring ratio of the current mirror was chosen 0.5. The input transistors
of the class AB voltage follower M19, M20 have also aspect ratios scaled by the factor 0.5
in comparison to M21, M22 to ensure quiescent drain currents of them of the same size as
the quiescent drain currents of M7- M12. Crosscoupling the output transistors of this
voltage follower M21, M22 with the output of a similar grounded voltage follower M7,
M8, M11, M12 results in a transconductance action giving the low-frequency, open-loop
gain
The dominant pole associated with the transimpedance node can be found at the
frequency
where for the value of CT the sum of the most important parasitic capacitancesCBDM17 +
CBDM18 + CGDM18 + CSBM19 + CSBM20 + CDBM19 + CDBM20 + CGSM19 + CGSM20+
+ 12 (CGSM21 + CGSM22 + CGDM21 + CGDM22 can be considered. The size of the additional
capacitance necessary to be added to the transimpedance node to compensate the current
operational amplifier was calculated only 0.1pF under the given biasing conditions. The
phase margin considered for these calculations was 60°.
The amplified differential currents are then mirrored to the output terminals by regulated
cascode current mirrors M23-M72 and M73-M122. This type of current mirror was chosen
because of its high output impedance (2.18), approaching the limitation given by the
dynamic resistance of PN junctions biased into backward conduction, and offering a
relatively large voltage swing at the output terminals (2.19). Since the quiescent drain
currents of these current mirrors are also supposed to be 1μA, the cascode transistors in the
input branches of the current mirrors M25, M26, M75, M76 will not remain in the saturated
region, because their drain voltages will approach the threshold voltages of the mirroring
transistors M23, M24, M73, M74, while their source voltages will be given by the threshold
voltages of M27, M28, M77, M78. These settings do not allow sufficient high drain-source
voltages for the cascode transistors. Nevertheless, the high gate voltage of these cascode
transistors, resulting from the latter described conditions they will be operating under, will
have no influence onto the input impedance of the current mirrors, and the input-output
current transfer neither. The size of the mirroring transistors and the
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Chapter 6
Nigh Performance Current Operational Amplifiers
number of the output branches is limited by the position of the first nondominant pole of the
current operational amplifier. The poles associated with the input nodes of these current mirrors
must not be placed lower than the first nondominant pole of the circuit.
The first nondominant pole of the current operational amplifier will be associated with the
input node, because a relatively large parasitic capacitance of approximately CIN-l0pF will appear
under the bonding pad and between the pin wire and package of the integrated circuit. This pole
placed at the frequency
will set the limitation for the unity-gain bandwidth of the current operational amplifier. A important
parameter of the proposed low-power current operational amplifier is also the output current range
derived from (6.18)
The calculated power consumption at the quiescent state is 35μW, using l0V , rail-to-rail supply
voltage.
B. Simulation and Test Results
Before fabrication the proposed circuit has been simulated on PSPICE using LEVEL 2 model
parameters for the technology being considered for the fabrication of the proposed circuit. The
simulated key parameters are compared to the measured results in Table 6.1. The significantly
lower output range of the current operational amplifier obtained by measurements would from
(6.25) normally indicate smaller transconductance parameters K of the transistors and/or higher
threshold voltages VT and bulk threshold parameters γ than the process parameters used in the
simulations. However, these considerations do not agree with the parameters measured on wafers
the chips were fabricated on submitted by the manufacturer.
The measurements of the open-loop gain of the circuit were severely degraded by the
relatively high noise level, introduced by the measurement equipment, thus the precision of the
measured open-loop gain is not sure. With the open-loop gain of 77dB the proposed current
operational amplifier approaches only the expectations. In a unity-gain feedback arrangement the
operational amplifier became unstable, leading to two possible explanations. First, the first
nondominant pole associated with the input terminal of the current operational amplifier is lower
than expected due to a higher capacitance associated with this node. The possibility of too low
gate
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Chapter 6
High Performance Current Operational Amplifiers
Table 6.1
transconductances of the input transistors M9, M10 was negated by the measurements of the
input resistances. Second, the first nondominant pole is associated with the input nodes of the
p- channel output current mirrors, drains of M26, M76. The first explanation seems to be more
reasonable, while the second is not solid enough, since the parasitic capacitances at the inputs
of the output current mirrors are more then one order of magnitude below CIN. Using the gain
settings for 20 and 40dB the current amplifier operated properly and exhibited classical
constant gain bandwidth characteristics like expected.
Finally, the proposed current operational amplifier introduces at high frequency also much
nonlinearity, especially in the crossover region, where the total turning off the input devices
M9, M10 seems to require a longer recovery. Although the fabricated current operational
amplifier did not fulfill all expectations obtained by simulations, the basic functionality of this
low-power design has been proven.
References
page 116
Chapter 6
High Performance Current Operational Amplifiers
page 117
Conclusions
Current signal processing undoubtedly has many interesting features. Probably, the most
important one is that the signal in form of current, obtained from sensors or D/A converters,
can be processed directly, without converting it to voltage at the input stage of the analog
signal processing system. The relative independence of the signal range on the size of the
supply voltage, together with the unconventionally defined power supply rejection ratio,
makes the current signal processing primarily interesting for analog applications, which have
to be integrated together with digital functions on a single chip. Such large systems, often
being forced disconnected from the power net, and supplied only by a single battery, require
supply voltages, which lie very close to the limit set by threshold voltages of MOS transistors.
Typical voltage processing circuits, however, require a supply voltage of the size of at least
two threshold voltages for proper operation, while current processing circuits need only one.
The doctoral thesis you just have read concerns two approaches to the design of function
blocks for analog current processing circuits, the current-mode approach and the design of
high- current-gain amplifier, current operational amplifiers.
The current-mode approach was until now the only possibility to design continuous-time,
current processing circuits. Current conveyors, as typical current-mode building blocks, have
over years proven their versatility in both voltage and current processing circuits. In this thesis
some applications based on current conveyors were shown and two of the applications, a
voltage operational amplifier and a gyrator, were chosen for a more detailed analysis. The
layouts of both circuits were designed and the circuits were fabricated in a standard industry
CMOS technology.
The key improvement of the proposed voltage operational amplifier is its response on a
step-function excitation, which is in accordance with the theoretical considerations and
calculations clearly not slew-rate limited. The other properties and parameters of this voltage
operational amplifier are similar to those of conventional voltage operational amplifiers.
The gyrator built of two complementary second generation current conveyors appears a
very simple design, and although with 1 mm2 it seems to be quite large, an on-chip second
order filter will surely require much less space than the gyrator considered for outside-chip
bandpass measurements. The measured parameters of both circuits were in a good agreement
with the theoretical predictions.
Another current conveyor based amplifier, the ′voltage feedback' current operational
amplifier was proposed and identified as the adjoint element of the `current feedback' voltage
operational amplifier. Simulations proved that the proposed circuit exhibits constant bandwidth
characteristics, a behavior typical for transimpedance amplifiers. This property allows to use
the
`voltage feedback' current operational amplifiers in high-frequency, high-gain
applications.
Although the current-mode approach has gained much attention of analog designers,
finding a `current-mode' or current operational amplifier was the declared aim of many of
them. This is because it is the merit of voltage operational amplifiers
page 118
that voltage processing systems are nowadays so dominating the analog signal processing
world. It can be expected that having a current processing building block having properties
similar or even identical to those of the voltage operational amplifiers would make it very
easy to design current processing systems with similar or even identical properties to those
of already well known and well-established voltage processing systems.
Studying the fundamentals of high voltage amplification and the configuration of voltage
operational amplifiers, and strictly considering the adjoint network theorem, leads clearly to
the current operational amplifier offering a single input, and differential output terminals and
a high open-loop gain, ideally approaching infinity. The basic architecture as well as the first
and second order parameters of the current operational amplifiers were defined in this thesis.
To prove these considerations two current operational amplifiers were designed and
fabricated. One of them was a differential-input, single-output current operational amplifier,
the second a differential-output, single-input current operational amplifier. Unfortunately,
neither of these circuits was packaged and delivered. Because the measurements were
performed by another institution, the simulations remained the only experimental results
mentioned in this thesis.
An attention was also paid to improvements of the performance of current operational
amplifiers. The design strategies towards low area, high frequency, low voltage, low power
and low noise were described and a high-frequency, multiple-output current operational
amplifier suitable for low-power applications was designed, fabricated and measured.
Analyzing the obtained results the conclusion must be accepted that all parameters
achieved by voltage processing circuits can be obtained by interreciprocal current processing
circuits too, and vice versa. This is mainly because the transfer functions, their zeroes and
poles, are always dependent on conductances and parasitic capacitances, independent of the
processing variable. Thus, considering the remarkable frequency parameters of current-mode
circuits results in the assumption that voltage-mode circuits exhibiting the frequency
properties of current-mode circuits must be obtainable if no internal high-impedance node is
included in these circuits.
For the most effective design of analog processing circuits remains finally one important
notion. All signal processing performed by analog electronics uses always both voltages and
currents as variables for signal processing, independently of the fact, which of these two
variables is included into the considerations and calculations of the designers as the
processing variable, and which is considered only as a parasitic. Therefore only taking both
variables, voltages and currents into account allows to build very high quality analog
systems.
page 119
Acknowledgments
The work presented in this thesis could only be realized with the aid and support of many
people. It is therefore a great honor to me to express my gratitude to them.
First I would like to thank Peter Lobotka and Ivo Vávra from the Institute of Electrical
Engineering of the Slovak Academy of Sciences in Bratislava, who provided guides beside my
first steps into the world of scientific research.
Four years ago I started the research on current-mode and current signal processing circuits
contained in this thesis at the Electronics Institute of the Technical University of Denmark in
Lyngby. It is therefore a special honor to me to express my deepest gratitude to Prof. Erik
Bruun, the head of the institute, for supervising me during my stay at the Electronics institute.
During the following years he also supported my research with valuable ideas and comments.
A part of my research work during my doctoral studies was carried out at the Department
of Electrical Engineering of the Catholics University Leuven, Belgium. I would like to
express my thanks to Prof. Willy M. C. Sansen, the head of the MICAS group at the
department, and Prof. Michael S. J. Steyaert, who extended my view in the design of analog
circuits significantly.
The major part of the work presented in this thesis was performed at the Department of
Microelectronics at the Faculty of Electrical Engineering and Computer Science of the
Technical University of Brno, Czech Republic. I would like to express my gratitude to my
supervisor Prof. Jaromír Brzobohatý, who has provided the guide lines for my work, supported
me with valuable advices and helped me to overcome all bureaucratic hindrances at the
University. Further I would also like express my sincere appreciation for the valuable
contribution of Prof. Jiří Pospíšil, from the Department of Radioelectronics, to this work.
Finally I would like to thank for the financial support from the Danish Research Academy,
Grant No. 5910181; Grant Agency of Czech Republic, Project No. 102/1993/1266; Fund of
Science of the Technical University of Brno, Project No. A 14/1994 and A 31/1994.
page 120
Appendix A
Models for MOS Transistors
All models will be described for n-channel MOS devices with the respective voltage and
current polarities shown in Fig. A.1.
1. Model for Hand Calculations
Hand calculations are used in the design process to set bias conditions of the circuit and
estimate small-signal transfer functions like gain, cut-off frequency, etc. For that reason a
simple large-signal and small-signal model for active devices are necessary.
A. Simple Large-Signal Model
The complete large-signal model for the MOS transistor is shown in Fig. A.2.
For approximate hand calculations an MOS transistor model based on the simple Sah
equation [ 1 ] is mostly used. If the transistor is operated in the linear region fulfilling the
conditions vGS ≥ VT and vDS ≤ (vGS - VT) its drain current can be calculated as
where (1 + λvDS) is the factor used to model the channel-length modulation behaviour.
However, the MOS transistor is mostly used in the saturated region with 0 < (vGS - VT) =
vDS (sat.) ≤ vDS . Here ignoring for the moment the channel-length modulation effect the
output current iD becomes independent of vDS. The Sah equation then transforms to
Usually the large-signal transconductance parameter (β = μ0 C0X W/L is defined, where K= μ0
COX is the technology parameter independent of the aspect ratio W/L. The threshold voltage VT
can be calculated from
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Models for MOS Transistors
Figure A.1.
Figure A.2
Positive sign convention for
a) n-channel and
b) p-channel MOS transistor
Complete large-signal model for MOS transistor
where:
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Models for MOS Transistors
B. Other MOS Large-Signal Model Parameters
The large-signal model also includes several other characteristics like diffusion-bulk
junctions, various parasitic capacitances, and diffusion resitances.
The diodes of Fig. A.2 represent the source-bulk, drain-bulk pn junctions, reverse biased
for proper transistor operation. They are used to model the leakage currents expressed as
an
The junction capacitances CBD and CBS represented in the next lines as CBX are a function
of the voltage across the pn junction vBX. The expression for this capacitance is divided into
two regions [2]:
and
where
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Models for MOS Transistors
CJ= zero-bias, bulk-source/drain capacitance
CJSW = zero-bias, bulk-source/drain sidewall capacitance
MJ= bulk junction grading coefficient (1/2 for step functions and 1/3 for graded
junctions)
MJSW = bulk-junction sidewall grading coefficient PB = bulk junction potential
FC = forward-bias nonideal junction-capacitance coefficient ( 0.5 )
Typical values for CJ, CJSW, MJ, and MJSW for an MOS transistor are given in Table A.1.
From (A.6) and (A.7) it is obvious that the bulk-source/drain pn junction capacitors can not be
accurately calculated without knowing the geometry of the devices; the area and perimeter of
the source and the drain.
Table
The oxide capacitors of MOS transistors consist of the gate-source capacitance gate-drain
capacitance CGD, and gate-bulk capacitance CGB . Further,
CGS and CGD can be divided into extrinsic overlap capacitances and intrinsic voltagedependent capacitances. The resulting oxide capacitances have to be defined separately for
three different regions of operation of MOS transistors [2]:
The off region:
The saturated region:
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Models for MOS Transistors
The nonsaturated region:
These equations provide a smooth transition between the three regions. W and L represent the
effective channel dimensions taking the lateral diffusion LD into account. CGXO , where X = S,
D for source and drain respectively, are the overlap capacitances, CGBO is the gate-bulk
capacitance, and COX is the oxide capacitance of the MOS transistor. Their typical values are
also given in Table A.1.
Other parasitic capacitors have their origin in the thick oxide sandwiches between
conductive layers (metal, polysilicon) and the substrate. Their high values can be avoided by
a carefully performed layout design, if necessary. However, their values can be calculated
only if the dimensions of the layout structures are known.
The values of the diffusion resistances rD and rS may be between 50 and 100 Ω. They do
not have any significant influence on the performance of the MOS transistor.
C. Noise Model of MOS Transistors
The fact that the electrical charge is not continuous but is carried in discrete amounts,
electrons and holes, results in noise, that represents a lower limit below which electrical
signals can not be processed without a significant deterioration in the quality of the signal.
Noise can be modeled by a current source connected in parallel with ID of Fig. A.lb
representing the thermal noise and flicker noise. The mean-square current-noise source is
defined as
where
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Models for MOS Transistors
This noise can be reflected to the gate of the MOS transistor and expressed as the equivalent
input-mean-square voltage noise
Very often the input-voltage-noise spectral density is used to express the noise performance of
analog circuits. Equation (A.12) can be rewritten to
Typical mean-square voltage-noise density of a 100μm/5μm NMOS device is 680 nV/√Hz
at 100 Hz. A corresponding PMOS device has 120 nV/√Hz at the same frequency. Generally,
the equivalent input-reffered voltage-noise of a PMOS device is about 5 times less then the
equivalent input-reffered voltage-noise of an NMOS device and the equivalent input-reffered
voltage-noise of a given device will decrease as the device area increases [2].
D. Small-Signal Model
For the calculations of the transfer functions of electronic circuits based on MOS devices
their small-signal model shown in Fig. A.3 is needed [3].
The gate transconductance gm, bulk transconductance gmbs and output conductance of MOS
transistors are related to the large-signal model by the following equations
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Models for MOS Transistors
Figure A.3 Small-signal model of MOS transistor
The dependence of the small-signal parameters upon the large-signal model parameters and the
chosen operational point in the linear and saturation regions can be obtained by differentiation of
(A. l ) and (A.2) respectively. The resulting dependencies are illustrated in Table A.2 and Table
A.3.
Table A.2
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Table
2. Models for Computer-Aided Analog Circuit Design
The simple Sah MOS transistor model expressed by (A.1) and (A.2) [1] has been also
taken as a basis for models used for computer simulations [4, S]. Of course, these models are
much more complex and include higher order effects associated with narrow or short channel
dimensions and the effects of temperature on MOS transistor parameters. These effects result
in the degradation of the surface mobility due to increasing electric field studied extensively
in [6], and in a similar manner the threshold voltage has to be corrected for small size devices
[7]. All these effects are included in the models for circuit simulations on SPICE. These
models are too complex to be described in these theses and therefore they will not be given
here. However, they can be found in [8].
References
1.
2.
3.
4.
5.
C.T. Sah, "Characteristics of the Metal-0xide-Semiconductor Transistor," IEEE
Transactions on Electron Devices, vol. ED-11, 1964, pp. 324-345.
P.E. Allen, D.R. Holberg, "CMOS Analog Circuit Modeling," Chapter 3 in CMOS
Analog Circuit Design, Holt, Rinehart and Winston, Inc., Orlando, 1987.
S. Liu and L.W. Nagel, "Small-Signal MOSFET Models for Analog Circuit
Design," Journal of Solid-State Circuits, vol. SC-17, 1982, pp. 983-998.
H. Shichman and D. Hodges, "Modeling and Simulation of Insulated-Gate FieldEffect Transistor Switching Circuits," IEEE Journal of Solid-State Circuits, vol.
SC-3, 1968, pp. 285-289.
G. Merckel, J. Borel, N.Z. Cupcea, "An Accurate Large-Signal MOS Transistor
Model for Use in Computer-Aided Design," IEEE Transactions on Electron
Devices, vol. ED-19, 1972, pp. 681-690.
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Models jor MOS Transistors
6.
7.
8.
S.C. Sun, J.D. Plummer, "Electron Mobility in Inversion and Accumulation Layers
on Thermally Oxidized Silicon Surfaces," IEEE Journal of Solid-State Circuits,
vol. SC-15, 1980, pp. 562-573.
K.N. Ratnakumar, J.D. Meindl, "Short-Channel MOST Threshold Voltage Model,"
IEEE Journal of Solid-State Circuits, vol. SC-17, 1982, pp. 937-948.
P. Antognetti, G. Massobrio, "Semiconductor Device Modeling with SPICE,"
McGraw - Hill Book Company, New York.
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