Download Definition of the module stray inductance Ls

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Definition of the module stray inductance Ls
Fig.1 shows the principle circuit of a half-bridge and the resulting voltage and current waveforms when switching IGBT1. The circuit stray inductance Lσ, shown as a concentrated element, represents all distributed inductances (of capacitors, busbars and IGBT modules)
within the commutation loop (striped area).
Lσ
IGBT1 turn-off
V GE
IGBT1 turn-on
0
IGBT1
D1
V IGBT1
C
M
Vcc
0
I IGBT1
I D2
IGBT2
D2
L
-15V
0
V IGBT2
Fig.1: Half-bridge circuit with current and voltage waveforms when switching IGBT1
Due to the changing current a voltage drop of Lσ * dioff/dt occurs across the stray inductance
Lσ. It is overlayed to the DC link voltage VCC and seen as a voltage spike across the turningoff IGBT1. Permissible limits for turn-off current di/dt and overvoltage can be deduced from
the RBSOA diagram of the IGBT. This curve (see Fig.2) is valid when the measurement is
done through the CE auxiliary terminals. Also a derated curve is given in the data-sheet for
measurements at the power terminals, taking into account the internal module stray inductance between main and auxiliary terminals of the module. For dual modules, this diagrams
refers to the voltage across one of the both commutating IGBT switches.
For calculations the value for the internal module stray inductance L s is given in the datasheets. For single switch modules, this value is the before mentioned stray inductance between main and auxiliary terminal. For dual modules or modules containing several phase
legs, this value corresponds to the application relevant effective commutation loop between
upper and lower switch. Due to the construction this value is clearly lower than the sum of
For further information contact:
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Marketing Department
Max Planck Str. 5
D-59581 Warstein
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AN_Stray_Inductance_Definition.doc
Application Note
page 2 of 3
separately determined induc-
Sicherer Arbeitsbereich IGBT (RBSOA)
Reverse bias safe operating area IGBT (RBSOA)
tances of upper plus lower arm.
RG,off = 1,2 Ω , Tvj = 125°C
3000
In modules with more than one
phase leg always the worst
2400
case commutation path from
IC[A]
1800
plus supply voltage through the
IC,Modul
1200
phase leg back to minus supply
IC,Chip
600
voltage is considered.
0
0
500
1000
1500
2000
2500
3000
3500
VCE[V]
Fig.2: RBSOA diagram for FZ1200R33KF2
VCC
C
DUT:
half-bridge
DUT:
single sw itch
V
-15 V
LL
VCC
C
-15 V
V
Fig.3: Measuring circuit
LL
-15 V
The measurement is performed, while the diode turns off. The voltage drop happens at a
point of time, where the di/dt is constant and the diode still
IF
dIF/dt
has no blocking capability. Therefore the voltage drop can
only be caused by the module stray inductance. No other
effects have to be considered. The module stray inductance
is calculated according to Ls = ∆V / diF/dt.
Dependent on the type designation, the data sheet value for
the stray inductance has to be interpreted in the following way:
For further information contact:
eupec
Marketing Department
Tel: +49 2902 764-0
Max Planck Str. 5
Fax: +49 2902-764-256
D-59581 Warstein
Internet:: http://www.eupec.com
AN_Stray_Inductance_Definition.doc
0
V
∆V
Application Note
page 3 of 3
Single modules type FZ... or ...GA... and Tripacks:
The module stray inductance is measured between the C and E main terminals.
Dual modules type FF or FD... (with exception of FF200R33KF):
These modules contain two independent switches. Given is the
stray inductance between the C and E main terminals of one switch.
Half-Bridges type ...GB... and FF200R33KF (modules with three main terminals):
The given data sheet value covers the full
commutation loop between upper and lower
switch, including the inductance between
upper C1 and lower E2 terminals.
4-packs type F4-...:
These modules contain two independent phase-legs. The given data sheet
value covers the full commutation loop between upper and lower switch
within one phase-leg, including the inductance between + and - terminals.
Six pack modules type FS...:
The given data sheet value covers the full commutation loop between up-
per and lower switch within one phase-leg, including the inductance between + and - terminals.
3-Phase full bridges or PIM type ...GD... or ...GP...:
The given data sheet value covers the full commutation loop
between upper and lower switch at the worst position within
the module, containing the full inductance towards the P+
and N- terminals (terminals named „22“ and „24“ with PIM).
For further information contact:
eupec
Marketing Department
Tel: +49 2902 764-0
Max Planck Str. 5
Fax: +49 2902-764-256
D-59581 Warstein
Internet:: http://www.eupec.com
AN_Stray_Inductance_Definition.doc