Download 3-5 units Question Bank

SIDDHARTH INSTITUTE OF ENGINEERING &TECHNOLOGY:: PUTTUR
ELECTRONICS & COMMUNICATON ENGINEERING
RADIO FREQUECY INTEGRATED CIRCUITS (RFIC)
QUESTION BANK
UNIT -3
1. Briefly explain the mixer design considerations.
[L1][CO 1][10M]
2. Derive the expression for noise parameters of intrinsic MOSFET two port network.
[L3][CO 2][10M]
3. Explain the concept of
i) Passive doubled balanced mixer ii) Potentiometric mixers
[L4][CO.][10M]
4. Illustrate the linear characteristics of LNA with the help of performance parameters.
[L3][CO.3][10M]
5. (a)Write about thermal noise in MOSFET’s
[L1][CO.3][5M]
(b) Write short notes on Noise Factor.
[L1][CO.3][5M]
6. What are different LNA topologies, Explain
[L1][CO.3][10M]
7. What is meant by noise? Explain in detail different types of noise.
[L1][CO.3][10M]
8. What are the different Mixer Characteristics? Explain.
[L2][CO.3][10M]
9. Write about (i) Single – balanced Multiplier based Mixer
[L1][CO.3][5M]
(ii) Sub Sampling Mixer
[L1][CO.3][5M]
10. (a) What is meant by noise figure? Give its expression.
[L2][CO.3][2M]
(b) What is the purpose of the LNA?
[L2][CO.3][2M]
(c) What are the commonly methods used for evaluating large signal performance?
[L1][CO.3][2M]
(d) List the intrinsic MOS noise parameters.
[L1][CO.3][2M]
(e) What is a Mixer and what is its need?
[L2][CO.3][2M]
TWO MARKS QUESTIONS
1. What is meant by noise and what are its different types?
[L1][2M]
2. What is meant by thermal noise?
[L1] [2M]
3. What is meant by flicker noise?
[L1] [2M]
4. What is meant by noise figure? Give its expression.
[L2] [2M]
5. What is the purpose of the LNA?
[L4] [2M]
6. What are LNA topologies?
[L1] [2M]
7. Draw the circuit diagram of single-ended LNA.
[L1] [2M]
8. Draw the circuit diagram of differential LNA.
[L1] [2M]
9. List the intrinsic MOS noise parameters.
[L1] [2M]
10. Give the expressions of intrinsic MOS noise parameters.
[L1] [2M]
11. Give the relation between power noise versus noise match.
[L2] [2M]
12. What are the commonly methods used for evaluating large signal performance?
[L1] [2M]
13. Give the relationship between 1-dB Compression and IP3 Points.
[L2] [2M]
14. What is the need for mixer?
[L4] [2M]
15. What is Mixer Noise?
[L1] [2M]
16. What are spurs?
[L1] [2M]
17. What is the purpose of LO in a mixer?
[L2] [2M]
18. What are the different multiplier based mixers?
[L1] [2M]
19. What is the need of subsampling mixers?
[L2] [2M]
20. What are the different types of subsampling mixers?
[L1] [2M]
SIDDHARTH INSTITUTE OF ENGINEERING &TECHNOLOGY:: PUTTUR
ELECTRONICS & COMMUNICATON ENGINEERING
RADIO FREQUECY INTEGRATED CIRCUITS (RFIC)
QUESTION BANK
UNIT -3
Objective Questions
1. If a system as noise input of 3.5 times N through a gain of 1000. The output will be __.
A. 3500N
B. 35000N C. 350N D. 35N
2. Equation of low noise amplifier __________.
A. a/n1-ns B. a/n1 C. a/n1+ns D. a/ns
3. Using maximum power transfer theorem then the possible voltage occurs at __.
A. antenna
B. power amplifier C. output D. input
4. The maximum power transfer theorem rl is equal to___________
A. conjugate of rs B. rs C. 0 D. 1
5. Maximum power transfer is not possible when the load is______
A. pure capacitor B. pure inductor C. a or b D. none
6. For a desirable large production of gm a lot of noise is produced from ___.
A. BJT B. antenna C. resistor D. MOSFET
7. Characteristics of an low noise amplifier is __________.
A. large gain B. low noise factor C. linearity D. all the above
8. Noise factor of a system-1 is 2db and system-2 is 10db then the total noise factor is_.
A. 1.5db B. 2.5db C. 3.5db D. 1db
9. In a possible system the mean input voltage2 is proportional to ________
A. gm B. gm2 C. gm-1 D. gm+1
10. Reflection coefficient (┌)=______________.
A. z0-zl/z0+zl B. z0/zl
C. z0+zl/z0-zl D. 1
11.
The Noise in Resistor can be reduced by modelling Resistor ____ with Noise Voltage.
A. Equal B. Greater
C. Series
D. Parallel
12.
The Noise Voltage has a Mean Squared noise voltage of _________ times R.
A. 4kT B. 3kT
C. 6kT
D. 9kT
13.
Noise in a Resistor is produced as a result of ___________.
A. Electron Vibration
B. Excess charge flow
C. Low voltage D. None
14.
Noise at one frequency is __________ of noise at other frequency.
A. Directly Proportional B. Inversely Proportional C. Independent D. None
15.
The Noise in Resistor can be reduced by modelling Resistor __ with Current Source.
A. Equal
B. Greater C. Series
D. Parallel
16.
The Noise present in a Resistor at a given bandwidth df is ___________ times df.
A. 4kTR
B. 3kTR
C. 6kTR D. 9kTR
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
17.
A.
18.
A.
19.
The mean square noise voltage at the output of RC network is equal to______ .
kT+C
B. kT/C
C. kT*C
D. 2kT+C
Noise in a circuit can be reduced by ___________ _ capacitor value.
Increasing B. Decreasing C. keeping constant
D. None
Which terminal(s) in MOSFET contributes to noise?
A. Source
B. Drain
C. Gate
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
D. All
20. The total Noise Voltage, Vo2 = ___________?
A. kT+C
B. kT/C
C. kT*C
D. 2kT+C
21. Drain voltage is _____ than the source, when MOSFET is used as a switch.
A. Smaller
B. Larger
C. Equal
D. A or C
22. __________ acts as wire when it consists of full field with electrons.
A. BJT
B. UJT
C. MOSFET
D. CMOS
23. Electron Vibration in MOSFET __________ as temperature increases.
A. Increases B. Remains constant C. Decreases D. None
24. A Noise ________ source does not have any direction.
A. Voltage
B. Current C. Both A&B
D. None
25. The square of Noise Current is __________ to kz.
A. Directly Proportional
B. Inversely Proportional
C. Equal D. Not Equal
26. ___________ cannot be measured directly.
A. Circuit Charge B. Resistive Charge C. Capacitive Charge D. Channel Charge
27. Channel Charge is directly proportional to ________.
A. Trans conductance B. Input Voltage
C. Current
D. None
28. The more the Channel Charge __________ is the Trans conductance.
A. Smaller
B. Larger
C. Equal
D. None
29. Under the condition of strong inversion & saturation, the channel gets______
A. Decreased
B. Increased
C. Pinched off
D. None
30. Noise Current IN is equal to ________ times gmdf.
A. 5/3
B. 6/3
C. 7/3
D. 8/3
31.
When the input of MOSFET is capacitive, then source gets__________
A. Generated
B. Degenerated
C. Eliminated D. None
32.
If we are moving to an LNA design, then ______ is to be find out or shown.
A. Input Impedance
B. Output Impedance C. Characteristic Impedance D. None
33.
An electronic system that adds no noise has a noise figure of ____ dB
A. 0
B. 1 C. 2 D. None
34.
The power spectral density of noise is given by
A. No=N/BW
B. No=BW/N C. No=N*BW D. None
35.
_______ generates noise when making low noise amplifier
A. Capacitors
B. Inductors C. Resistors D. None
36.
The undesired signal that ultimately emerge from the out put of the mixer are _____
A. Spurs B. Noise figure
C. Distortion
D. None
37.
The 10 giga radian per second is going to behave like_________
A. 10 ohms
B. 100 ohms C. 1 ohm
D. 150 ohms
38.
The ratio of the desired IF output to the value of the RF input is ______
A. Conversion Gain
B. Noise figure
C. Spurs
39.
The first stage of a receiver is typically a__________
A. LNA B. Mixer
C. Local oscillator
D. None
40.
Mixers must be ________ elements
A. Non Linear
B. Linear
C. Time- varying
D. A&C
[
]
[
]
[
]
[
]
D. None
SIDDHARTH INSTITUTE OF ENGINEERING &TECHNOLOGY:: PUTTUR
ELECTRONICS & COMMUNICATON ENGINEERING
RADIO FREQUECY INTEGRATED CIRCUITS (RFIC)
QUESTION BANK
UNIT -4
RF POWWER AMPLIFIERS
1. a. Classify the power amplifiers.
[L2] [CO.4] [2M]
b. Derive the equation for efficiency of class A power amplifier.
[L4] [CO.4] [8M]
2. a. Derive the equation for efficiency of class B power amplifier.
[L4] [CO.4] [6M]
b. Explain about class AB power amlpliifer.
[L1] [CO.4] [4M]
3. a. Describe how class C power amplifier approaches 100% efficiency as conduction angle
Decreases.
[L3] [CO.4] [8M]
b. Distinguish voltage amplifier with power amplifier.
[L3] [CO.4] [2M]
4. a. Explain how an active device as a switch can reduce power consumption to achieve high
Efficiency.
[L1] [CO.4] [5M]
b. Describe the how class D amplifier achieve high efficiency with help of suitable diagrams.
[L3] [CO.4] [5M]
5. a. Explain how reactive network can shape the control voltage to achieve high efficiency in
Class F amplifier.
[L1] [CO.4] [4M]
b. Derive the expression for efficiency of class E amplifier.
6. a. Explain how VCO can change its frequency with control voltage.
[L4] [CO.4] [6M]
[L1] [CO.4] [5M]
b. Describe the process of offset the +ve resistance of practical resonators using –ve resistance to
produce oscillator.
[L3] [CO.4] [5M]
7. Explain the following i. Quarter wave resonator.
[L1] [CO.4] [10M]
ii. Quartz crystal resonator
iii. Surface Acoustic Wave (SAW ) resonator.
8. a. Describe the process of ‘Phase locking’ in PLL.
b. Explain linearized PLL model.
9. a. Explain the importance of phase detector in PLL.
b. Describe the process of phase locking in linearized PLL.
10. a. Determine the process of pumping to obtain stability of PLL.
b. Describe how loop filters produce zero phase error in lock condition.
[L3] [CO.4] [5M]
[L1] [CO.4] [5M]
[L1] [CO.4] [5M]
[L3] [CO.4] [5M]
[L3] [CO.4] [5M]
[L3] [CO.4] [5M]
Short Answer Questions
1. Define the power amplifier.
[L1] [CO.4] [2M]
2. Classify the power amplifiers.
[L2] [CO.4] [2M]
3. Compare the efficiency of power amplifiers.
[L2] [CO.4] [2M]
4. Draw the circuit of Class A power amplifier.
[L3] [CO.4] [2M]
5. Show that the theoretical efficiency of Class B amplifier is 78.5%.
[L3] [CO.4] [2M]
6. Describe how class C power amplifier reaches 100% efficiency.
[L2] [CO.4] [2M]
7. List the high efficiency amplifiers.
[L2] [CO.4] [2M]
8. Describe how passive reactance can increase the efficiency of power amplifier. [L2] [CO.4] [2M]
9. Explain Working principle of class F amplifier.
[L1] [CO.4] [2M]
10. Explain about VCO.
[L1] [CO.4] [2M]
11. Explain impedance conversion in negative resistance oscillator.
[L1] [CO.4] [2M]
12. Describe how SAW resonator achieves high frequency at practical dimensions. [L2] [CO.4] [2M]
13. Explain about quartz crystal resonator.
[L1] [CO.4] [2M]
14. Draw the linearized PLL model.
[L3] [CO.4] [2M]
15. Explain Phase locking phenomenon in PLL.
[L1] [CO.4] [2M]
16. Explain how commutative multiplier used as phase detector.
[L1] [CO.4] [2M]
17. Explain sequential phase detector.
[L1] [CO.4] [2M]
18. Explain X-OR gate used as phase detector.
[L1] [CO.4] [2M]
19. Draw the diagram of charge pump PLL.
[L3] [CO.4] [2M]
20. Explain about loop filters.
[L1] [CO.4] [2M]
SIDDHARTH INSTITUTE OF ENGINEERING &TECHNOLOGY:: PUTTUR
ELECTRONICS & COMMUNICATON ENGINEERING
RADIO FREQUECY INTEGRATED CIRCUITS (RFIC)
QUESTION BANK
UNIT -4
Objective Questions
1. Power amplifies______ of the input signal.
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
A. Voltage B. Current C. Power D. None
2. Power amplifiers distinguished primarily by ______ conditions.
A. Bias B. Voltage C. Current D. None
3. Which of the following is the not high efficiency power amplifier?
A. Class E PA B. Class F PA C. Class D PA D. Class A PA
4. Which of the following is a high efficiency power amplifier?
A. Class E PA B. Class F PA C. Class D PA D. All
5. The conduction angle of the class A amplifier.
A. 900 B.1800 C. 3600 D. 2700
6. 5. The conduction angle of the class B amplifier.
A. 900 B.1800 C. 3600 D. 2700
7. The theoretical efficiency of Class A amplifier is _____
A. 50% B. 100% C. 78.5% D. None
7. The theoretical efficiency of Class B amplifier is _____
A. 50% B. 100% C. 78.5% D. None
8. Smaller conduction angle leads to _____ efficiency.
A. Higher B. Smaller C. No effect D. None
9. In class C power amplifier as Φ shrinks towards zero, the efficiency approaches ___
A. Zero B. 100% C.50% D. None
10. VCO output frequency can be changed by changing ______
A. Voltage B. Current C. Power D. None
11. The slope of the characteristics of VCO is known as___
A. Gain B. Sensitivity C. Both A and B D.None
12. The characteristics of VCO must be ___
A. Linear B. Nonlinear C. Both A and B D. None
13. In tuning range of VCO, the Kvco changes ____
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
A. Linearly B. Nonlinear C. Both A and B D. None
14. A perfect loss less resonator is a ___
A. Amplifier B. Rectifier C. Filter D. Oscillator
15. The energy loss in resonator can be overcome by _______ value of the Q.
A. Finite B. Zero C. Medium D. None
16. ___ can be used to offset the +ve resistance of the resonator to produce oscillator.
A. Passive reactance B. +ve resistance C. -ve resistance D. None
17. ____ is a device that resonates at resonant frequency with greater amplitudes.
A. Amplifier B. Resonator C. Filter D. Oscillator
18. The quality factor Q=_______
A. Estored*Edis B. Edis/Estored C. Estored/Edis D. None
19. At high frequencies adequate Q can be achieved from ______ resonators.
A. Lumped B. Distributed C. Both A and B
D. None
20. Quartz crystal works on the principle of ________
A. Piezo electric effect B. Magnetic effect C. EM effect D. None
21. ___resonator can achieve higher resonant frequencies at practical dimensions.
A. Crystal B. SAW C. Quarter Wave D. None
22. ____ material that supports surface acoustic waves.
A. LiNbO3 B. Si C. Ge D. None
23. The PLL generate frequency which is rational multiples of _______
A. Input frequency B. Input Voltage C. Input Voltage D. None
24. VCO generate frequency as a function of _____
A. Control Current B. Control power C. Control Voltage D. None
25. Phase detector produce output as a function of _____
A. Phase difference B. Control power C. Control Voltage D. None
26. In linearized PLL model input and output variables are_____
A. Currents B. Voltages C. Phases D. None
27. Phase Detector produces an output proportional to the phase __ of the inputs.
A. Difference B. Addition C. Multiplication D. none
28. The input/output characteristic of the PD is ideally a _____line.
A. Nonlinear B. Straight C. Curved D. None
29. ______ gate can be used as phase detector.
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
A. AND B. OR C. X-OR D. None
30. ______ gate whose average output is proportional to the input phase difference.
A. AND B. OR C. X-OR D. None
31. Sequential filters uses______ components.
A. Gates B. PLLs C. Flip flop D. None
32. ______ of the following can be used as phase detector.
A. X-OR B. Analog multiplier C. Sequential Circuit D. All
33. Charge pump PLL can be used to improve______
A. Stability B. Frequency C. Voltage D. None
34. Current source deposits charge in capacitor is called ______
A. Pump up B. Pump down C. Stabilizing D. All
35. Current source drawn charge from capacitor is called ______
A. Pump up B. Pump down C. Stabilizing D. All
36. In PLL lock condition, the phase error is_____
A. Infinite B. Zero C. Medium D.None
37. The conduction angle of the class AB amplifier.
A. 900 B. 1800 - 3600 C. 3600 D. 2700
38. Which of the following is a high efficiency power amplifier?
A. Class A B. Class AB C. Class B D. Class C
39. Loop is “locked” if ϕout(t)-ϕin(t) is _______ with time.
A. Constant B. Variable C. Independent D. None
40. Circuit with High Q obtain higher_________
A. Bandwidth B. Selectivity C. Voltage D. None
SIDDHARTH INSTITUTE OF ENGINEERING &TECHNOLOGY:: PUTTUR
ELECTRONICS & COMMUNICATON ENGINEERING
RADIO FREQUECY INTEGRATED CIRCUITS (RFIC)
QUESTION BANK
UNIT -5
1a) Get the Oscillators role in RFIC circuits with examples
b) How the frequency synthesis is done by RF Circuits give the details.
2 a) Frequency division is happened in RF Circuits? Explain it.
b) What is integer-N synthesis? Discuss it.
[CO 1] [L1][5M]
[CO 1] [L4][5M]
[CO 2] [L3][5M]
[CO 2] [L1][5M]
3 a) Measure the fractional frequency and synthesis it
[CO 2] [L5][5M]
b) Calculate the Phase noise the in RF circuits.
[CO 1] [L6][5M]
4 a) What are the general considerations in RF circuits
b) Give the RF Circuit examples in detail.
[CO 1] [L1][5M]
[CO 2] [L2][5M]
5 a) Write briefly about the Radio architectures in RF Circuits
[CO 2] [L1][5M]
b) Take the one Radio architecture and explain in detail.
[CO 2] [L1][5M]
6 a) What is GSM ? How it helps in RF circuits give the details.
b) Get the one GSM radio architecture and discuss it completely
7 a) what is CDMA? How it helps in RF circuits give the details.
b) Take one CDMA architecture explain it.
[CO 1] [L2][5M]
[CO 1] [L2][5M]
[CO 1] [L2][5M]
[CO 1] [L2][10M]
8. Where the UMTS is used in RF circuits explain it in detail.
[CO 2] [L4][10M]
9 .Write about UMTS radio architectures with diagrams explain it.
[CO 1] [L2][10M]
10 a) What is the importance of Frequency synthesis in RF circuits
[CO 1] [L1][2M]
b) What is the frequency division
[CO 1] [L1][2M]
c) What is phase noise in RF circuits?
[CO 1] [L1][2M]
d) Give the details of radio architectures
[CO 1] [L1][2M]
e) What is the CDMA role in RF circuits?
[CO 1] [L1][2M]
TWO MARKS QUESTIONS
1
Mention the advantages Oscillators
[CO 1] [L1][2M]
2
How the frequency is synthesized in RF circuits explain in short way
[CO 1] [L2][2M]
3
Explain the Frequency division in RF circuits
[CO 1] [L2][2M]
4
What is the integer –N synthesis?
[CO 1] [L1][2M]
5
Get the details of Fractional frequency?
[CO 1] [L2][2M]
6
Synthesize the fractional frequency in RF circuits explain it
[CO 1] [L4][2M]
7
Give the details of Phase noise explain it.
[CO 1] [L2][2M]
8
What are the radio architectures give the examples
[CO 1] [L1][2M]
9
What are the general considerations in RF circuits
[CO 1] [L2][2M]
10
Give the circuit details of RF system with examples
[CO 1] [L2][2M]
11
How can we divide the GSM radio architectures
[CO 1] [L3][2M]
12
Why choose CDMA in RF circuits
[CO 1] [L2][2M]
13
Mention the advantages in of GSM
[CO 1] [L2][2M]
14
Find the phase noise in RF circuits
[CO 1] [L4][2M]
15
Where the UMTS radio is used?
[CO 1] [L2][2M]
16
Give the details of UMTS radio architecture
[CO 1] [L2][2M]
17
Find the frequency division in RF circuits
[CO 1] [L4][2M]
18
How we divide the frequency in the RF circuits
[CO 1] [L2][2M]
19
Write about the fractional frequency
[CO 1] [L1][2M]
20
What Oscillators are used in RFIC’s
[CO 1] [L2][2M]
SIDDHARTH INSTITUTE OF ENGINEERING &TECHNOLOGY:: PUTTUR
ELECTRONICS & COMMUNICATON ENGINEERING
RADIO FREQUECY INTEGRATED CIRCUITS (RFIC)
QUESTION BANK
UNIT -5
Objective Questions
1. In basic Integer-N synthesizer if 'N' increases by 1 then what about output frequency (F out)
[
]
[
]
[
]
[
]
a) Decrease b) Increase c) 0 d) No change
2) In GSM Radio Architecture what is the BSS?
a) Bus Subsystem Station b) Bus Station Subsystem
c) Base Subsystem Station d) Base Station Subsystem
3) In GSM Radio Architecture. What is the NSS?
A) Network Subsystem Switching b) Network Subsystem Switching
c) Network Switching Subsystem d) Base Station Subsystem
4) What is IMSI?
a) International Mobile SIM Identification b) International Module SIM Identification
c) International Mobile Subscriber Identification d) International Mobile Subscriber Identity
5) In GSM Radio Architecture, What is OMC?
[
]
[
]
[
]
a) Operating Mobile Center b) Operations of Mobile Center
c) Operations and Maintenance Center d) Operating and maintain Centre
6) What is RNS in the UMTS radio architectures?
a) Radio Network System b) Radio Network Sub system
c) Reverse Network System d) Reverse Network Sub system
7) Open loop Q is defined as
a) Q = │d φ/ d ω│ b) Q = ω0/2 │d φ/ d ω│ c) Q = 2/ ω0 │d φ/ d ω│ d) Q = 2/ ω0 (d φ / d ω)
8) Digital Frequency divider cans generates______________________
a) Single frequency
b) Combination of frequencies
c) Addition of Frequencies
d) Multiple frequencies
9) In frequency divider the frequencies are having________________________speed.
a) Equally b) Not equally c) Zero d) Combine
[
]
[
]
10) In frequency divider the Reference frequency is _________________than Output frequency [
]
a) Same b) smaller c) equal d) higher
11) In Integer-N PLL Synthesizers the output frequency is given by
[
]
[
]
a) F vco = Fr b) Fvco = 1/ Fr c) Fvco = N Fr d) Fvco = N/ Fr
12) What is NSIM?
a) Universal Synchronous Identity Module b) Universal Subscriber Identifying Module
c) Universal Subscriber Identity Module
d) Universal Synchronous Identifying Module
13) In 3G UMTS Radio Architectures what is GGSN?
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
a) GPRS Gateway Support Node b) GPRS Gateway Subscriber Node
c) Gateway GPRS Support Node d) Gateway GPRS Subscriber Node
14) In 3G UMTS Radio Architectures what is PLMN?
a) Private Land Mobile Networks
b) Public Land Mobile Networks
c) Public Location Mobile Networks d) Private Location Mobile Networks
15) In 3G UMTS Radio Architectures, what is SGSN?
a) Service GPRS Support Node
b) Support GPRS Service Node
c) Serving GPRS Support Node
d) Support GPRS Serving Node
16) In Network Subsystem of GSM, What is NMC?
a) Network Maintenance Centre
b) Network Maintenance Connector
c) Network Management Connector d) Network Management Centre
17) In Network Subsystem of GSM, What is OMC?
a) Operations and management Centre
b) Operations and maintenance Centre
c) Operations and management Connector d) Operations and maintenance Connector
18) How many types are there in frequency Synthesizers?
a) 1 b) 2 c) 3 d) 4
19) In example of Fractional -N integer Synthesis what is the output frequency?
a) 9.1 MHz b) 10.1 MHz c) 11.1 MHz d) 12.1 MHz
20) The equation of phase detector is in frequency Synthesis.
a) V e (s) = K phase (θ R (s) - θ 0 (s) ) b) Ve (s) = K phase ( θ0 (s) - θR (s) )
c) V e (s) = (θ 0 (s) - θ R (s))
d) Ve (s) = ( θR (s) - θ0 (s) )
21) What is the value of K phase in the phase detector?
a) K phase = I/ 2 b) K phase = I/ 2π c)
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
[
]
K phase = 2/π d) K phase = 2π
22) In fractional – N PLL frequency synthesis the average division ratio will be
a) 10.1 b) 9.1 c) 8.1 d) 7.1
23) In fractional - N synthesizer what is MMD
a) Multimode Divider
b) Maximum modulus Divider
c) Multi modulus divider
d) Minimum Modulus Divider
24) In Discrete Time Analysis of PLL Synthesizer what is the value of ‘α’
a) α = 4 ( ζ - ωn T) / 4 ( ζ + ωn T) b) α = 4 ( ζ + ωn T) / 4 ( ζ - ωn T)
c) α = 4 ( ζ + T) / 4 ( ζ - T)
d) α = 4 ( ζ - T) / 4 ( ζ + T)
25) In Continues Time Analysis of PLL Synthesizer what is the value of K
a) K = ( K phase K vco)/ N b) K = ( Ao K vco)/ N
c) K = ( Ao K phase K vco)/ N d) K = ( Ao K vco)/ N
26) In second - order PLL has a loop filter with a transfer function
a) F(s) = (τs – 1)/s b) F(s) = (τs +1)/s c) F(s) = (τs ) / s d) F(s) = s /τ s
27) In Continuous Time Analysis for PLL Synthesizers the overall transfer function is
a) θ0 / θR = F(s) / ( s+ k f(s) )
b) θ0 / θ R = k F(s) / ( s+ k f (s) )
c) θR/ θ0 = F(s) / ( s+ k(s)
d) θ R/ θ0 = k F(s) / ( s+ k(s))
28) In frequency Synthesizers what is PFD
a) Parallel frequency Detector
b) phase frequency divider
c) Phase frequency detector
d) parallel frequency divider
29) In VCO the output phase after the detector is
a) θ0 /VC = (K vco /s )
b) θ0 /VC = 1/N (K vco /s )
c) θ0 /VC = N (K vco /s )
d) θ0 /VC = N K vco
30) The damping constant is in frequency Synthesizer is
a) ζ = √ ( I KVCO C1)/ 2πn b) ζ = ½ √ ( I KVCO C1)/ 2πN
c) ζ = R/2 √ ( KVCO C1)/ 2Πn d) ζ = R/2 √ ( I KVCO C1)/ 2πN
31) The Resistor 'R' value in frequency Synthesizer
a) R = ζ ( 4πN ωn )/ ( I KVCO ) b) R = ζ ( 2πN ω n )/ ( I KVCO )
c) R = ζ ( 2π ωn )/ ( I KVCO )
d) R = ζ ( πω n )/ ( I KVCO )
32) In PLL linear Transient Behavior what is the input of ' θ R '?
[
]
[
]
[
]
35) In fractional - N Synthesizer with a Dual Modulus Prescalar the accumulators output Yi can be
mathematically expressed
[
]
a) θ R = ω / S2 b) θ R = Δ ω / S2 c) θ R = ω / S d) θ R = Δ ω / S
33) The Settling Time ( Ts) in nonlinear Transient Behavior
a) Ts = (Δ VC C1 ) / I
b) Ts = ( 2 Δ VC C1 ) / I
c) Ts = ( Δ VC ) / I
d) Ts = 2 Δ VC C1
34) What is the value if Cs in frequency Synthesizer
a) Cs = (C1 + C2)/ C1 C2
c) Cs = (C1 + C2)
a) Yi = (Yi -1 - Ki) mod F
b) Cs = C1 C2 / (C1 + C2)
d) Cs = C1 C2
b) Yi = (Yi -1 + Ki) mod F
c) Yi = (Yi +1 - Ki) mod F d) Yi = (Y i-1 + Ki) F
36) In simple Accumulator Simulation what is the step size for the Architecture is
[
]
a) Step size = Fr/ RF b) Step size = RF/ Fr c) Step size = Fr d) Step size = RF
37) In a fractional -N frequency Synthesizer with a multimode divider the synthesizer output frequency
is given by
[
]
a) fvco = K/f b) fvco = (fr/R) + ( K/f) c) fvco = (Fr /R) I + ( K/f) d) fvco = (Fr /R) I
38) In a sample Accumulator simulation the frequency of Cout will be equal to
[
]
[
]
40) In a Quadrature Oscillators and Injection Locking the output voltage at resonance is given by [
]
a) f cout = K/f b) f cout = K fclk /f c) f
cout
= K f clk d) f cout = f/ k fclk
39) The motional resonance frequency in Crystal Oscillator
a) fs = 1/ ( 2π√L1 C2 ) b) fs =
1/ ( 2π√L1 C1 )
c) fs = 1/ ( 2π L1 C1 ) d) fs = 1/ ( 2π L2 C2 )
a) V out = R b) V out = in R c) V out = ¯in R d) V out = ¯ in /R