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Hardware Verification Using HOL Home Page G. Sivakumar Computer Science Department Indian Institute of Technology, Bombay Mumbai 400076, India [email protected] http://www.cse.iitb.ac.in/∼siva Title Page Contents JJ II J I Outline of Talk Page 1 of 24 • Hardware Verification Overview Go Back Full Screen Close Quit • HOL Examples – CMOS NOT Gate – Ripple Carry Adder – Parity Circuit • HOL Tips for Lab Session Formal Hardware Verification Home Page Title Page Contents JJ II J I Page 2 of 24 Go Back Full Screen Close Quit the proof that a circuit or a system (the implementation) behaves according to a given set of requirements (the specification). Abstraction Levels • Large abstraction gap between Specification and Implementation. Home Page Title Page • Bridged in several layers (hierarchy). • Automation tool for Lower Layers • Catching Design flaws early is critical Contents JJ II J I Level Behavior Architecture Algorithm Structure Process RTL Data Flow FSM Registers ALU Gate Boolean functions Flip-flops gates Data Numbers Time Causality Bit Vectors Clock Cycles Page 3 of 24 Go Back Full Screen Transistor Differential Capacitors equations transistors Close Layout Quit area Bits Discrete delay time Voltage current Continuous time Hardware Verification Method Home Page Classical method of hardware verification: Title Page Contents JJ II J I Page 4 of 24 Go Back 1. write a specification of intended behaviour Spec 2. write specifications of the design components Part-1, . . . Part-n 3. define a formal model of the design Design = Part-1 + . . . + Part-n 4. formulate and prove correctness Design satisfies Spec For now, ignore Full Screen Close • fabrication defects • inaccurate design models • ... Quit What is HOL? Home Page HOL is an interactive program for mechanized formal reasoning using higher order logic. Title Page Contents JJ II J I Page 5 of 24 Go Back Full Screen Current Version: HOL4 (June 2002) Home Page: http://hol.sf.net/ (Excellent Tutorial: Lots of material borrowed from there in rest of talk) The HOL system provides: • an expressive and powerful notation for writing system specifications, • flexible and general facilities for creating formal proofs of properties of Close Quit specifications. HOL Structure and Use HOL is built on top of ML Home Page Title Page Contents JJ II HOL is a programming environment • system command = a programming language • proof = computation of theorems J I Page 6 of 24 Go Back Full Screen Close Quit Theory-creation in the HOL system HOL Features • rigorous and well-understood theoretical basis Home Page • powerful command language (the general purpose programming language ML) Title Page • secure–can’t prove false theorems • user-extendable, without compromising security Contents • supports a variety of styles of reasoning JJ II J I • automates some low-level details of proofs HOL applications include: • hardware design and verification Page 7 of 24 Go Back • reasoning about security • reasoning about real-time systems • semantics of HDLs (e.g. VHDL, Verilog) Full Screen • software verification (e.g. Hoare logic) Close Quit • modelling concurrency (e.g. CCS, CSP) • automata theory. . . Formal Specification in HOL General Idea for a Hardware Device Home Page Title Page Contents JJ II J I Page 8 of 24 Go Back Full Screen Close Quit This is specified by a boolean term S(a, b, c, d) with free variables a, b, c, and d. Do not think of Inputs/Outputs. S(a,b,c,d) is either True of False for some combination of a,b,c,d if that set of values is externally observable on the wires. Simple Examples Home Page Title Page Contents JJ II J I Page 9 of 24 Go Back Full Screen Close Quit Composing Behaviours Home Page Title Page Contents JJ II J I Page 10 of 24 Go Back Full Screen Close Quit Hiding Internal Strcuture Home Page Title Page Contents JJ II J I Page 11 of 24 Go Back Full Screen Close Quit CMOS Inverter Example Home Page Title Page Contents JJ II J I Page 12 of 24 We wish to verify o = ¬i 3 Steps 1. define a model of the circuit in logic 2. formulate the correctness of the circuit 3. prove the correctness of the circuit Go Back Full Screen Close Quit CMOS Primitives Home Page Title Page Contents JJ II J I Page 13 of 24 Go Back Full Screen Close Quit Home Page Title Page Contents JJ II J I Page 14 of 24 Go Back Full Screen Close Quit Inverter Model and Correctness Correctness Proof Home Page Title Page Contents JJ II J I Page 15 of 24 Go Back Full Screen Close Quit Proof(Ctd.) Home Page Title Page Contents JJ II J I Page 16 of 24 Go Back Full Screen Close Quit More Complex Example Ripple Carry Adder (illustrates recursion) Home Page Title Page Contents JJ II J I Page 17 of 24 Go Back Full Screen Close Quit Model Definition Home Page Title Page Contents JJ II J I Page 18 of 24 Go Back Full Screen Close Quit Model Definition (Ctd.) Home Page Title Page Contents JJ II J I Page 19 of 24 Go Back Full Screen Close Quit Correctness Proof Home Page Title Page Contents JJ II J I Page 20 of 24 Go Back Full Screen Close Quit Time Dependent Behaviour Home Page Title Page Contents JJ II J I Page 21 of 24 Go Back Full Screen Close Quit Parity Circuit Home Page Title Page Contents JJ II J I Page 22 of 24 Go Back Full Screen Close Trace working on sample input. Quit HOL Demo Home Page Title Page Contents JJ II J I Page 23 of 24 Go Back Full Screen Close Quit Some simple demos now (including parity). More in the lab. HOL Tips (From Authors) Skills needed to use the system: • familiarity with basic logic notation Home Page Title Page • ability to use an interactive functional language • intuitive grasp of reasons for logical truth • you do not have to be an expert logician! Contents Learning to use HOL: JJ II J I • gaining familiarity with the syntax of HOL’s logic • learning to express specifications in this notation • learning your way around HOL’s very large collection of built-in facts and Page 24 of 24 proof procedures • learning useful proof-tactics . . and recognizing the contexts in which they Go Back Full Screen are useful Main problems for beginners: • don’t know how to prove it, even informally –solution: experience, seeing Close Quit examples • know the proof, but can’t get HOL to do it! –solution: the reference manual, examples