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LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY 200 mA, Dual Output LED Flash/Lamp Driver FEATURES o Multi-mode charge pump: 1x, 1.33x, 1.5x, 2x o Ultra low dropout PowerLite™ Current Regulator* o Drives two high-current LEDs up to 96 mA each o o 1-wire LED current programming Power efficiency up to 95% o o Low noise input ripple in all modes Low current shutdown mode o o Soft start and current limiting Short circuit protection o Thermal shutdown protection o Tiny 3 x 3 x 0.8 mm 16-pin TQFN package Regulator increases device’s efficiency up to 95%. This new mode requires no additional external capacitors. The EN/SET logic input functions as a chip enable and a current setting interface. LED driver is programmable over a one wire digital interface from 1.5 to 96 mA in 1.5mA steps. LEDs may be turned on/off or programmed separately APPLICATION o LED Light Supply for Smart Phones, PDAs, and Cell Phones LED Flashlights o LED Flash/Strobe Applications o Low noise input ripple is achieved by operating at a constant switching frequency which allows the use of small external ceramic capacitors. The multifractional charge pump supports a wide range of input voltages from 2.7V to 5.5V. DESCRIPTION The LDS8620 is a high efficiency multi-mode fractional charge pump with ultra low feedback voltage that can drive up to two high-current LEDs. The inclusion of a 1.33x fractional charge pump mode and ultra low dropout PowerLite™ Current The device is available in in 16-lead TQFN 3mm x 3mm package with a max height of 0.8mm. TYPICAL APPLICATION CIRCUIT © 2008 Leadis Technology Characteristics subject to change without notice 1 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY ABSOLUTE MAXIMUM RATINGS Parameter Vin, LEDx, C1±, C2± voltage Vout voltage EN/SET voltage Storage Temperature Range Junction Temperature Range Soldering Temperature Rating 6 6.5 Vin + 0.7V -65 to +160 -40 to +125 300 Unit V V V °C °C °C RECOMMENDED OPERATING CONDITIONS Parameter Vin Ambient Temperature Range ILED per LED pin Total Output Current (ILEDA + ILEDB) Rating 2.7 to 5.5 -40 to +85 0 to 96 0 to 192 Unit V °C mA mA Typical application circuit with external components is shown on page 1. ELECTRICAL OPERATING CHARACTERISTICS (Over recommended operating conditions unless specified otherwise): Vin = 3.6V, Cin = Cout = 1µF, C1 = C2 = 0.22 µF, EN = High, T AMB = 25°C Name Quiescent Current Shutdown Current LED Current Accuracy LED Channel Matching Output Resistance (open loop) Charge Pump Frequency Output short circuit Current Limit Input Current Limit 1x to 1.33x, 1.33x to 1.5x, or 1.5x to 2x Transition Thresholds at any LED pin 1.33x to 1x Mode Transition Hysteresis Transition Filter Delay Input Leakage EN/SET Pin High Logic Level Low Thermal Shutdown, T SD Thermal Hysteresis, T SD_HS Under Voltage Lockout (UVLO) Threshold Over Voltage Protection © 2008 Leadis Technology Characteristics subject to change without notice Conditions 1x mode 1.33 x mode 1.5x mode 2x mode Min Typ 1.5 3.5 4.5 5.5 Max mA 1 V EN = 0V 1.5 mA ≤ILEDA,B ≤96 mA (ILED - ILEDAVG) / ILEDAVG 1x mode 1.33x mode, Vin = 3V 1.5x mode, Vin = 2.7V 2x mode, Vin = 2.4V 1.33x and 2x mode 1.5x mode Vout < 0.5V Vout > 1V µA % % ±3 ±3 0.7 3.5 5.5 6.5 0.8 1.1 35 450 ILEDA,B = 60 mA Ω MHz mA mA 50 mV 600 800 mV µs µA -1 1.3 1 0.4 150 20 2.1 V °C 6.2 2 Units V V Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY RECOMMENDED EN/SET TIMING For 2.5 VIN 5.5V, over full ambient temperature range -40 to +85ºC. Symbol tSETUP tLO Name EN/SET setup from shutdown EN/SET program low time Conditions Min 10 0.2 tHI tOFF EN/SET program high time EN/SET low time to shutdown 0.2 1.5 tDATADELAY tRESETDELAY EN/SET Delay to DATA EN/SET Delay High to ADDRESS 500 2 Typ Max 100 100 Units μs μs 100 μs ms μs ms Figure 1. EN/SET One Wire Addressable Timing Diagram Figure 2. EN/SET multi flash timing diagram (see description at p.8) REGISTER CONFIGURATION AND PROGRAMMING Table 1. Register Address and Data Register Address Pulses REG1 REG2 REG3 REG4 REG5 1 2 3 4 6 Description Bits Output Configuration Global Current Setting* LED A Current Setting LED B Current Setting Return Lockout 2 6 6 6 1 DATA pattern Bit 1 LED B Enable Bit 0 LED A Enable See Table 3 for values RTLKO Note: *) If Global current setting register Reg2 is used, registers Reg3 and Reg4 should be empty, and vice versa If registers Reg3and Reg4 are used, Reg2 should be empty to prevent data interference. Table 2. Reg1 Code Data pulses 0 1 2 3 Reg1 Bit 1 0 0 0 1 1 1 0 0 1 LED state LED B LED A Off Off On On On Off Of On Note: If bits Bit0 – Bit1 are set to zero, the corresponding LED bank is disabled. © 2008 Leadis Technology Characteristics subject to change without notice 3 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY Table 3. REG2-4 Current Setting Registers Data Pulses Reg2-4 value (binary) LED Current, mA Data Pulses Reg2-4 value (binary) LED Current, mA 0 000000 1.5 33 011111 48 011110 011101 011100 46.5 45 43.5 011011 011010 011001 42 40.5 39 011000 010111 010110 37.5 36 34.5 1 2 3 111111 111110 111101 96 94.5 93 34 35 36 4 5 6 7 111100 111011 111010 91.5 90 88.5 111001 111000 110111 87 85.5 84 82.5 37 38 39 40 8 9 10 11 12 13 110110 110101 110100 110011 14 15 16 17 18 19 20 41 42 43 81 79.5 78 44 45 46 010101 010100 010011 010010 33 31.5 30 28.5 110010 110001 110000 76.5 75 73.5 47 48 49 010001 010000 001111 27 25.5 24 101111 101110 101101 72 70.5 69 001110 001101 001100 22.5 21 19.5 21 22 23 101100 101011 101010 101001 67.5 66 64.5 63 50 51 52 53 54 55 56 001011 001010 001001 001000 18 16.5 15 13.5 24 25 26 101000 100111 100110 61.5 60 58.5 57 58 59 000111 000110 000101 12 10.5 9 27 28 29 30 100101 100100 100011 100010 57 55.5 54 52.5 60 61 62 63 000100 000011 000010 000001 7.5 6 4.5 3 31 32 100001 100000 51 49.5 64 000000 1.5 © 2008 Leadis Technology Characteristics subject to change without notice 4 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY PROGRAMMING EXAMPLES Programming 2 LEDs to 96 mA/output © 2008 Leadis Technology Characteristics subject to change without notice 5 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY PIN DESCRIPTION Pin # 1 2 3 4-6 7 8 9 10 11 12 13 - 15 16 PAD Name NC LEDA LEDB NC VOUT V IN C1+ C1C2+ C2GND EN/SET PAD Function No connect LED A cathode terminal LED B cathode terminal No connect Charge pump output connected to the LED anodes Charge pump input, connect to battery or supply Bucket capacitor 1 Positive terminal Bucket capacitor 1 Negative terminal Bucket capacitor 2 Positive terminal Bucket capacitor 2 Negative terminal Ground Reference, Connect all these pins to GND Device enable (active high) and LED Current Dimming Control Connect to GND on the PCB Top view: TQFN 16-lead 3 X 3 mm PIN FUNCTION capacitor is required between the Vout pin and ground near the device. VIN is the supply pin for the charge pump. A small 1μF ceramic bypass capacitor is required between the Vin pin and ground near the device. The operating input voltage range is from 2.5V to 5.5V. Whenever the input supply falls below the under-voltage threshold (1.8V), all the LED channels are disabled and the device enters shutdown mode. GND is the ground reference for the charge pump. The pin must be connected to the ground plane on the PCB. C1+, C1- are connected to each side of the ceramic bucket capacitor C1 EN/SET is the enable and one wire addressable control logic input for all LED channels. Guaranteed levels of logic high and logic low are set at 1.3V and 0.4V respectively. When EN/SET is initially taken high, the device becomes enabled and all LED currents remain at 0mA. To place the device into zero current mode, the EN/SET pin must be held low for more than 1.5ms. C2+, C2- are connected to each side of the ceramic bucket capacitor C2 LEDA and LEDB provide the internal regulated current source for each of the LED cathodes. These pins enter high-impedance zero current state whenever the device is in shutdown mode. PAD is the exposed pad underneath the package. For best thermal performance, the pad should be soldered to the PCB and connected to the ground plane VOUT is the charge pump output that is connected to the LED anodes. A small 1μF ceramic bypass © 2008 Leadis Technology Characteristics subject to change without notice 6 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY BLOCK DIAGRAM Figure 2. LDS8620 Functional Block Diagram BASIC OPERATION Regulator switches the charge pump into 1.33x mode (after a fixed delay time of about 800 μs). In 1.33x mode, the charge pump’ output voltage is approximately equal to 1.33 times the input supply voltage (less any internal voltage losses). At power-up, EN/SET pin should be logic LOW. The LDS8620 starts operating in 1x mode when EN/SET pin is asserted logic high and at least one channel is enabled. At 1x mode, the output will be approximately equal to the input supply voltage (less any internal voltage losses). If the output voltage is sufficient to regulate all LED currents, the device remains in 1x operating mode. This sequence repeats at every mode until driver enters the 2x mode. If the device detects a sufficient input voltage is present to drive all LED currents in 1x mode, it will change automatically back to 1x mode. This only applies for changing back to the 1x mode. The difference between the input voltage when exiting 1x mode and returning to 1x mode is called the 1x mode transition hysteresis (about 600 mV). The low dropout PowerLite™ Current regulator (PCR) performs well at input voltages up to 50 mV above LED forward voltage significantly increasing driver’s efficiency. The LDS8620 monitors voltage drop Vd across PCR at every channel in ON state. If this voltage falls below 50 mV (typical) at any one channel, (channel with LED with highest forward voltage), the Mode Control Block changes charge pump mode to the next multiplication ratio. LED Current Setting The current in each of the LED is programmed through the 1-wire EN/SET digital control input. By pulsing this signal according to a LEADIS 1-wire protocol, a set of internal registers can be addressed and written into allowing to configure each of LEDs with the desired current. There are five registers: the first is 2 bits long, while registers 2 – 4 are six bits long, and the fifth is one bit long. The registers are Vd = V IN x M – VF – Rcp x Iout, where Rcp is a Charge Pump Output Resistance at given mode, Iout is sum of all LED currents, and M is a charge pump’ multiplication ratio. If the input voltage is insufficient or falls to a level where Vd ≤50 mV, and the regulated currents cannot be maintained, the low dropout PowerLite™ Current © 2008 Leadis Technology Characteristics subject to change without notice 7 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY programmed by first selecting the register address and then programming data into that register. REG5 also triggers the internal charge pump. This forces the charge pump to start from 1x mode and determine the correct mode it should operate to drive the LEDs most efficiently. If V IN has risen or the device has been reprogrammed to other LED values, it is recommended to trigger this reset allowing the charge pump to run in the most efficient mode. An internal counter records the number of falling edges to identify the address and data. The address is serially programmed adhering to low and high duration time delays. One down pulse corresponds to register 1 being selected. Two down pulses correspond to register 2 being selected and so on up to register 5. tLO and tHI must be within 200ns to 100μs. Anything below 200ns may be ignored. To power-down the device and turn-off all current sources, the EN/SET input should be kept low for a duration tOFF of 1.5 ms or more. The driver typically powers-down with a delay of about 1 ms. All register data are cleared/reset. Once the final rising edge of the address pointer is programmed, the user must wait longer than 500μs before programming the first data pulse. Any falling edge after that will be recognised as a first data pulse. Device allows multi flash mode operation using 1-wire interface. In this case, Registers 2, 3 or 4 should be programmed first to set output current. Register Reg1 should be used to start flash event with one or two channels depend on number of LED turned on. Flash starts tDATADELAY (2 ms) later after last data pulse. Use Reg1 address without data (one pulse) to turn off flash. Next flash event may start any time after t RESETDELAY (2 ms) by selecting register Reg1 with data. (See Figure 3 for an example – multi flash mode with maximum output current and all LEDs turned on during the flash.) Data in a register is reset once it is selected by the address pointer. If a register is selected but no data is programmed, the next pulse sequence will be recognized as data only. Do not select register without data sending because it may disrupt normal device operation. Once the final rising edge of the data pulses is programmed, the user must wait at least 2 ms before programming another address. If programming fails or is interrupted, the user must wait tRESETDELAY 2 ms from the last rising edge before reprogramming can commence. Protection Modes The LDS8620 has follow protection modes: 1. LED short to V OUT protection If LED pin is shorted to V OUT , LED burned out becomes as short circuit, or LED pin voltage is within (VOUT - 1.5V) range, LDS8620 recognizes this condition as “LED Short” and disables this channel with 750 µA control current. If LED pin voltage is less than (Vout – 1.5V), LDS8620 restores LED current at this particular channel to programmed value. Upon EN/SET pin goes high, the LDS8620 automatically seeks an address instruction. The device requires a minimum 10μs delay to ensure the initialization of the internal logic at power-up. After this time delay, EN/SET pin may be set high and the device registers may be programmed adhering to the timing constraints shown in Figure 1. 2. V OUT Over-Voltage Protection Register REG1 allows select the LEDs to be turned on. Each of LEDs can be turned on independently by setting the respective bit to 1. The charge pump’ output voltage V OUT automatically limits at about 6.2 V maximum. This is to prevent the output pin from exceeding its absolute maximum rating. Register REG2 allows to set the same current for all channels. REG3 and REG4 allow to set the current respectively in LED A and B. The LEDs can be programmed with independent current values. 3. V OUT Short Circuit Protection If VOUT is shorted to ground before LDS8620 is enabled, input current may increase up to 200 – 300 mA within 20 µs after enable and is limited to 35 – 40 mA after that. REG5 contains the return lockout (RTLKO) bit. This stops the charge pump returning to 1x mode. One pulse sets it to 1. Two pulses set RTLKO to 0. When RTLKO is set to 1, the charge pump cannot automatically return to 1x mode when in one of the charge pump modes. The device can however move from 1x to 1.33x, or to 1.5x and 2x if the input voltage is not sufficient to drive the programmed LED currents. © 2008 Leadis Technology Characteristics subject to change without notice 4. Over-Temperature Protection If the die temperature exceeds +150°C, the driver will enter shutdown mode. The LDS8620 requires restart after die temperature falls below 130°C. 8 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY 5. Input Voltage Under-Voltage Lockout External Components If V IN falls below 2.2 V (typical value), LDS8620 enters shutdown mode. Device requires restart when input voltage rises above 2.3 V. The LDS8620 requires two external 1µF ceramic capacitors (X5R or X7R type) for decoupling input, output, and two 0.22 µF capacitors (X5R or X7R type) for the charge pump. In all charge pump modes, the input current ripple is very low, and an input bypass capacitor of 1µF is sufficient. 6. Low V IN or High LED VF Voltage Detection If, in 2x mode, V IN is too low to maintain regulated LED current for given LED VF, or LED becomes an open circuit, or if any LED at active channels is disconnected, LDS8620 starts subsequently changing modes (2x – 1x – 1.33x -1.5x – 2x -…) in an attempt to compensate insufficient voltage. As a result, average current at all other channels that are ON may be below regulated level. In 1x mode, the device operates in linear mode and does not introduce switching noise back onto the supply. Recommended Layout In charge pump mode, the driver switches internally at a high frequency. It is recommended to minimize trace length to all four capacitors. A ground plane should cover the area under the driver IC as well as the bypass capacitors. Short connection to ground on capacitors Cin and Cout can be implemented with the use of multiple via. A copper area matching the TQFN exposed pad (PAD) must be connected to the ground plane underneath. The use of multiple via improves the package heat dissipation. LED Selection LEDs with forward voltages (V F) ranging from 1.6V to 4.5V may be used. Charge pumps operate in the highest efficiency mode when V F voltage is close to Vin voltage multiplied by switching mode, i.e. Vin x 1, Vin x 1.33 and so on. If the voltage source is a Li-ion battery, we recommend selecting LED with V F = 2.7 – 3.6 V to extend the battery life and achieve highest efficiency. © 2008 Leadis Technology Characteristics subject to change without notice 9 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY PACKAGE DRAWING AND DIMENSIONS 16-PIN TQFN (HV3), 3mm x 3mm, 0.5mm PITCH SYMBOL A A1 A2 b D D1 E E1 e L MIN 0.70 0.00 0.178 0.18 2.90 1.40 2.90 1.40 0.35 NOM 0.75 0.02 0.203 0.23 3.00 1.55 3.00 1.55 0.50 typ 0.40 MAX 0.80 0.05 0.228 0.28 3.10 1.70 3.10 1.70 0.45 Note: 1. All dimensions are in millimeters 2. Complies with JEDEC Standard MO-220 © 2008 Leadis Technology Characteristics subject to change without notice 10 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY ORDERING INFORMATION Part Number LDS8620 002-T2 Notes: 1. 2. Package Package Marking (1) TQFN-16 3 x 3mm 8620 Matte-Tin Plated Finish (RoHS-compliant) Quantity per reel is 2000 EXAMPLE OF ORDERING INFORMATION Prefix LDS Device # Suffix 8620 002 Product Number Optional Company ID Package T2 Tape & Reel T: Tape & Reel 2: 2000/Reel 002: 3x3 TQFN Notes: 1) All packages are RoHS-compliant (Lead-free, Halogen-free). 2) The standard lead finish is Matte-Tin. 3) The device used in the above example is a LDS8620 002–T2 ( 3x3 TQFN, Tape & Reel). 4) For additional package and temperature options, please contact your nearest Leadis Technology Sales office. © 2008 Leadis Technology Characteristics subject to change without notice 11 Doc. No. 8620DS, Rev. 0.4 LEADIS TECHNOLOGY CONFIDENTIAL LDS8620 PRELIMINARY Warranty and Use LEADIS TECHNOLOGY MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIG HTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES. Leadis Technology products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Leadis Technology product could create a situation where personal injury or death may occur. Leadis Technology reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale. Leadis Technology advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor applications and may not be complete . Leadis Technology 800 W. California Ave, Suite 200 Sunnyvale, CA 94086 Phone: 408.331.8600 Fax: 408.331.8601 http://www.leadis.com © 2008 Leadis Technology Characteristics subject to change without notice Document No: 8620DS Revision: 0.4 Issue date: 8/15/2008 12 Doc. No. 8620DS, Rev. 0.4