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GSM Power Amplifier Control Loop Design )Automatic Gain Control) 1. Introduction: Power amplifier control (PAC) for a Global System for Mobile communications (GSM) compatible radio is one of the more challenging aspects of the GSM-based system design. Not only must the radio meet all output radio frequency (RF) spectrum specifications, but the Power Amplifier (PA) control loop must also be stable under varying environmental conditions. Automatic gain control (AGC) was implemented in first radios for the reason of fading propagation (defined as slow variations in the amplitude of the received signals) which required continuing adjustments in the receiver’s gain in order to maintain a relative constant output signal. Such situation led to the design of circuits, which primary ideal function was to maintain a constant signal level at the output, regardless of the signal’s variations at the input of the system. Originally, those circuits were described as automatic volume control circuits, a few years later they were generalized under the name of Automatic Gain Control circuits (AGC). With the huge development of communication systems during the second half of the XX century, the need for selectivity and good control of the output signal’s level became a fundamental issue in the design of any communication system. Nowadays, AGC circuits can be found in any device or system where wide amplitude variations in the output signal could lead to a lost of information or to an unacceptable performance of the system. AGC systems are part of any wireless communication system where a constant output signal is desired. The complexity of the AGC system is determined by the requirements of the communication system, therefore the analysis, design and implementation can become quite difficult. AGC systems and circuits will continue to evolve as long as wireless technology becomes faster, smaller and more complex. New devices, circuits and techniques must be studied, developed and implemented. 2. Objectives of using AGC circuits: Automatic Gain Control (AGC) circuits are employed in many systems where the amplitude of an incoming signal can vary over a wide dynamic range. The role of the AGC circuit is to provide relatively constant output amplitude so that circuits following the AGC circuit require less dynamic range. If the signal level changes are much slower than the information rate contained in the signal, then an AGC circuit can be used to provide a signal with a well defined average level to downstream circuits. In most system applications, the time to adjust the gain in response to an input amplitude change should remain constant, independent of the input amplitude level and hence gain setting of the amplifier. Why we need to control the output power level of mobile phone signal booster? To prevent intermodulation in base station receivers. To prevent interference with other mobile phones using the same booster. To minimize power consumption. Using the minimum power necessary for reliable communication with the selected base station, based on distance. 3. Theory of the Automatic Gain Control system Many attempts have been made to fully describe an AGC system in terms of control system theory, from pseudo linear approximations to multivariable systems. Each model has its advantages and disadvantages, first order models are easy to analyze and understand but sometimes the final results show a high degree of inaccuracy when they are compared with practical results. On the other hand, non-linear and multivariable systems show a relative high degree of accuracy but the theory and physical implementation of the system can become really tedious From a practical point of view, the most general description of an AGC system is presented in figure 1. Figure 1. Typical PAC Loop with Proportional Control Figure 1 shows a typical PAC loop that uses proportional control. The control signal is proportional to the difference between the Detector/Coupler feedback and the DSP signal. Since an AGC is essentially a negative feedback system, the system can be described in terms of its transfer function which can be done by noting the following relationships. Feedback=KdKc (Vo) (1) Error=Ks (DSP-Feedback) (2) Vo= Ka (Error) (3) Vo= Ka (Ks (DSP- KdKc (Vo))) (4) Simplifying: (5) (6) This expression, T is commonly known as the closed loop gain. The product of gains, Ka Ks KdKc is known as the loop gain. This control scheme is usually called proportional control, because the output voltage, Vo, is directly proportional to the error signal. The closed loop gain is divided into a forward path gain (A) and a feedback path gain (B) Figure 2. Substituting into the original equation produces the following more familiar output voltage expression: (7) (8) where A = Ka Ks, and B = KdKc Figure 2. Closed Loop Gain with Forward Path Gain A and Feedback Path Gain B 3.1 Benefits of Closed Loop Control In this section, the study compares between open loop control( B = 0) and closed loop control. The advantages of closed loop control become apparent. 3.1.1 Temperature, Battery Insensitivity, and Linearization If the loop gain remains >> 1 over temperature and battery ranges, then the output voltage, Vo, becomes insensitive to temperature and battery effects. If AB >> 1, then the closed loop transfer function becomes: (9) Since KdKc is part of the feedback network and is usually a stable, temperature compensated block, there is a gain independence from battery supply and temperature. There is also a gain independence from KsKa variations when the radio environment differs from the one in which it was calibrated. 3.1.2 Sensitivity to Power Amplifier Gain Changes In general, the power amplifier (PA) gain, Ka is sensitive to both temperature and supply level. This can be stated mathematically as: Since the design scheme is proportional control, there is a concern as to just how much the output power varies with a change in the PA gain. Assume Ks = 1 for the following calculations, that is A = Ka, and starting with equation (8). (10) Writing this expression in incremental form yields the following: (11) To make this expression more useful, it can be written in terms of a fractional change of output voltage by dividing equation (11) by (8), which results in the following: (12) Now the relative change in output voltage vs the change in PA gain is obvious. If the loop gain is >>1, then the gain change has very little effect on the output voltage change. But, as the loop gain changes from the calibration point, the change in output voltage becomes more and more sensitive to PA changes. 3.2 Adding an Integrator to the Forward Path Most PAC loops employ an integrator in the control loop forward path, Figure 3. This changes the topology from proportional control to integral control. As the previous section pointed out, the output power is a function of both the feedback gain, which is relatively stable, and the PA gain, which is sensitive to both temperature and supply,. This is a problem when the loop gain is relatively low. Unfortunately, this low gain condition usually occurs at the highest system output power. Figure 3. PAC Loop with an Integrator in the Forward Path From Figure 3, it can be seen that the control voltage driving the PA is the integral of the error. In theory, integral control has the advantage that the loop settles to a point where the error is zero. Yet the integrator output provides the correct control voltage to the PA by integrating past errors. Re-writing the closed loop expression taking into account the integrator in the forward path provides insight as to what effect the integrator has on the steady operation of the loop. (13) (14) Now differentiating to time yields, (15) For steady state, when we have (16) (17) This is a design benefit. By using an integrator, the PA gain is essentially removed from loop steady state operations. In more practical terms, output voltage is expected to be the same even if the PA gain changes. This is intuitively obvious as the integrator drives the PA to the calibrated power level, so long as the feedback gain, KdKc, remains the same. Although the integrator seems like an attractive solution, it does have a few drawbacks that the designer should be aware of. ● The loop now pushes the PA to get what it wants. If there are any conditions in which the PA cannot meet the calibrated output power, the loop drives the PA into saturation. This, in turn, can cause problems for switching transients. ● The integrator adds a phase shift/delay of 90° to the loop, so stability needs careful attention over all areas of operation. 4. PAC Loop Components This section covers the following basic PAC loop components; see Figure 7. to include how they are commonly implemented: 4.1 RF Detector The RF detector converts an output voltage scaled value into a DC voltage used for comparison with the DSP value. it is important that the detector is temperature compensated and Detector gain should also be stable over all operating conditions. detector gain is bounded by –7 dB and –3 dB. 4.2 Coupler The coupler is a passive temperature stable device ideal for a feedback block. The coupler is important beyond the obvious connection to the feedback path. The amount of coupling defines not only dynamic range, but it also limits the minimum insertion loss in the output power path. Generally, couplers are found in the range of 10 dB to 20 dB, with the least amount of coupling being preferred for insertion loss. Coupler gain (18) The amount of coupling also defines the amount of feedback gain, and ultimately limits the maximum amount of loop gain. 4.3 Difference amplifier Error signal computation can be done using a difference amplifier shown in Figure 4. Figure 4. Difference Amplifier Circuitry Where Vdet is the Rf detector o/p Vdsp is the desired power level 4.4. Differential Integrator The differential integrator is usually used in a PAC loop instead of a simple differential amplifier It is used to take advantage of an integrator in the forward path, discussed in Section 3.2. Figure 5 shows implementation using an operational amplifier. Figure 5. Implementation Using an Operational Amplifier We can combine amplifier with the integrator into one operational amplifier, the Differential Integrator block.as we can see in figure 6. Figure6. Differential Integrator Block Diagram we can combine all the previous components in one circuit as in figure7. Figure7. Automatic gain control Where TX_EN=2.8 v VPAC =2.8 v 4.5. Power amplifier (PA) An RF power amplifier is a type of amplifier used to convert a low power radio frequency signal into a larger signal of significant power. It's usually optimized to have high efficiency, high output power, good return loss on the input and output, good gain and optimum heat dissipation. ALM-31122 power amplifier 1. General description: ALM-31122 is a high linearity 1 Watt PA with good OIP3( third order intercept point) performance and exceptionally good PAE at 1dB gain compression point, achieved through the use of Avago Technologies’ proprietary 0.25um GaAs Enhancement-mode pHEMT process. All matching components are fully integrated within the module and the 50Ω RF input and output pins are already internally AC-coupled. This makes the ALM-31122 extremely easy to use as the only external parts are DC supply bypass capacitors. The adjustable temperature-compensated internal bias circuit allows the device to be operated at either class A or class AB operation. The ALM-31122 is housed inside a miniature 5.0 x 6.0 x 1.1 mm3 22-lead multiplechips-on-board (MCOB) module package. 2. Features Fully matched, input and output High linearity at P1dB Unconditionally stable across load condition Built-in adjustable temperature-compensated internal bias circuitry GaAs E-pHEMT Technology[1] 5V supply Excellent uniformity in product specifications Tape-and-Reel packaging option available MSL-3 and Lead-free High MTTF for base station application 3. Specifications 900 MHz; 5V, 394mA (typical) 15.6 dB Gain 47.6 dBm Output IP3 31.6 dBm Output Power at 1dB gain compression 52.5% PAE at P1dB 2 dB Noise Figure 4. Applications Class A driver amplifier for GSM/CDMA Base Stations. General purpose gain block. 5. Component Image Notes: Package marking provides orientation and identification “31122” = Device Part Number “WWYY” = Work week and Year of manufacture “XXXX” = Last 4 digit of Lot number 6. Electrical Specifications TA = 25 °C, Vdd =5V, Vctrl=5V, RF performance at 900MHz, measured on demo board (see Figure 8) unless otherwise specified. Symbol Parameter and Test Condition Ids Quiescent current Ictrl Vctrl current Gain Gain Min. Typ. Max Units 340 394 440 mA - 10.4 - mA 13.7 15.6 17.3 dB OIP3 [8] Output Third Order Intercept Point 45 47.6 - dBm OP1dB Output Power at 1dB Gain Compression 30 31.6 - dBm Power Added Efficiency - 52 - % NF Noise Figure - 2.0 - dB S11 Input Return Loss, 50Ω source - -14 - dB S22 Output Return Loss, 50Ω load - -11 - dB S12 Reverse Isolation - -21 - dB PAE Table 1. 7. Demo Board Schematic Figure 8. 1. 2. 3. 4. 5. 6. References J.R smith ''Modern Communication Circuits'', McGraw Hill Electrical and Computer Engineering Series.2nd edition, New York, 1988. U.L. Rhode, T.T.N. bucher ''Communication Receivers: principle and design'', McGraw hill, New York, 1988. Automatic gain control in receivers by Iulian Rosu, VA3IUL. A discussion on the Automatic Gain Control (AGC) – Phil Harman, VK6APH. Analysis and Design of Analog Integrated Circuits Grey, Paul R.; Robert G. Meyer. GSM Handset Power Amplifier Control Loop Design An Analog Approachby Jason Millard & Darioush Agahi