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Transcript
Long-tailed Pair -- Revision of Results
Differential-mode:
Av = (-)0.5Rchfe/hie
Rin = hie at each input
Common-mode:
Av = -Rchfe/[hie + 2(1 + hfe)Re]
Signal Resistance of the Current Mirror
VCC
R
i
v
0V
We wish to find out the relation between the signal values of voltage and current v
and i.
So we draw the equivalent circuit:
VCC (= 0 V for signals)
1/hoe
R
ib2
X
hfeib1
i
hfeib2
hie
hieie1
1
1/hoe
v
ib1
0V
This looks like another case of “Danger! Hard Sums” but for once all we need is
Ohm’s Law and common sense.
A little thought reveals that no current can be flowing in anything but hoe for
Transistor 2. The argument is as follows. The top of resistance R is at 0 V for signals
.. so the current in R is equal to the voltage at X divided by R and it will flow upwards
if the voltage at X is positive. The bottom of both hie, and hoe for Transistor 1, is also
at 0 V, so the current in all of those resistances will flow downwards if the voltage at
X is positive; the same will then apply to the generator currents. All the current will
therefore be flowing out of Point X, which it cannot by Kirchhoff’s Current Law. If
the voltage at X were negative, all the current would flow into X, which it is again not
allowed to do by Kirchhoff’s Current Law. Therefore the voltage at X must be zero
and no current flows in either generator. The current I can now only flow through hoe
for Transistor 2, so the signal resistance faced by the current I will be 1/ hoe. This
signal resistance will typically be tens of kilohms -- a lot higher than we could achieve
by just using a resistor.
We can obtain an estimate of hoe, by the way, from the transistor data even if the
manufacturer does not give full output characteristics if the Early voltage is quoted
(which it usually is). The beginner often ignores this piece of data on the basis that it
will probably have disappeared before the alarm clock goes off. In fact it is a very
useful piece of data, as the following diagram shows:
IC
- Early Voltage
VCE
So if we know the Early Voltage (often referred to as VA) and the quiescent values of
IC and VCE, we can estimate hoe as IC/(VCE + |VA|).
An example to show the improvement
12 V
4.7 k
4.7 k
vo
vi1
With an actual
resistor for Re
vi2
4.7 k
-12 V
We remember (or have forgotten) that the current in the emitter resistor can be
calculated as [0 - VBE - (-12)]/Re = 11.4/4.7 = 2.43 mA. We now require to produce a
Current Mirror which will give the same current. The design calculation, for once, is a
simple d.c. one. In the circuit on the next page, we have a current path through R and
a base-emitter junction from +12 V to -12 V. The current in R will therefore be
[12 - (12) -0.6]/R, and we want its value to be 2.43 mA. We therefore solve:
[12 - (12) -0.6]/R = 2.43 (with a TI - 85 if we wish!) and conclude that R must be
[12 - (12) -0.6]/2.43 = 9.65 k. We would manufacture to the exact value if we were
making the circuit in integrated form, but probably use a 10-k resistor if it were to be
manufactured from discrete components.
12 V
4.7 k
4.7 k
vo
vi1
R
vi2
With a Current
Mirror for Re
-12 V
Level Shifting
The output voltage of the long-tailed pair circuits above will not be zero when both
the inputs are zero. As the circuits stand, the quiescent VO will be 12 - (4.7  2.43/2) =
6.3 V; it would be much better if it were zero! Several methods exist of making the
quiescent value zero.
1. Take the output via a capacitor. This is a good solution for an a.c. amplifier, but it
will not work for d.c. or indeed slow a.c. Anyone who has tried to measure slow
signals on an oscilloscope set to “a.c.coupled” knows this only too well!
2. Use a voltage divider. This will work up to a point, but it will have two problems: it
will divide the signal as well (losing some of our hard-earned amplification!) and it
will either load the output significantly or give rise to a high output resistance.
3. (A variant of 2). Use an emitter (or source) follower. This will largely overcome the
problems of (2) but will produce only a slight shifting of the level.
4. Use an emitter (or source) follower in conjunction with a current mirror. This often
proves to be the best method in practice.
Suppose we attach the circuit on the next page to the output of our long-tailed pair.
The long-tailed pair output “sits” at 6.3 V, so the emitter of the emitter-follower
transistor will be at 6.3 - 0.7 = 5.7 V. We now want to drop that 5.7 V across the 4.7k resistor. (4.7 k was chosen as a “reasonable value” - it need not be 4.7 k). The
current in the current mirror will therefore need to be 5.7/4.7 = 1.21 mA. The
resistance R must therefore carry 1.34 mA, so R = [12 - 0.6 - (-12)]/1.21 = 19.3 k.
Again we could use the precise value in integrated form, but in discrete form we
would be well advised to use the next lower preferred value of 18 k, and to
incorporate a low-value potentiometer in series with the 4.7 k resistor to adjust the
quiescent output voltage to zero. The base current of the emitter-follower transistor
will only be 1.34/hFE mA, so it is unlikely significantly to affect the collector voltage
or current of the right-hand transistor in the long-tailed pair.
12 V
From
L.T.P.
output
4.7 k
R
vo
-12 V
Three Class Questions
1.
If the Early voltage of its transistors is 25 V, what will be the signal resistance
of the left-hand current-mirror transistor? (30.6 k)
2.
How much voltage gain will be lost as a result of the level shifting? (Reduced
to 30.6/(30.6 + 4.7) = 0.867 of its value)
3.
Could we use a similar circuit instead of Rc to increase the voltage gain of the
circuit? (Yes).
(See Notes for approach)
(I suggest doing Q4 first) (NB The studenti do not have the italicised
sections)
4. A transistor differential amplifier (“Long-tailed pair”) has both collector resistors of
value 3.9 k and the emitter resistor of value 3.3 k. The transistors are identical with
hfe = 300, hie = 5 k, and negligible hoe and hre. The quiescent base-emitter voltage drop
is 0.6 V.
If it operates on 12 V supplies, what will be the quiescent collector current
and voltage?
(We have -0.6 - (-12) = 11.4 V across the 3.3-k, so its current is 11.4/3.3 = 3.45 mA.
The collector current is half that value approx = 1.73 mA, so the collector voltage
must be 12 - 1.73 x 3.9 = 5.26 V).
b)
Determine the differential- and common-mode voltage gains and the commonmode rejection ratio.
Using the equivalent circuit:
a)
0V
i b1
vi1
h ie
Rc
vo
hfei b1
Rc
h ie
hfei b2
v
i b2 i2
Re
0V
By Ohm’s law vo = 0 - Rcic = - 4.7 x 300ib (both CM and DM)
For CM, we have two lots of ib and two lots of hfeib going down Re, so the total
current in it will be 2ib + 2 x 300ib = 602ib. Using KVL from vi1 down to 0 V therefore
gives vi = 5ib (for hie) + 602 x 3.3ib = 1991.6ib.
The voltage gain for CM is therefore - 4.7 x 300ib/ 1991.6ib = -0.71.
For DM, there is no signal current in Re as ib1 = -ib2, so vi = 5ib. This result gives the
voltage gain as - 4.7 x 300ib / 5 ib = -282 (NB -141 if we regard the input voltage as
being applied between the bases, but the subsequent example assumes it is +vi on one
base and -vi on the other one).
c)
Explain how:
(i)
the CMRR could be improved by a suitable circuit modification.
(Replace Re by a current mirror -- see earlier in Notes)
(ii)
the voltage gain could be improved by a suitable circuit modification.
(Several possibilities; replacing the two Rc by the two halves of a current mirror with
the "current setting" side in the non-output side of the LTP is one)
(iii) the output voltage could be made 0 V for 0 V input.
(See earlier in Notes ..emitter follower from the output collector of the LTP followed
by a potential divider with a current mirror at the lower end to minimise the loss of
voltage gain)
d)
What will be the signal output voltage of the circuit if 10 mV is applied to the
base of the transistor from whose collector the output voltage is taken and 0 V
is applied to the base of the other transistor?
(Input 5 mV CM + 5 mV DM, so output = -(5 x 0.71 + 5 x 282) = - 1413.55 mV)