Download LECTURE XVII MEMORY Memory devices are VSLI (Very Large

LECTURE XVII
MEMORY
Memory devices are VSLI (Very Large Scale Integrated Circuits) which are designed to
hold data (either temporarily or 'forever') in computer systems. If they lose their data
when power is removed, they are of the Volatile type. If they are able to retain their data
when power is removed, they are known as Nonvolatile. They might contain computer
programs, large quantities of data (e.g. bank or business records) or smaller amounts of
data temporarily placed there by the microprocessor for frequent access as it completes
its tasks.
The two major types of memory are:
1) RAM which stands for Random Access Memory (Volatile type)
2) ROM which stands for Read Only Memory (Nonvolatile type)
RAM, is sometimes referred to as Read/Write memory because the microprocessor is
able to send information to it (known as a Write operation) and retrieve information from
it (known as a Read operation. It is typically organized in Byte sized chunks of data (8
bits) or some multiple thereof, e.g. 16 bits (2 bytes), 32 bits(4 bytes), or 64 bits (8
bytes). These multiples of bytes are known a Words. No specific length is specified for
Words and as such, is generally related to the size of the Data Bus on the particular
microprocessor being used.
As the name implies, any memory location can be accessed at any time by the
microprocessor. This is opposed to LIFO (Last In First Out) and FIFO (First In First Out)
memory schemes which will be introduced in later classes.
There are two types of RAM, Static and Dynamic. Static RAM (SRAM) consists of
latches (1 for each bit) and will retain its contents so long as power is applied to the
memory chip. Dynamic RAM (DRAM) bits consists of a single transistor and a capacitor
which when charged are considered HI and when discharged are seen as a LO. The
problem with these types of memory devices is that capacitors will lose their charge in a
relatively short time and, as a result, must be refreshed every few milliseconds.
Computers which utilize DRAM must contain circuitry which accomplishes this
refreshing task. The advantage of DRAM is that their circuitry is comparatively much
less complex and more bits can be placed on a similalyr sized piece of silicon.
ROM memory (which can also be randomly accessed) can only be read by the
microprocessor, i.e. it cannot store information there. The ROM device must be
programmed by the manufacturer or, in some cases, by special equipment which can
be found in microprocessor development laboratories. Once the ROM memory chip is
programmed it requires no power to retain its contents and so will remain there forever.
One typical use for ROM is found in Personal Computers. They contain a short
program which is executed only upon power-up. Its sole purpose is to read the
operating system into RAM memory so that the computer is then usable. This is known
as a Bootstrap program.
Another use for ROM is in dedicated microcontroller system. For example, your vehicle
likely uses one or more computers to monitor and control certain functions such as
climate control, engine performance, emission monitoring and control, etc. Once these
programs have been written and perfected by the manufacturer, there is no need to
change them by the end user and frankly, not many of them would have the knowledge
to do so. Consequently, the programs are stored in ROM and (theoretically) will never
be lost or changed.
Over the years, variations of ROM have been designed specifically with the purpose of
prototype design in mind.
One of these is the UVPROM or Ultraviolet Programmable Read Only Memory. It is
programmed by the use of a special device connected to a computer which applies a
voltage greater than the usual TTL 5v to the individual bits of the various memory
locations which causes them to be either a LO or HI. This programming will remain until
or unless a strong UV light is shown through a transparent window located on the chip
directly above the silicon memory portion of the chip as shown here.
A UVPROM eraser is shown below. It contained a UV lamp which shown onto the
memory chip.
Shortly after the UVPROM was created, a new type of ROM was invented called the
EEPROM or Electronically Erasable Programmable Memory. This was a vast
improvement for the microprocessor system engineer because they could be erased
electronically almost immediately whereas the UVPROMs had to sit in the 'UV Eraser'
box for at least 20 minutes. Once programmed, they would retain their memory until the
'Erase' function was enabled.
On an historical note, the RAM in your personal computer used to be commonly
referred to as the core memory. This is because the first randomly accessible memory
was actually constructed from magnetic donut shaped devices, one per bit, known as
cores. The magnets had several wires which passed through their centers which
caused the magnets to be polarized in either a positive or negative orientation which
corresponded to a HI or a LO. Shown below is a sample of the original core memory.
This particular example measures a few inches in length and contains 14 bytes of
information, not 14Kbytes, not 14Mbytes...14bytes.
Memory addressing.
Today's memory chips can contain thousands, millions or even more bits. We need
some means by which to access the desired bits and only the desired bits at the
appropriate time. Fig 7.8 in your text shows a simple addressing model. As you might
imagine, actual addressing circuits in modern computers are considerably more
complex than the one shown below, but operate in much the same way.
The memory chip shown here consists of 256 rows of bits by 256 columns of bits. This
particular addressing scheme utilizes an 8-bit address bus. Accessing the desired bit
consists of two separate operations. First, the 8 bit address for the appropriate column
appears on the address bus and is latched into the 8-bit column register by pulsing
(initially HI, then LO for a short time, and then back to HI) the CAS (Column Address
Strobe). This byte of information is fed into a 8 X 256 decoder which activates one and
only one of the 256 columns of bits. Next, the 8-bit row address appears on the
address bus and by pulsing the RAS (Row Address Column) pin, that address is latched
into the 8-bit row register. This data now passes to the 8 X 256 row decoder and one
and only one of the 256 rows is activated. At the intersection of the chosen column and
row, 1 bit has now been chosen to be accessed, either to be read or written to. This
choice is determined by the Read/Write pin which is controlled by the microprocessor.
Now imagine 8 of these 256 X 256 memory chips lined up in a row with them all sharing
the same address bus and RAS, CAS and Read/Write pins. Now instead of accessing
only 1 bit of data at a time, each memory chip would supply 1 of 8 bits, correspondingly
addressed, resulting in a byte of information being supplied to the data bus at the same
time. Naturally, the same addressing scheme could be used for a 16 bit word of data by
lining up 16 of these memory chips or a 32 bit by using 32 memory chips, etc. Of
course, the data busses for these examples would need to be correspondingly wide.