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DUBLIN CITY UNIVERSITY SEMESTER TWO EXAMINATIONS 2008 MODULE: Digital Circuits and Systems (EE201) COURSE: B.Eng in Mechatronic Engineering YEAR: 3(three) EXAMINERS: Mr David Bermingham (ext. 7692) Dr. R. Millar Dr. F. Devitt Dr. F. Owens TIME ALLOWED: 2 Hours INSTRUCTIONS: Answer FOUR questions. All questions carry equal marks Requirements for this paper Please tick (X) as appropriate Log Table Graph Paper Attached Answer Sheet Statistical Tables Floppy Disk Actuarial Tables THE USE OF PROGRAMMABLE OR TEXT STORING CALCULATORS IS EXPRESSLY FORBIDDEN Please note that where a candidate answers more than the required number of questions, the examiner will mark all questions attempted and then select the highest scoring ones. PLEASE DO NOT TURN OVER THIS PAGE UNTIL YOU ARE INSTRUCTED TO DO SO EE201 - Digital Circuits and Systems Page 1 of 3 Question 1 1(a) Describe, using a diagram, the structure and operation of a CMOS NOR gate 1(b) Describe the three components of CMOS power dissipation. Name 3 methods of reducing power consumption within CMOS circuits? 1(c) Which of the two circuits shown in table 1 has the lowest power consumption? You can assume all MOSFET are identical and switch the same amount of times Parameter Static (mW) Gate Capacitance (pF) Frequency (MHz) Supply Voltage (V) Average Switching Short (mW) Circuit A 1 2 100 3.3 0.5 0 [8 marks] [12 marks] [5 marks] Circuit B 1 2 500 1.8 0.5 0 [Total marks: 25] Question 2 2(a) Using a 2-1 Line multiplexer only, generate the following function: [10 marks] F A.B.C.D BCD ABCD ABC 2(b) Design a 2-channel 2-bit Multiplexer using 2-to-1 line Multiplexers only. [7 marks] 2(c) How would the function in part 2(A) be implemented within a Xilinx FPGA Logic Slice? [8 marks] [Total marks: 25] EE201 - Digital Circuits and Systems Page 2 of 3 Question 3 3(a) Describe an algorithm for multiplying two floating point numbers stored using the IEEE 754 Single Precision Format. [12 marks] 3(b) Using this algorithm, show the steps required to multiply: 4.5 * 10 [8 marks] 3(c) Outline 3 issues which should be considered when utilizing floating point numbers? [5 marks] [Total marks: 25] Question 4 4(a) Design an 8-bit barrel shifter capable of performing arbitrary Arithmetic Shift Right (ASR), Logical Shift Right (LSR), Logical Shift Left (LSL) and rotate right (ROR) [12 marks] 4(b) How is the rotate function extended to allow rotate with carry (RRX) to be carried out? [8 marks] 4(c) How does placing the barrel shifter on one of the ALU input bus improve the performance of an ARM microprocessor? What is the major disadvantage with this placement? [5 marks] [Total marks: 25] Question 5 5(a) Briefly describe the dynamic RAM cell and its operation. How does it compare with a single static RAM cell in terms of area, speed, control circuitry and power? [12 marks] 5(b) Design an 8-bit wide * 64 work DRAM using 1-bit * 64 word DRAM arrays? Indicate all control signals. [5 marks] 5(c) Describe how multiplexed addressing is used within DRAM memory? What additional signals are needed when using such a scheme? What Additional Registers are required? [8 marks] [Total marks: 25] IEEE -754 Single Precision Format S E E E E E E E E M M M M M M M M M M M M M M M M M M M M M Where S is the sign bit, E represent the biased exponent and the M bits store the floating point Mantissa EE201 - Digital Circuits and Systems Page 3 of 3 M M