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AEM10940
Highly Efficient, Dual Regulated Output,
Ambient Energy Manager
Preliminary
Data Sheet
FEATURES
DESCRIPTION
Ultra-low-power start-up
- Cold start from 380 mV input voltage and 11 µW input
power (typical)
Ultra-low-power Boost regulator
- Configurable MPPT with single-pin programming
- Open circuit voltage sensing for MPPT
- Input voltage operation range from 100 mV to 2.5 V
Integrated LDO regulator at low voltage
The AEM10940 harvests the available input power up to
50 mW. It integrates an ultra-low-power Boost converter to
charge a storage element, such as a Li-Ion battery, a thin film
battery or a super- or conventional capacitor. The Boost
converter operates with input voltages in a range of 100 mV to
2.5 V. With its unique cold-start circuit, it can start operating
with empty storage elements at an input voltage as low as
380 mV and an input power of just 11 µW.
- 1.8 V, high efficiency
- Up to 10 mA load current
Integrated LDO regulator at high voltage
- Configurable from 2.2 V to 4.2 V
- Up to 80 mA load current with 300 mV drop-out
- Power gated by external control
Flexible energy storage management
The low voltage supply typically drives a microcontroller at
1.8 V. The high voltage supply typically drives a radio
transceiver at a configurable voltage. Both are driven by highly
efficient LDO (Low Drop-Out) regulators for low noise and high
stability.
- Programmable overcharge and overdischarge
protection
- For any type of rechargeable battery or
(super)capacitor
- Fast supercapacitor charging
Configuration pins determine various operating modes by
setting predefined conditions for the energy storage element
(overcharge or overdischarge), and by selecting the voltage of
the high voltage supply. However, special modes can be
obtained at the expense of a few configuration resistors.
Smallest footprint, smallest BOM
- Only seven passive external components
APPLICATIONS
 Harvesting from
photovoltaic cell (PV)
 Industrial monitoring
 Indoor geolocation
The AEM10940 is an integrated energy management subsystem
that extracts DC power from PV cells to simultaneously store
energy in a rechargeable element and supply the system with
two independent regulated voltages. This allows product
designers and engineers to extend battery lifetime and
ultimately get rid of the primary energy storage element in a
large range of wireless applications like industrial monitoring,
geolocation, home automation, wearables...
The chip integrates all the active elements for powering a
typical wireless sensor. With only seven external components,
integration is maximum, footprint and BOM are minimum,
optimizing the time-to-market and costs of WSN designs in all
markets.
 Home automation
 Wearables
 E-health monitoring
 Energy-autonomous
Wireless Sensor Nodes
(WSN)
Five identical capacitors and two inductors are required,
available respectively in the small 0402 and 0603 SMD formats.
The AEM10940 comes in a 24-pin packaging option using
space-saving quad-flat-no-leads packages (QFN).
LOWEST PART-COUNT APPLICATION CIRCUIT
SET_OVCH SET_CHRDY SET_OVDIS FB_HV
SRC
PV Cell
LBOOST
BUFSRC
Li-Ion
Battery
LOBATT
SWBOOST
LVRDY
CSRC
BOOST
NC
BATT
AEM10940-QFN24
CBOOST
HVRDY
LVOUT
LBUCK
Micro- Vss
controller
VDD
CLV
SWBUCK
BUCK
CBUCK
ENHV
SELMPP
HVOUT
CFG2
CFG1
CFG0 STONBATT GND
Radio Vss
Transceiver
VDD
CHV
Figure 1 - Application Circuit
Document DS_AEM10940_REV1.1
Page 1 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
FIGURES
TABLE OF CONTENTS
Features ......................................................................................... 1
Applications ................................................................................. 1
Description ................................................................................... 1
Figure 1 - Application Circuit .....................................................1
Figure 2 - Pinout Diagram ............................................................5
Figure 3 - Functional Block Diagram ......................................6
Figure 4 - Power Path.....................................................................7
Lowest part-count Application Circuit ............................ 1
Figure 5 - Operating Regions ......................................................7
Table of Contents....................................................................... 2
Figure 6 - Charge Management State Diagram ...................8
Figures .......................................................................................... 2
Tables ............................................................................................ 2
Absolute Maximum Ratings .................................................. 3
Thermal Resistance .................................................................. 3
Recommended Operating Conditions .............................. 3
Figure 7 - Custom Configuration Resistors ....................... 10
Figure 8 - Power Gating Scheme ............................................ 11
Figure 9 - Example Application 1 .......................................... 12
Figure 10 - Example Application 2 ........................................ 12
Figure 11 - Startup Timing ....................................................... 13
Figure 12 - Shutdown Timing.................................................. 13
Electrical Characteristics ....................................................... 4
Figure 13 - Boost Efficiency at 2.8 V..................................... 14
Pin Configuration and Description .................................... 5
Figure 14 - Boost Efficiency at 3.6 V..................................... 14
Functional Block Diagram ..................................................... 6
Figure 15 - Boost Efficiency at 4.1 V..................................... 14
Theory of Operation ................................................................. 6
Power Path ................................................................................. 7
Operating regions ................................................................... 7
Configuration ............................................................................ 8
Charge Management State Machine ............................... 8
Startup Mechanism ................................................................ 8
Overvoltage Protection ........................................................ 9
Shutdown Mechanism........................................................... 9
MPP and Boost Converter Regulation ........................... 9
Buck Converter Regulation ................................................ 9
Low Voltage Output ............................................................... 9
High Voltage Output............................................................... 9
Application Information ...................................................... 10
Built-in Configurations .......................................................10
Custom Configuration .........................................................10
Power Gating ...........................................................................11
Energy Source Information ..............................................11
Storage Element Information ..........................................11
External Inductors Information .....................................11
External Capacitors Information ...................................11
Figure 16 - LV efficiency versus battery voltage ............ 14
Figure 17 - LV Efficiency versus output current ............. 14
Figure 18 - LV LDO Load Regulation .................................... 14
Figure 19 - HV LDO Load Regulation ................................... 14
TABLES
Table 1 - Absolute Maximum ratings ......................................3
Table 2 - Thermal Data ..................................................................3
Table 3 - Recommended Operating Conditions .................3
Table 4 - Electrical Characteristics ..........................................4
Table 5 - Pins description.............................................................5
Table 6 - Usage of CFG2 .................................................................8
Table 7 - Usage of SELMPP ..........................................................9
Table 8 - Usage of CFG2, CFG1, CFG0 ................................... 10
Table 9 - Customization: Resistors to Voltages ............... 10
Table 10 - Customization: Voltages to Resistors ............ 10
Table 11 – Static Power Schemes .......................................... 11
Table 12 - Threshold Voltages, Example 1 ........................ 12
Table 13 - Threshold Voltages, Example 2 ........................ 12
Typical Application Circuits .............................................. 12
Example Circuit 1 ..................................................................12
Example Circuit 2 ..................................................................12
Performance Data .................................................................. 13
Startup Timing Diagram ....................................................13
Shutdown Timing Diagram ..............................................13
Boost Conversion Efficiency ............................................14
Low Voltage Conversion Efficiency (Includes LDO
and Buck Converter)............................................................14
Low Voltage LDO Load Regulation ...............................14
High Voltage LDO Load Regulation ..............................14
Document DS_AEM10940_REV1.1
Page 2 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
ABSOLUTE MAXIMUM RATINGS
Parameter
Vsrc
Operating junction temperature
Storage temperature
THERMAL RESISTANCE
Rating
Package
𝚯𝐉𝐀
𝚯𝐉𝐂
Unit
2.75 V
-40°C to +125°C
-65°C to +150°C
QFN24
tbd
tbd
°C/W
Table 2 - Thermal Data
Table 1 - Absolute Maximum ratings
ESD CAUTION
ESD (ELECTROSTATIC DISCHARGE) SENSITIVE DEVICE
These devices have limited built-in ESD protection and damage may thus occur on devices subjected to high energy
ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
External Components
Min
Typ
Capacitance of the source buffering external capacitor
8
10
µF
Capacitance of the Boost converter external capacitor
8
10
µF
Inductance of the Boost converter external inductor
4
10
Capacitance of the Buck converter external capacitor
8
10
Inductance of the Buck converter external inductor
4
10
25
µH
CLV
Capacitance of the external capacitor decoupling the low
voltage LDO regulator
8
10
14
µF
CLH
Capacitance of the external capacitor decoupling the high
voltage LDO regulator
8
10
14
µF
RT
Equal to R1 + R2 + R3 + R4 (see fig. 3)
Resistance of the optional resistor ladder setting the charge
management thresholds voltage in custom configuration
1
10
100
MΩ
RV
Equal to R5 + R6 (see fig. 3)
Resistance of the optional resistor divider setting the HV
output voltage in custom configuration
1
10
40
MΩ
Logic High
Vlv-0.25
Vlv
2.5
Logic Low
-0.25
0
0.25
CSRC
CBOOST
LBOOST
CBUCK
LBUCK
Max
25
Unit
µH
µF
Logic input pins
VenhvIH
VenhvIL
Vcfg H
Vcfg L
Logic input levels on the ENHV control input1
Logic input levels on configuration inputs
SELMPP, CFG0, CFG1, CFG2
Logic High
Connect to BUCK
Logic Low
Connect to GND
V
Table 3 - Recommended Operating Conditions
Note 1: ENHV can be dynamically driven by a logic signal issued from the LV domain. Full rail-to-rail logic swing is
recommended to avoid increasing the quiescent current. For a static usage, connect to BUCK (High) or GND (Low).
Document DS_AEM10940_REV1.1
Page 3 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Power conversion
Conditions
Min
Vsrc
Vsrc
Voltage across the energy source
During coldstart
380
2500
After coldstart
100
2500
PsrcCS
Source power required for cold
start
Vboost
Vbuck
Voltage on the BOOST node
Voltage on the BUCK node
During coldstart
Typ
Max
11
Unit
mV
µW
During normal
operation
2.5
Rechargeable battery
2.5
4.5
V
0
4.5
V
800
ms
2
4.75
2.2
2.5
V
Storage element
Vbatt BAT
Vbatt CAP
Voltage on the storage element
Tcrit
Time before shutdown after
LOBATT asserted
Capacitor
400
600
Low-voltage LDO regulator
Vlv
Voltage on the LVOUT output
Ilv
Load current from the LVOUT
output
1.8V
300mV dropout
V
0
10
mA
2.2V
Vbatt-0.3
V
0
80
mA
High-voltage LDO regulator
Vhv
Voltage on the HVOUT output
Ilv = 30mA
Ihv
Load current from the HVOUT
output
300mV dropout
Logic output pins
VOH
VOL
Logic output levels on the status
outputs LOBATT, LVRDY, HVRDY
Logic High
Logic Low
1.7
0.1
V
Table 4 - Electrical Characteristics
Document DS_AEM10940_REV1.1
Page 4 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
PIN CONFIGURATION AND DESCRIPTION
BATT
LOBATT
23
NC
24
HVOUT
GND
FB_HV
AEM10940-QFN24
Package QFN24 5 x 5 mm
22
21
20
19
SET_OVCH
1
18
HVRDY
SET_CHRDY
2
17
LVRDY
SET_OVDIS
3
16
ENHV
BUFSRC
4
15
LVOUT
SRC
5
14
STONBATT
SWBOOST
6
13
CFG0
AEM10940
7
8
9
10
11
12
SELMPP
BOOST
SWBUCK
BUCK
CFG2
CFG1
Top View
Figure 2 - Pinout Diagram
Exposed pad should be connected to Ground
NAME
PIN
NUMBER
FUNCTION
Power pins
SRC
5
Connection to the harvested energy source (PV cell)
BUFSRC
4
Connection to a capacitor buffering the energy source, input of the Boost converter
SWBOOST
6
Switching node of the Boost converter
BOOST
8
Output of the Boost converter, input of the Buck converter, input of the high voltage
LDO regulator, internally connectable to BATT
BATT
20
SWBUCK
9
Connection to the energy storage element, battery or capacitor
Cannot be left floating, see application information page 11
Switching node of the Buck converter
BUCK
10
Output of the Buck converter, input of the low voltage LDO regulator
HVOUT
21
Output of the high voltage LDO regulator, typically powering the radio subsystem
LVOUT
15
Output of the low voltage LDO regulator, typically powering the microcontroller
14
Pin reserved for future use. Connect to ground.
Configuration pins
STONBATT
SELMPP
7
CFG2
11
CFG1
12
CFG0
13
Selection of the MPP ratio, see specification page 9
Selection of the built-in threshold voltages, see specification
page 10
SET_OVCH
1
Node to customize the OverCharge voltage threshold
SET_CHRDY
2
Node to customize the ChargeReady voltage threshold
SET_OVDIS
3
Node to customize the OverDischarge voltage threshold
FB_HV
Cannot be left floating
See application
information page 10
23
Feedback node to customize the high voltage LDO regulator
16
Active high logic input to enable operation of the high
voltage LDO regulator
LOBATT
19
Logic output signaling imminence of shutdown because of insufficient energy
HVRDY
18
Logic output signaling the validity of the high voltage LDO regulator
LVRDY
17
Logic output signaling the validity of the low voltage LDO regulator
Control pins
ENHV
See application
information page 11
Status pins
Other pins
GND
NC
24
Exposed Pad
22
Ground connection, should be solidly tied to the PCB ground plane
Not connected, leave open or tie to ground
Table 5 - Pins description
Document DS_AEM10940_REV1.1
Page 5 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
FUNCTIONAL BLOCK DIAGRAM
LBOOST
CSRC
BUFSRC
SRC
CBOOST
BOOST
SWBOOST
BATT
Cold Start
Energy
Source
MPP
Control
Energy
Storage
Storage
Control
Boost
Control
SWBUCK
SELMPP
Power Management Controller
Buck
Control
STONBATT
Vboost
Optional
LBUCK
1 V Ref
R4
1 V Ref
SET_OVDIS
Vbuck
BUCK
Vbuck
CBUCK
R3
SET_CHRDY
LVOUT
CLV
R2
SET_OVCH
Low Voltage
LDO Control
LV
Load
HVOUT
R1
State Control
CHV
Vboost
GND
HV
Load
Voltage
Reference
1 V Ref
CFG2
Optional
CFG1
CFG0
R6
FB_HV
High Voltage
LDO Control
ENHV
HVRDY
LVRDY LOBATT
R5
Microcontroller
Figure 3 - Functional Block Diagram
THEORY OF OPERATION
The AEM10940 is a full-featured energy efficient power
management subsystem able to charge a storage
element (battery or supercapacitor, connected to BATT)
from an energy source (connected to SRC), typically a
miniaturized energy harvester (PV cell). The device
manages the transfer of energy from the source and the
storage element towards two power supply outputs
(LVOUT and HVOUT) at different operating voltages.
Through four configuration pins (CFG2, CFG1, CFG0 and
SELMPP), the user assigns a particular operating mode
among a selection that covers most application
Document DS_AEM10940_REV1.1
requirements, without any dedicated external
component. Special modes are achieved with the
optional high-valued resistors R1 to R6 (connected to
SET_OVCH, SET_CHRDY, SET_OVDIS and FB_HV).
A logic control pin is provided (ENHV) to activate or
deactivate the LDO regulator that feeds the high voltage
system load.
The status of these regulators is reported through
dedicated status pins (HVRDY and LVRDY). An
additional status (LOBATT) reports when the subsystem
is about to shut down due to energy shortage.
Page 6 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
POWER PATH
Vbatt
BATT
Q2
Q7
Energy
Storage
Boost
Converter
Q4
Vsrc
SRC
Energy
Source
Q1
BUFSRC
LBOOST
Buck
Converter
High Voltage
LDO Regulator
Vhv
CHV
SWBUCK
LBUCK
Q8
BUCK
LVOUT
Vlv
CBOOST
CSRC
HV
Load
Q5
BOOST
SWBOOST
HVOUT
CBUCK
Low Voltage
LDO Regulator
Q6
Q3
CLV
LV
Load
Figure 4 - Power Path
The above diagram depicts a simplified view of the
internal power path of the AEM10940.
The energy source is connected to SRC and delivers
power to the subsystem at optimal levels of voltage
(Vsrc) and current (Isrc), the so-called MPP (Maximum
Power Point). Periodically, the MPP control circuit
disconnects the source from the pin BUFSRC with the
transistor Q1, in order to measure the open-circuit
voltage of the harvester. BUFSRC is decoupled by the
capacitor CSRC, which smooths the voltage against the
current pulses induced by the Boost converter.
The heart of the power path is a cascade of two regulated
switching converters, namely the Boost converter and
the Buck converter.
Vbuck feeds the low voltage LDO regulator that powers
its load through the pin LVOUT. This regulator delivers
a clean fixed voltage (Vlv) of 1.8 V at a maximum current
of 10 mA. The series pass transistor of the regulator is
Q8, and the output is decoupled by the external
capacitor CLV.
The Boost and Buck converters as well as the LDO
regulators demonstrate excellent power conversion
ratios, as shown in the performance data section (page
14).
The operation of the AEM10940 is best understood by
examining the behavior over the voltage span of the
BOOST node, which is depicted below.
OPERATING REGIONS
The Boost (or step-up) converter elevates the voltage
available at BUFSRC to a level suitable to charge the
storage element, in the range 2.2 V to 4.75 V, according
to the selected operating mode. This voltage (Vboost) is
available at the pin BOOST. The switching transistors of
the Boost converter are Q3 and Q4, with the switching
node available externally at SWBOOST. The reactive
power components are the external inductor and
capacitor LBOOST and CBOOST.
Vboost
OverCharge
threshold
ChargeReady
threshold
The storage element is connected to the pin BATT, at a
voltage Vbatt. This node is linked to BOOST through the
transistor Q2. In normal operation, this transistor
effectively shorts the battery to the BOOST node
(Vbatt = Vboost). When energy harvesting is occurring,
the Boost converter delivers a current that is shared
between the battery and the loads. Q2 is switched off to
disconnect the battery when there is a risk of
overdischarge.
OverDischarge
threshold
Document DS_AEM10940_REV1.1
3V
Vtop+
Vovch
VtopVchrdy
Vovdis
Top Voltage
Region
Boost-Buck
Region
No Buck
Region
2V
The Buck (or step-down) converter lowers the voltage
from Vboost to a constant value Vbuck of 2.2 V. This
voltage is available at the pin BUCK. The switching
transistors of the Buck converter are Q5 and Q6, with the
switching node available externally at SWBUCK. The
reactive power components are the external inductor
and capacitor LBUCK and CBUCK.
Vboost feeds the high voltage LDO regulator that powers
its load through the pin HVOUT. This regulator delivers
a clean voltage (Vhv) adjustable between 2.2 V and
Vbatt-0.3 V with a maximum current of 80 mA. The
series pass transistor of the regulator is Q7, and the
output is decoupled by the external capacitor CHV.
4V
1V
Cold Start
Region
0V
Figure 5 - Operating Regions
The Cold Start region corresponds to a state where all
nodes are deeply discharged. As soon as a sparse
amount of energy becomes available at the source pin,
the cold start mechanism, which involves a charge
pump, raises Vboost up to a voltage of 2 V.
Page 7 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
At that stage, the Boost regulator is switched on and
continues the process of charging the BOOST node with
the energy delivered by the source. However, the Buck
regulator is not yet activated, but its transistor Q5 is on,
which allows the BUCK node to get charged as well,
through the inductor LBUCK. This occurs in the No Buck
region.
When both Vboost and Vbuck reach a voltage level of
2.4 V, the Buck regulator is switched on, and the device
enters the Boost-Buck region. Under control of the
charge manager, the transistor Q2 connects the battery
to the BOOST node, and the normal operating mode
takes place. Both switching converters are active. See
page 9 for Boost and Buck regulation.
As long as this normal operating mode is active, Vboost
reflects Vbatt. Three voltage levels act as thresholds for
the charge management state machine, described in
thorough details below. If Vboost decreases below the
OverDischarge level, a shutdown occurs. When Vboost
reaches the ChargeReady level, the LDO regulators are
activated. If Vboost increases above the OverCharge
level, a mechanism is triggered to prevent further
voltage increase, as materialized by the Top Voltage
region.
The type of storage element in use dictates the value of
the three thresholds, to obtain optimal performance and
maximal protection. In addition, the lower threshold
should be chosen high enough to ensure proper
operation of the high voltage LDO regulator, as it is fed
by the BOOST node.
CONFIGURATION
Four voltage levels can be selected to fit the application
needs, namely:
- The OverDischarge threshold
- The ChargeReady threshold
- The OverCharge threshold
- The voltage provided at HVOUT
In the built-in configuration mode, four combinations of
these voltage levels are hardwired and selected through
the CFG0 and CFG1 configuration pins, covering most
application cases.
A custom configuration mode is possible, as instructed
by CFG2.
CFG2 High
Built-in Configuration Mode
CFG2 Low
Custom Configuration Mode
Table 6 - Usage of CFG2
Customizing the threshold levels involves a resistor
ladder (R1 to R4) connected to BOOST and feeding
SET_OVCH, SET_CHRDY and SET_OVDIS, as shown in the
functional block diagram.
Customizing the voltage at HVOUT involves two
resistors (R5 and R6) feeding FB_HV, the feedback node
of the low voltage LDO regulator, as shown in the
functional block diagram.
In addition, a dedicated configuration pin SELMPP is
provided to select the MPP tracking mode suitable for
the type of energy harvester in use.
CHARGE MANAGEMENT STATE MACHINE





Unloaded
Voltage Rising
Battery DISCONNECTED
Boost Converter ON
LV LDO Regulator OFF
HV LDO Regulator OFF
LOBATT pin status LOW
Vboost > 2 V
Vboost > Vtop+





After Tcrit
(600 ms)
Cold Start
Connecting
Storage Element
Battery CONNECTED
Boost Converter ON
LV LDO Regulator OFF
HV LDO Regulator OFF
LOBATT pin status LOW
Vboost < Vovdis
Entering
Shutdown





Vboost > Vchrdy





Normal
Operation
Battery CONNECTED
Boost Converter ON
LV LDO Regulator ON
HV LDO Regulator AVAILABLE
LOBATT pin status LOW
Vboost > Vtop+
Vboost < Vtop-
Battery CONNECTED
Boost Converter ON
LV LDO Regulator ON
HV LDO Regulator AVAILABLE
LOBATT pin status HIGH





Top Voltage
Operation
Battery CONNECTED
Boost Converter OFF
LV LDO Regulator ON
HV LDO Regulator AVAILABLE
LOBATT pin status LOW
Figure 6 - Charge Management State Diagram
The diagram above shows in details the sequencing of
the charge manager as a function of the changes in
Vboost.
STARTUP MECHANISM
When the energy contained in the storage element is
exhausted and there is no available energy to be
harvested, the AEM10940 is down. It will recover
operation through a very efficient cold start engine.
A tiny power of 11 µW under just 380 mV is enough to
trigger this engine, which charges CBOOST and CBUCK
Document DS_AEM10940_REV1.1
up to a voltage level of 2 V, leveraging a proprietary
voltage step-up charge pump.
When Vboost reaches 2 V, as indicated in the state
diagram, the charge manager enters “Unloaded Voltage
Rising”, completing the cold start sequence. The Boost
converter gets enabled, which rises further the voltage
on BOOST. All loads are maintained inactive, including
the storage element.
The battery will not be shorted to the BOOST node until
Vboost reaches the OverCharge level. In the diagram, this
corresponds to the transition to “Connecting Storage
Element”.
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Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
At that moment, the BOOST node reflects the battery
voltage, and the charge manager checks that Vboost is
above the ChargeReady level. This is normally not the
case, as the starting point was a cold start or a shutdown.
Once Vboost exceeds Vchrdy, the battery is considered
as sufficiently charged to support system operation, and
“Normal Operation” takes place. Both LDO regulators
are able to supply power to the loads.
OVERVOLTAGE PROTECTION
To prevent damage to the battery and to the internal
circuitry when the charge is complete, the charge
manager maintains Vboost between Vtop+ and Vtop-.
This small voltage range comes from a hysteresis
assigned to the OverCharge threshold. This is indicated
in the state diagram as a toggling between the two
rightmost states. In “Normal Operation”, the Boost
converter is enabled and feeds the BOOST node,
charging the battery. In “Top Voltage Operation”, the
converter is disabled, and the voltage drops due to the
load consumption.
SHUTDOWN MECHANISM
To prevent deep discharge leading to damage to the
battery and malfunction of the high voltage LDO
regulator, the charge manager takes an emergency
action when Vboost drops below Vovdis. This is
indicated in the state diagram as a transition from
“Normal Operation” to “Entering Shutdown”. Both LDO
regulators
remain
enabled.
This
allows
a
microcontroller powered by LVOUT to get interrupted
by the low-to-high transition of the status output
LOBATT, and take all appropriate actions before power
shutdown.
An internal timer counts down a delay of at least 400 ms
(Tcrit) before determining a state transition to
“Unloaded Voltage Rising”, where the battery is
disconnected and the LDO regulators are disabled. At
this point, the BOOST node is completely unloaded,
giving to the Boost converter the opportunity to collect
energy from the source and restore the required voltage.
MPP AND BOOST CONVERTER REGULATION
Except during cold start and in the “Top Voltage
Operation” condition, the Boost converter is activated.
The regulation of the Boost converter involves a
reference voltage Vmpp issued by the MPP internal
module.
It is known that the energy source (PV cell) should be
operated at a precise point in its I/V curve in order to
deliver the maximum power. This is the Maximum
Power Point (MPP) of the source.
Vmpp is the voltage level of the MPP, and depends on the
current level of illumination of the PV cell. The MPP
module evaluates Vmpp as a given fraction of Voc, the
open circuit voltage of the source. By temporarily
disconnecting the source with Q1, the MPP module gets
and maintains a knowledge of Vmpp. This sampling
occurs regularly.
Except during this sampling process, the voltage across
the source, Vsrc, is continuously compared to Vmpp.
When Vsrc exceeds Vmpp by 25 mV, the Boost converter
Document DS_AEM10940_REV1.1
is switched on, extracting electrical charge from the
source and lowering its voltage. When Vsrc falls below
Vmpp by 25 mV, the Boost converter is switched off,
allowing the harvester to accumulate new electrical
charges into CSRC, which restores its voltage.
In this manner, the Boost converter regulates its input
voltage so that the electrical current (or flow of electrical
charge) that enters the Boost converter yields the best
power transfer from the harvester in any ambient
conditions.
The AEM10940 supports any Vmpp level in the range
0.1 V to 1.3 V. It provides a choice among two values for
the fraction Vmpp/Voc through the configuration pin
SELMPP.
SELMPP Vmpp/Voc
High
90 %
Low
80 %
Table 7 - Usage of SELMPP
Application
PV Harvesting
BUCK CONVERTER REGULATION
The Buck converter charges CBUCK from the BOOST
node. As long as Vboost is below 2.4 V, the transistor Q5
is turned on so that the BOOST and BUCK pins are
effectively shorted. Once Vboost rises above 2.4 V, the
Buck converter is enabled in switching mode. It starts
transferring charges to CBUCK when Vbuck falls below
2.175 V until it reaches 2.225 mV. Then the converter
stops, leaving CBUCK delivering power to the load until
Vbuck drops back to 2.175 V.
LOW VOLTAGE OUTPUT
The load connected to the LVOUT output (typically a
microcontroller) is supplied by the low voltage LDO
regulator at 1.8 V. The maximum deliverable current is
10 mA.
The regulator operates only when the LV LDO Regulator
is ON, as reported in the charge management state
machine (page 8).
Upon enabling the regulator, the CLV decoupling
capacitor is first preloaded to 1.8 V to avoid large inrush
current. After preload, the LVRDY status pin is asserted,
which can be used by the load as a power-good signal.
HIGH VOLTAGE OUTPUT
The load connected to the HVOUT output (typically a
radio transceiver) is supplied by the high voltage LDO
regulator at a selectable voltage. In the built-in
configuration mode, an output voltage of 2.5 V or 3.3 V
can be chosen. In the custom configuration mode, any
value from 2.2 V to (Vbatt – 0.3 V) is possible. The
maximum deliverable current is 80 mA.
The high voltage output can be deliberately enabled or
disabled with the logic control pin ENHV. However, the
regulator can only operate when it is available, as
reported in the charge management state machine
(page 8).
Upon enabling of the regulator, the CLH decoupling
capacitor is first preloaded to its target voltage to avoid
large inrush current. After preload, the HVRDY status is
asserted, which can be used by the load as a power-good
signal.
Page 9 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
APPLICATION INFORMATION
BUILT-IN CONFIGURATIONS
The pins CFG2, CFG1 and CFG0 are configuration logic inputs that have to be tied to GND (logic Low) or BUCK (logic High).
They cannot be left floating. The configuration is not intended to be switched during operation. The table below
summarizes the configuration options.
Configuration pins
Charge Management Threshold Voltages
High voltage
Output Voltage
CFG1 CFG0
OverCharge
ChargeReady OverDischarge
Low
Low
4.50 V
3.92 V
3.00 V
2.50 V
Low
High
4.12 V
3.67 V
3.00 V
2.50 V
High
High
Low
4.12 V
4.05 V
3.60 V
3.30 V
High
High
4.12 V
3.67 V
3.60 V
3.30 V
Low
Low
Low
As per R1, R2, R3, R4
As per R5,R6
Low
High
Reserved for future revisions of the component.
Low
High
Low
Do not set the configuration to these combinations.
High
High
Table 8 - Usage of CFG2, CFG1, CFG0
CFG2
Typical use
Capacitor, Supercapacitor
Li-Ion cell, 2.5 V radio
Solid State battery
Li-Ion cell, 3.3 V radio
Custom usage
When predefined configuration is selected (CFG2 High), the resistor pins dedicated to custom configuration should be left
floating (SET_OVDIS, SET_CHRDY, SET_OVCH, FB_HV).
CUSTOM CONFIGURATION
When custom configuration is selected (CFG2 Low), all
six configuration resistors must be wired as follows:
BOOST
CBOOST
 Vovdis ≥ Vhv + 0.3 V
CFG2
CFG1
R4
To compute the resistance values, use the following
procedure:
CFG0
SET_OVDIS
R3
The threshold voltages Vovch, Vchrdy and Vovdis are
chosen to optimize and secure the operation of the
energy storage element. The output voltage Vhv is
chosen to fulfill the need of the HV load. Additionally, the
following constraint holds:
AEM10940-QFN24
SET_CHRDY
HVOUT
SET_OVCH
FB_HV
R2
Choose RT as the sum of R1, R2, R3, R4
R6
GND
R1
CHV HV
Load
1
R5 = RV (
)
Vhv
Figure 7 - Custom Configuration Resistors
ChargeReady Vchrdy
R1 + R2 + R3 + R4
R1 + R2
OverDischarge Vovdis
R1 + R2 + R3 + R4
R1 + R2 + R3
R6 = RV (1 −
1
)
Vhv
Table 10 - Customization: Voltages to Resistors
They establish the customized voltages as follows:
R1 + R2 + R3 + R4
R1
1
1
R2 = RT (
−
)
Vchrdy Vovch
1
R4 = RT (1 −
)
Vovdis
Choose RV as the sum of R5, R6
R5
OverCharge Vovch
1
R1 = RT (
)
Vovch
1
1
R3 = RT (
−
)
𝑉𝑜𝑣𝑑𝑖𝑠 Vchrdy
R5 + R6
R5
Table 9 - Customization: Resistors to Voltages
HV output Vhv
The resistor ratios are directly interpreted in Volts
because the internal voltage reference of the chip is
exactly 1 Volt.
In addition, the resistors should have high values to
make the additional power consumption negligible. The
recommended values should be such that:
 1 MΩ < R1 + R2 + R3 + R4 < 100 MΩ
 1 MΩ < R5 + R6 < 30 MΩ
Document DS_AEM10940_REV1.1
Page 10 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
POWER GATING
The HV power supply output can be enabled or disabled
through the control pins ENHV. Never leave ENHV in an
undetermined state.
The table below shows two possible static power
schemes:
ENHV
HV output
LV output
If enabled, the HV output delivers a voltage when its LDO
regulator is marked as AVAILABLE in the state diagram
of figure 6.
The LV output delivers a voltage when its LDO regulator
is marked as ON in the state diagram of figure 6.
The following scheme implements a dynamic control of
the HV power supply:
Vlv
CLV
LV
Load
STORAGE ELEMENT INFORMATION
It should be chosen so that its voltage does not fall below
the OverDischarge threshold even during occasional
peaks in the load current. If the internal resistance of the
storage element cannot sustain this voltage limit, it is
advisable to increase the value of the CBOOST capacitor
above 10 µF, or to buffer the battery with a capacitor.
The pin BATT that connects the storage element must
never be left open. If the application expects a
disconnection of the battery (e.g. because of a user
removable connector), the PCB should provide a
capacitor of at least 47 µF bypassing BATT to GND.
EXTERNAL INDUCTORS INFORMATION
AEM10940
ENHV
The AEM10940 is designed to accommodate any DC
energy source with a maximum power point (MPP) close
to 50% or 75% of the source open circuit voltage.
The energy storage element of the AEM10940 can be a
rechargeable battery, a supercapacitor or a large
capacitor (more than 100 µF).
Connected
Enabled
Enabled
to BUCK
Connected
Disabled
Enabled
to GND
Table 11 – Static Power Schemes
LVOUT
The voltage level supplied by the source during
harvesting should not exceed 2.5 V, even during MPP
sampling.
By design, the AEM10940 is designed to operate with
two standard miniature inductors of 10 µH.
HVOUT
Other inductance values are allowed, provided a
minimum of 4 µH is satisfied.
Vhv
Inductors must sustain a peak current of at least
150 mA. Low equivalent series resistance (ESR) is in
favor of the power conversion efficiency of the Boost and
Buck converters.
CHV HV
Load
EXTERNAL CAPACITORS INFORMATION
Figure 8 - Power Gating Scheme
The LV subsystem is enabled upon startup, and can
switch the HV subsystem on or off.
ENERGY SOURCE INFORMATION
The energy source must be able to supply the average
power required by the loads and the AEM10940 in order
to replace a battery as a primary energy source. The
storage element (a rechargeable battery or a
supercapacitor) supplies power when the source works
below the system power requirement, and gets
recharged when the source works above. The design
engineer should carefully analyze all power aspects of
the application to determine the features of the energy
harvester.
To wake up from a deep shutdown condition, the
AEM10940 requires the source to deliver a minimum of
11 µW at 380 mV to trigger and maintain the cold start
mechanism. However, when internal regulators are
working normally, and that the storage element is
sufficiently charged to supply the loads, the source
voltage may drop down to 100 mV.
Document DS_AEM10940_REV1.1
By design, the AEM10940 is designed to operate with
five identical standard miniature ceramic capacitor of
10 µF. The capacitor leakage should be small, as leakage
currents directly impact the quiescent current of the
subsystem.
CSRC
This capacitor acts as a small energy tank for the energy
source. It prevents large voltage fluctuations while the
Boost converter is switching. The recommended
minimum value is 10 µF.
CBOOST and CBUCK
These capacitors act as energy buffers for the Boost and
Buck converters respectively. They also reduce the
voltage ripple induced by the current pulses inherent to
the switched mode of the converters. The recommended
minimum value is 10 µF.
CHV and CLV
These capacitors ensure a good load regulation of the
high voltage and low voltage LDO regulators. Closedloop stability requires the value be in the range 8 µF to
14 µF.
Page 11 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
TYPICAL APPLICATION CIRCUITS
EXAMPLE CIRCUIT 1
EXAMPLE CIRCUIT 2
LBOOST
0.1 V < Vsrc < 2.5 V
SET_OVDIS SET_CHRDY SET_OVCH
BATT
SRC
PV Cell
CBATT
47 µF
Li-Ion
Battery
0.1 V < Vsrc < 2.5 V
AEM10940-QFN24
10 µH
CSRC
10 µF
3.00 V < Vboost < 4.12 V
HVOUT
SWBOOST
10 µH
CBUCK
10 µF
CBOOST
10 µF
Vss
SWBUCK
SELMPP
HVRDY
CFG2
LVRDY
1.2 MΩ
R5
R4
13 MΩ
Radio
Transceiver
2V7 Supply
Vss
R3
MicroController
4.7 MΩ
R2
LVOUT
12 MΩ
R1
SET_OVCH
1V8 Supply
Vlv = 1.8 V
CLV
10 µF
HVRDY
LVRDY
LBUCK
10 µH
CBUCK
10 µF
NC
Vbuck
=
2.2 V
VDD
MicroController
1V8 Supply
GPIO
LOBATT
Vss
SWBUCK
SELMPP
BUCK
Vss
GND
VDD
SET_CHRDY
LOBATT
CFG0
STONBATT
36 MΩ
10 µF
22 MΩ
FB_HV
VDD
GPIO
CFG1
R6
BOOST
SET_OVDIS
Vlv = 1.8 V
ENHV
BUCK
Vbuck
=
2.2 V
3 V < Vboost < 4.5 V
3V0 Supply
CLV
10 µF
CHV
Vhv = 2.7 V
HVOUT
VDD
LVOUT
Super
Capacitor
AEM10940-QFN24
Vhv = 2.5 V
CHV
Radio
10 µF Transceiver
LBUCK
SWBOOST
PV Cell
BOOST
CBOOST
10 µF
BUFSRC
SRC
BATT
FB_HV
BUFSRC
LBOOST
10 µH
CSRC
10 µF
CFG2
CFG1
ENHV
STONBATT GND
CFG0
NC
Figure 9 - Example Application 1
Figure 10 - Example Application 2
This circuit uses a built-in configuration scheme. It is
typical of systems that use standard components for
radio and energy storage.
This circuit uses the custom configuration scheme. It is
usually required for systems that use specific
components for radio and/or energy storage.
The energy source is a photovoltaic cell, and the storage
element is a standard Li-Ion battery cell. The radio
communication makes use of a transceiver that operates
from a 2.5 V supply.
The energy source is a photovoltaic cell, and the storage
element is a supercapacitor. The radio communication
makes use of a transceiver that operates from a 2.7 V
supply.
The built-in configuration corresponding to that use
case is [CFG1=Low, CFG0=High]. The resulting built-in
voltages are as follows:
The configuration pin CFG2 is tied to GND, determining
the custom configuration. Note that the pins CFG1 and
CFG0 are also tied to GND, as recommended.
OverCharge Vovch
4.12 V
ChargeReady Vchrdy
3.67 V
OverDischarge Vovdis
3.00 V
HV output Vhv
2.50 V
Table 12 - Threshold Voltages, Example 1
All six customization resistors are connected. With the
values shown in the diagram, resulting voltages are as
follows:
The pin SELMPP is tied to BUCK (logic High), selecting
an MPP ratio of 90 %, suitable for the particular PV cell
in use.
Upon startup, the microcontroller is enabled, as it is
supplied by the low voltage regulator, which is always
ON. The application software can enable or disable the
radio transceiver with the GPIO connected to ENHV.
It happens that the battery is connected with a cable that
can be possibly unplugged. Therefore, a 47 µF capacitor
(CBATT) is provided.
Document DS_AEM10940_REV1.1
OverCharge Vovch
4.49 V
ChargeReady Vchrdy
3.23 V
OverDischarge Vovdis
3.01 V
HV output Vhv
2.69 V
Table 13 - Threshold Voltages, Example 2
The pin SELMPP is tied to GND (logic Low), selecting the
MPP ratio of 80 %, suitable for the particular PV cell in
use.
Upon startup, both the microcontroller and the radio
transceiver are enabled. The low voltage regulator
(supplying the microcontroller) is always ON. The high
voltage regulator (supplying the radio transceiver) is ON
because ENHV is connected to BUCK.
Page 12 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
PERFORMANCE DATA
STARTUP TIMING DIAGRAM
6V
5V
4V
1. SOURCE connected
2. Cold Start
3. Boost Converter enabled
4. Buck Converter enabled
5. BOOST shorted to BATT
6. LVOUT precharge
7. LVRDY active
BATT
3V
BOOST
2V
LVOUT
1V
SOURCE
0V
7
2
0 ms
LVRDY
100 ms
200 ms
300 ms
Time
400 ms
Figure 11 - Startup Timing
SHUTDOWN TIMING DIAGRAM
6V
1. SOURCE disconnected
2. BATT falls below OverDischarge
5V
3. LVOUT disabled
BATT disconnected from BOOST
4. Buck Converter disabled
4V
BATT
3V
2V
1V
LVOUT
BOOST
1
0V
SOURCE
LOBATT
LVRDY
0s
1s
2s
3s
4s
Time
Figure 12 - Shutdown Timing
Document DS_AEM10940_REV1.1
Page 13 of 14
Copyright © 2016 e-peas SA
AEM10940
Preliminary Data Sheet
BOOST CONVERSION EFFICIENCY
ηBOOST
100 %
ηBOOST
100 %
80 %
80 %
Vboost = 2.8 V
Iscr = 100 µA
40 %
Vboost = 3.6 V
Iscr = 100 µA
40 %
Isrc = 1 mA
Isrc = 1 mA
Iscr = 10 mA
20 %
Iscr = 10 mA
20 %
0%
0%
0.00 V
0.25 V
0.50 V
0.75 V
1.00 V
0.00 V
1.25 V
Figure 13 - Boost Efficiency at 2.8 V
0.25 V
0.50 V
0.75 V
1.00 V
1.25 V
Figure 14 - Boost Efficiency at 3.6 V
ηBOOST
100 %
80 %
Vboost = 4.1 V
Iscr = 100 µA
40 %
Isrc = 1 mA
20 %
Iscr = 10 mA
0%
0.00 V
0.25 V
0.50 V
0.75 V
1.00 V
1.25 V
Figure 15 - Boost Efficiency at 4.1 V
LOW VOLTAGE CONVERSION EFFICIENCY (INCLUDES LDO AND BUCK CONVERTER)
ηLV
ηLV
100 %
100 %
80 %
80 %
Ilv = 100 µA
40 %
Ilv = 1 mA
Ilv = 10 mA
20 %
0%
Vbatt = 3.0V
40 %
Vbatt = 3.6 V
Vbatt = 4.1 V
20 %
0%
2.75 V
3.00 V
3.25 V
3.50 V
3.75 V
4.00 V
4.25 V
4.50 V
1 µA
LOW VOLTAGE LDO LOAD REGULATION
100 µA
1 mA
10 mA
Figure 17 - LV Efficiency versus output current
Figure 16 - LV efficiency versus battery voltage
Vlv
10 µA
HIGH VOLTAGE LDO LOAD REGULATION
Vhv
Vbatt = 3.6 V
Vbatt = 3.6 V
2.90 V
1.77 V
1 µA
10 µA
100 µA
1 mA
1 µA
10 mA
100 µA
1 mA
10 mA
100 mA
Figure 19 - HV LDO Load Regulation
Figure 18 - LV LDO Load Regulation
Document DS_AEM10940_REV1.1
10 µA
Page 14 of 14
Copyright © 2016 e-peas SA