Download 1. COMMON EMITTER TRANSISTOR CHARACTERISTICS

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
1. COMMON EMITTER TRANSISTOR
CHARACTERISTICS
Aim:
1. To plot the input and output static characteristics.
2. To calculate the input dynamic resistance from the input characteristics
and output dynamic resistance and current gain from the output
characteristics of the given transistor.
Apparatus Required:
Name of the
S.No
Specifications
Equipment/Component
Quantity
1
Transistor (BC 107)
Icmax=100mA
PD=300mw
Vceo=45V
Vbeo=50V
2
Resistors-39KΩ,1KΩ
Power rating=0.5w
Carbon type
1
3
Regulated Power Supply
0-30V,1A
1
4
Volt meters
0-1V, 0-10V
1
5
Ammeters
0-300µA, 0-10mA
1
1
Theory:
In common emitter configuration the emitter is common to both input and output.
For normal operation the Base-Emitter junction is forward biased and basecollector junction is reveres biased .The input characteristics are plotted between
IB and VBE keeping the voltage VCE constant. This characteristic is very similar to
that of a forward biased diode. The input dynamic resistance is calculated using
the formula
ri
= ∆ VBE / ∆ IB at constant VCE
The output characteristics are plotted between IC and VCE keeping IB constant.
These curves are almost horizontal. The output dynamic resistance is given by,
ro
=
∆VCE / ∆ IC at constant IB
At a given operating point, we define DC and AC current gains (beta) as follows
DC current gain βdc = IC / IB
ELECTRONIC DEVICES & CIRCUITS LAB
at constant VCE
1
DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
AC current gain βac = ∆ IC/ ∆ IB at constant VCE.
Circuit diagram:
Fig A: Transistor Common Emitter Configuration
Procedure:
a) Input Characteristics:
1. Connect the circuit as shown in fig A.
2. Keep the voltage VCE as constant at 2V by varying VCC.
3. Vary the input voltage, VBB in steps of 1V up to 10V
4. Measure the voltage, VBE from voltmeter and current, IB through the
ammeter for different values of input voltages
5. Repeat the step 3 and 4 for VCE values of 5V and 10V
6. Draw input static characteristics for tabulated values
7. At suitable operating point, calculate input dynamic resistance.
b) Output Characteristics:
1. Fix input base current, IB at constant value say at 10µA.
2. Vary the output voltage, VCC in steps of 1V from 0V up to10V.
3. Measure the voltage, VCE from voltmeter and current IC through the
ammeter for different values.
4. Repeat above steps 2and 3 for various values of IB=20µA and 30µA.
5. Draw output static characteristics for tabulated values
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Tabular forms:
a) Input Characteristics:
Applied
S.No
Voltage
VBB(V)
VCE = 2V
VCE = 5V
VCE = 10V
VBE(V)
IB(µA)
VBE(V)
IB(µA)
VBE(V)
IB(µA)
1
0
0
0
0
0
0
0
2
0.2
0.258
0
0.279
0
0.231
0
3
0.4
0.461
35
0.460
45
0.474
40
4
0.6
0.562
60
0.620
60
0.592
60
5
0.8
0.609
90
0.629
90
0.620
90
6
1.0
0.625
110
0.670
110
0.662
110
7
2.0
0.648
140
0.679
140
0.682
140
8
3.0
0.654
160
0.681
160
0.692
160
9
4.0
0.669
190
0.684
185
0.724
190
10
5.0
0.690
210
0.689
210
0.726
218
b) Output Characteristics:
S.
No
Applied
voltage
Vcc (V)
IB = 10µA
VCE(V)
IC(mA)
IB = 20µA
VCE (V) IC(mA)
IB = 30µA
VCE (V)
IC(mA)
1
0
0
0
0
0
0
0
2
0.2
0.02
0
0.02
0
0.02
0
3
0.4
0.06
0
0.05
0
0.04
0
4
0.6
0.08
1.0
0.08
2.2
0.05
2.6
5
0.7
0.1
3.2
0.09
4.5
0.06
4.6
6
0.8
0.12
5.0
0.1
6.2
0.07
6.5
7
1.0
0.21
6.2
0.15
7.0
0.12
7.5
8
2.0
0.31
6.5
0.18
7.5
0.17
7.8
9
3.0
0.51
6.7
0.29
7.7
0.28
9.9
10
4.0
0.68
6.8
0.34
8.5
0.33
10.0
11
5.0
0.88
6.9
0.49
8.9
0.39
10.5
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Model graphs:
Fig B: Input Characteristics
Fig C: Output Characteristics
Calculations:
a) Input Characteristics:
Input Resistance,
ri = ∆ VBE / ∆ IB at VCE constant
= (0.654-0.647) / (90-30) X 10-6
= 116Ω.
b) Output Characteristics:
Output dynamic resistance,
ro =
∆VCE / ∆ IC at IB constant
= (0.9-0.15) / (9.25-7.2) X10-3
= 365.85Ω.
Current gain,
β = ∆ IC / ∆ IB at VCE constant
= (8.8-6.8)10-3/10X10-6
= 200
Precautions:
1. Connections must be done very carefully.
2. Readings should be noted without parallax error.
3. The applied voltage, current should not exceed the maximum rating of the
given transistor.
Result:
Input and output characteristics are observed for the given transistor in
common emitter configuration. The input resistance, output resistance and the
current gain are calculated.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Inference:
It is observed from the input characteristics that as VCE increases, the curves are
shifted towards right side. This is due to the Early effect.
Questions & Answers:
1. List various operating regions of Transistor
A. Active region, cut-off region, and saturation region.
2. List various biasing circuits
A. Fixed bias, collector to base bias, and self bias.
3. Give Transistor current equation in CE configuration
A. IC =β IB + (1+β) ICEO.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
2. FULL WAVE RECTIFIER
Aim:
To observe the working of full wave rectifier with and without filter & calculate its
ripple factor
Apparatus Required:
S. No
Name of the Equipment/
Specifications
Quantity
Component
1.
Diode(1N4001)
VR (max)=1000V
1
IR(max)=50mA
2.
Resistor(1KΩ)
Power rating=0.5W
Carbon type
6-0-6V,500mA
1
3.
Transformer
4.
Capacitor(1000µF/25V)
1
Cathode Ray Oscilloscope
Electrolytic type,
Voltage rating= 1.6v
20MHz
5.
6.
Digital Multi meter
4 ½ digit
1
1
1
Theory :
In the full wave rectifier circuit the transformer has a center-tap in its secondary
winding. It provides out of phase voltages to the two diodes. During the positive half
cycle the input, the diode D2 is reverse biased it does not conduct. But diode D1 is in
forward bias and it conducts. The current flowing through D1 is also passes through
the load resistor, and a voltage is developed across it. During negative half cycle
diode D2 is forward biased and diode D1 is reverse biased. Now the current flows
through diode D2 and load resistor. The current flowing thought the load resistor RL
passes in the both half cycles. The DC voltage obtained at the output is given by Vdc
= 2Vm / π. Where Vm is peak AC voltage between center-tap point and one of the
diodes. It can be proved that the ripple factor of a full- wave rectifier is 0.482.The
output of the full-wave rectifier contains an appreciable amount of AC voltage in
addition to DC voltage. But, the required output is pure DC with out any AC voltage in
it. The AC variation can be filtered by a shunt capacitor filter connected in shunt with
the load. The capacitor offers low impedance path to the AC components of current.
Most of the AC current passes through the shunt capacitor. All the DC current passes
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
through the load resistor. The capacitor tries to maintain the output voltage constant
at Vm.
Circuit Diagrams:
Fig A: Full wave Rectifier without Filter
Fig B: Full wave Rectifier with Filter
Procedure :
1. Connect the circuit as shown in Fig A.
2. Apply the supply voltage 230V, 50Hz at the primary winding of the
transformer.
3. Connect the CRO at the secondary winding of the transformer and measure
the maximum voltage (Vm) and time period (T) at the input. Calculate the RMS
input voltage using Vrms=Vm/√2.
4. Now connect the multimeter at the secondary and measure the rms voltage of
the input signal. The rms voltage measured by both CRO and multimeter
must be same.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
5. Now connect the CRO across the load resistor and measure the maximum
voltage, Vm and time period, T of the output voltage. Calculate the rms and
average (dc) values of the output signal using
V rms = Vm / √2 and Vdc=Vavg = 2Vm / π.
6. Measure the AC and DC voltages across the load resistor using multimeter
and calculate the ripple factor as r = Vac / V dc
7. While finding ripple factor using CRO, use r =[ [(Vrms / Vdc )2 – 1]]1/2
8. Compare the measured ripple factor value with theoretical value.
9. Now close the switch ‘s’ to connect the capacitor filter across the load
resistor, RL then connect the CRO at output terminals and measure the both
ripple AC voltage and DC voltages. Calculate the ripple factor. Also measure
the time period T of ripple AC voltage.
10. Tabulate the values with filter and without filter.
Observations :
Fig C : Input Waveform
Fig D: Output Wave Form Without Filter
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Fig E: Output Wave form with filter
Tabular form:
Full-Wave
With Out Filter
With Filter
Rectifier
CRO
Multimeter
CRO
Multimeter
Vrms (V)
6.36
6.38
0.34
0.32
Vdc (V)
5.72
13.29
10
9.1
Ripple Factor, r
0.4808
0.4808
0.034
0.035
Precautions :
1. Connections must be given very carefully.
2. Readings should be taken with out any parallax error.
3. The applied voltage and current should not exceed the maximum ratings of
the diode.
Result:
Input and output waveform with and without filter of a full wave rectifiers are
observed. The ripple factor with and with out filter are calculated.
Inference:
The ripple factor of Full wave rectifier with filter is less compared to that with out filter.
Questions & Answers:
1.What are the limitations of half wave rectifier
A. Poor efficiency, less ripple factor
2. Give theoretical values for ripple factor and efficiency of center tapped
full wave rectifier.
A. r=0.48,η=81.2%
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
3. SCR CHARACTERISTICS
Aim:
a) To obtain the forward characteristics of SCR.
b) To identify the break over voltage at different gate voltages.
Apparatus Required:
Name of the
S. No
Equipment/Component
Specifications
Quantity
IH (max.)=4A
1
SCR(TYN 604)
P (max.)=10W
1
VH (max.)=5V
2
Variable resistor
0-10KΩ
1
3
Resistor - 1KΩ
1
4
Regulated Power Supply
Power rating=0.5w
Carbon type
0-30V,1A
5
Ammeters
0-50mA
2
6
Digital multimeter
4 ½ digit
1
1
Theory:
SCR acts as a switch when it is forward bias. When the gate is kept open IG = 0 and
the operation of SCR is similar to PNPN diode. When IG < 0 the break over voltage
required to allow the current through SCR is large. When IG > 0 less amount of break
over voltage is sufficient. With very large positive gate currents break over may occur
at a very low voltage such that the characteristic of SCR is similar to ordinary PN
diode. As the voltage at which SCR is switched ON can be controlled by varying gate
current. Once the SCR is turned ON, the gate losses control and cannot be used to
switch the device OFF. One way to turn the device OFF is by lowering the anode
current below the holding current by reducing the supply voltage below the holding
voltage, keeping the gate open. At this point even if the gate signal is removed the
device keeps ON conducting, till the current level is maintained to a minimum level of
holding current.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Circuit Diagram:
Fig A: SCR Characteristics
Procedure:
1. Connect the circuit as shown in Fig A.
2. Initially some gate current is applied by varying the V2.
3. Voltage V1 is slowly varied and different reading of ammeter (IA) and voltmeter
(VAK) are taken.
4. The voltage at which the SCR is triggered and heavy current flows is noted as
VBO, forward breakdown voltage.
5. Now apply the gate current more than IG.
6. Steps 3 & 4 are repeated and note down corresponding currents and voltages.
7. Draw the graph between VAK and IA at different gate currents.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Tabular form:
Applied
S. No
IG1 = 3mA
IG > IG1
Voltage,V1
(V)
VAK (V) IA (mA)
VAK (V) IA (mA)
1
0
0
0
0
0
2
1
1
1
1
1
3
2
2
1
2
1
4
3
3
1
3
1
5
4
4
1
4
1
6
5
5
1
1
4
7
6
6
1
1
6
8
7
1
6
1
8
9
8
1
12
1
10
10
9
1
14
1
14
11
10
1
16
1
16
12
11
1
20
1
18
13
12
1
22
1
20
14
13
1
24
1
22
Model Graph:
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Result:
The VI-characteristics of SCR are observed and Break over Voltage at different gate
currents is noted.
Inference:
It is observed that as applied gate current increases, the forward break over voltage
reduces & the device conducts early.
Questions:
1. What are the advantages of Thyristor Family?
A. Low power dissipation
2. Define the following terms
a) Holding current
b) Forward break over voltage
A. The minimum current at which SCR turns from OFF state to ON state is called
holding current.
The maximum forward voltage at which the current through SCR increases and
voltage across SCR drops is called forward break over voltage.
3. What are the different operating regions of SCR?
A. Forward breakdown region, Reverse breakdown region, and Forward conduction
region.
4. List the applications of SCR?
A. High power applications, switching applications, and controlled device.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
4. RC COUPLED AMPLIFIER
Aim:
To plot the frequency response characteristics of two stages RC coupled
amplifier.
Apparatus Required:
S. No
Name Of The
Specifications
Quantity.
____
1
Component/ Equipment
1
Two stage RC coupled
amplifier circuit board
2
Cathode Ray Oscilloscope
20 MHz
1
3
Signal Generator
0 -1MHZ
1
4
Regulated Power Supply
0-30V,1A
1
Theory:
To improve gain characteristics of an amplifier, two stages of CE amplifier can be
cascaded. While cascading, the output of one stage is connected to the input of
another stage. If R and C elements are used for coupling, that circuit is named as RC
coupled amplifier.
Each stage of the cascade amplifier should be biased at its designed level. It is
possible to design a multistage cascade in which each stage is separately biased
and coupled to the adjacent stage using blocking or coupling capacitors. In this circuit
each of the two capacitors c1 & c2 isolate the separate bias network by acting as open
circuits to dc and allow only signals of sufficient high frequency to pass through
cascade.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Circuit Diagram:
Fig A: Two stage RC Coupled Amplifier
Procedure:
1. Connect the circuit as per the circuit diagram.
2. Apply supply voltage, Vcc= 12V.
3. Now feed an ac signal of 20mV peak-peak at the input of the amplifier
with different frequencies ranging from 20Hz to 1MHz and measure
the amplifier output voltage, Vo.
4. Now calculate the gain in dB for various input signal frequencies using
AV = 20 log10 (V0/VS).
5. Draw a graph with frequencies on X- axis and gain in dB on Y- axis.
From graph calculate bandwidth.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Tabular Form:
Input voltage, VS = 20mV peak-peak
Output
Input Frequency
Voltage
(Hz)
peak-peak
S. No
Vo (mV)
Gain,
Av = 20log(Vo/Vs)
(dB)
3
50
100
200
22
25.5
58
0.82
02.11
09.24
4
5
6
7
8
9
10
11
12
13
14
15
500
1K
5K
10K
20K
50K
100K
200K
300K
500K
700K
1M
152
330
8500
8500
8500
8500
8500
8500
8500
8500
4000
900
17.61
24.34
52.56
52.56
52.56
52.56
52.56
52.56
52.56
52.56
46.02
33.06
1
2
Model Graph:
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Observations:
Maximum gain (Av) = 52.56dB
Lower cutoff frequency (Fl) = 4.5 KHz
Upper cutoff frequency (FH) =580 KHz
Band width (B.W) = (FH – FL) = 575.5 KHz
Gain bandwidth product = Av (B.W) = 30.24M Hz
Precautions:
1. Connections must be done very carefully.
2. Readings should be noted without any parallax error.
3. The applied voltage and current should not exceed the maximum ratings of
the given transistor.
Result:
Frequency response of RC Coupled Amplifier Characteristics of was observed.
Inference:
The bandwidth of RC coupled amplifier is large compared to CE amplifier.
Questions & Answers:
1. List different coupling methods
A.
a) Direct coupled
b) Transformer coupled
c) RC coupled
2. Define lower cut-off and upper cut-off frequencies
A. Lower cutoff frequency is defined as the frequency at which magnitude of voltage
gain in low frequency range falls to 1/√2 or 0.707 of magnitude of gain in mid
frequency range.
Upper cutoff frequency is defined as the frequency at which magnitude of voltage
gain in high frequency range falls to 1/√2 or 0.707 of magnitude of gain in mid
frequency range.
3. Define Band width
A. Bandwidth is defined as difference between upper & lower cutoff frequencies.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
5. VOLTAGE SERIES FEED BACK AMPLIFIER
Aim:
To find the gain of the Voltage Series feed back amplifier with &
without feedback.
Apparatus Required:
S. No
Name of the
Specifications
Quantity
Component/Equipment
1
Transistor( BC 107)
2
Resistors(100KΩ,47KΩ,
68KΩ,10KΩ,4.7KΩ)
Icmax=100mA
PD=300mw
Vceo=45V
Vbeo=50V
Power rating=0.5w
Carbon type
2
1
2
5
3
Capacitors(0.1µF,100µF)
Electrolytic type,
Voltage rating= 1.6v
4
1
4
Function generator
0 -1MHZ
1
5
Cathode Ray Oscilloscope
20 MHz
1
Theory:
The other name of voltage series feedback amplifier is shunt derived series fed
feedback amplifier. The fraction of output voltage is applied in series with input
voltage through feedback circuit. Feedback circuit shunt the output but in series with
input. So the output impedance is decreased while input impedance is increased.
The input & output impedance of an ideal voltage series feedback amplifier is infinite
& zero respectively. The resistor RE & capacitor CE are used to provide necessary
biasing for the amplifier with voltage series feed back gain of the amplifier decreases.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Circuit Diagram:
Fig A: Voltage Series Feed Back Amplifier
Procedure:
1. Make sure that the switch S is opened.
2. Apply a sine wave of 40mv peak to peak amplitude at 1 kHz from signal
generator to the input of amplifier circuit.
3. Measure the output amplitude VO (p-p) and Calculate the gain of amplifier
without feedback by using A =VO/VS.
4. Provide the voltage series feed back by closing the switch S and repeat steps
2 and 3 to find the gain with feed back AF = VO / VS.
5. Calculate the feedback factor β using AF = A / 1+Aβ.
6. Calculate theoretically β value from β = RE / (RE +R).
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Frequency Response:
Input ac voltage VS = 40 mV peak-peak
Frequency
(Hz)
1K
Output Voltage V0 (V)
Gain =20 log10(VO / VS)
(dB)
With out
With
With out
With
Feedback
Feedback
Feedback
Feedback
0.48
0.32
12
8
Model Graph:
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Precautions:
1. Connections must be given very carefully.
2. Readings should be noted without parallax error.
3. The applied voltage, current should not exceed the maximum rating of the
given transistor.
Result:
The theoretical and practical values of Gain with and without feed back and the
Factor (β) of voltage series feedback amplifier are determined.
Inference:
It is observed that the gain of the amplifier reduces with feed back and the band
width increases by the same amount.
Questions & Answers:
1.
Why Feed back used in amplifiers?
A.
To improve the amplifier characteristics with required manner.
2.
List various advantages of negative feedback
A. a) stabilizes the gain.
b) Increases bandwidth, input impedance.
c) Reduces output impedance, noise & distortions.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
6. CURRENT SERIES FEED BACK AMPLIFIER
Aim:
To find the gain of the Current Series feed back amplifier with & without
feedback.
Apparatus Required:
S. No
Name of the
Specifications
Quantity
Icmax=100mA
PD=300mw
Vceo=45V
Vbeo=50V
Power rating=0.5W
Carbon type
1
Component/ Equipment
1
Transistor( BC 107)
2
Resistor(470Ω,4.7kΩ,10KΩ)
1
2
3
Capacitors(0.1µF, 1µF)
Electrolytic type,
Voltage rating=0.6V
1
4
Function generator
0 -1MHZ
1
5
Cathode Ray Oscilloscope
20 MHz
1
Theory:
In Current series feedback amplifier, a feedback voltage is developed which is
proportional to the output current. This is called current feedback even though it is a
voltage that subtracts from the input voltage. One of the most common methods of
applying the current series feedback is to place RE between the emitter lead of a
common emitter amplifier and ground. When RE is properly bypassed with a large
capacitor CE , the output voltage is V0 and the voltage gain without feedback is A.
Resistor RE provides d.c bias stabilization, but no AC feedback. When the capacitor
CC is removed, an a.c voltage will be developed across RE due to the emitter current
flowing through it and this current is approximately equal to output collector current.
This voltage drop across RE will serve to decrease the input voltage between base
and emitter, so that the output voltage will decrease to V0I. The gain of amplifier with
negative feedback is now AF. With current series feed back both input and output
resistances increases.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Circuit Diagram:
Fig A: Current Series Feed Back Amplifier
Procedure:
1. Make sure that the switch S is closed.
2. Apply a sine wave of 40mv peak to peak amplitude at 1 kHz from signal
generator to the input of amplifier circuit.
3. Measure the output amplitude VO (p-p) and Calculate the gain of amplifier
without feedback by using A =VO/VS.
4. Provide the current series feed back by open the switch S and repeat steps 2
and 3 to find the gain with feed back AF = VO / VS.
5. Calculate the feedback factor β using AF = A / 1+Aβ.
6. Calculate theoretically β value from β = RE / (RE +R).
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Observations:
Input voltage VI = 40 mV.
Output Voltage ,Vo ( V)
Frequency
(Hz)
Gain =20 Log(VO / VI)
(dB)
With out
With
With out
With
Feedback
Feedback
Feedback
Feedback
0.6
0.36
15
9
1K
Model Graph:
Precautions:
1. Connections must be given very carefully.
2. Readings should be noted without parallax error.
3. The applied voltage, current should not exceed the maximum rating of the
given transistor.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Result:
The theoretical and practical values of Gain, feed back Factor of current series
feedback amplifier was determined.
Inference:
It is observed that the gain of the amplifier reduces with feed back and the band
width increases by the same amount.
Questions & Answers:
1. What is the difference between voltage series & current series feedback
amplifiers?
A. The output impedance of current series feedback amplifier is high when compared
with voltage series feedback amplifiers.
2. What is the other name of current series feedback amplifier?
A. The other name of current series feedback amplifier is Series derived series fed
feedback amplifier.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
7. RC PHASE SHIFT OSCILLATOR
Aim:
To determine the frequency of oscillations of an RC Phase shift oscillator.
Apparatus Required:
S. No
Name of the
Specifications
Quantity
Component/Equipment
1
Transistor( BC107)
Icmax=100mA
PD=300mw
Vceo=45V
Vbeo=50V
1
2
Resistors -
Power rating=0.5w
Carbon type
1
56KΩ,2.2KΩ,100KΩ,10KΩ
3
Capacitors(10µF/25V),0.01µF Electrolytic type
3
2
Voltage rating=1.6v
3
4
Potentiometer
0-10KΩ
1
5
Regulated Power Supply
0-30V,1A
1
6
Cathode Ray Oscilloscope
20 MHz
1
Theory:
In the RC phase shift oscillator, the combination RC provides self-bias for the
amplifier. The phase of the signal at the input gets reverse biased when it is amplified
by the amplifier. The output of amplifier goes to a feedback network consists of three
identical RC sections. Each RC section provides a phase shift of 600. Thus a total of
1800 phase shift is provided by the feedback network. The output of this circuit is in
the same phase as the input to the amplifier. The frequency of oscillations is given by
F=1/2π RC (6+4K)1/2
Where, R1=R2=R3=R,
C1=C2=C3=C and
K=RC/R.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Circuit Diagram:
Fig A. RC Phase shift Oscillator
Procedure:
1. Connect the circuit as shown in Fig A.
2. Switch on the power supply.
3. Connect the CRO at the output of the circuit.
4. Adjust the RE to get undistorted waveform.
5. Measure the Amplitude and Frequency.
6. Compare the theoretical and practical values.
7. Plot the graph amplitude versus frequency
Theoretical Values:
f = 1 / 2 π RC √6+4K
=1 / 2 π (10K) (0.01µF) √6+4(0.01)
= 647.59Hz
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Tabular Form:
S.NO
1
Theoretical
Practical
Frequency(Hz)
Frequency(Hz)
647.59
639.23
% Error
1.2
Model Graph:
Result:
The frequency of RC Phase Shift Oscillator is determined.
Inference:
It is observed that the RC phase shift oscillator produces low frequency oscillations at
audio frequencies.
Questions & Answers:
1. Define oscillator
A. The electronic circuit which produces the out put with out applying in put Ac
2. What is BARKHAUSEN CRITERION?
A. IABI=1 and Phase shift=0 or 360 degrees.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
OVERVIEW OF 8085 MICROPROCESSOR KIT
1.1 General Description:
Vmc-85/9 is single board microprocessor training /development kit configured around
the most widely used microprocessor of today’s world. Based on the 8085
microprocessor
It can be used to train engineers to control any industrial process and to develop
software for 8080and8085 based system. The kit communicates with the outside
world through a key board having 28 keys and seven segment hexadecimal displays.
The kit also has the capability of interacting with teletypewriter, CRT terminal and an
audio cassette recorder through the interfaces provided on the board. Other devices
like a serial printer or floppy drives etc. can be connected to the kit.Vmc-85/9
provides 2k byte of ram and 4k bytes of EPROM. The total on board memory can be
very easily expanded to 64k bytes in an appropriate combination of RAM and ROM.
The monitor is incorporated from 0000-0FFF and the necessary. 2k bytes of RAM
has an address of 2000-27FF.The input/output structure of VMC-85/9 provides 24
programmable I/O lines expandable to 48 I/O lines. It has got 16 bit programmable
Timer/Counter for generating any type of counting etc. The on board 8259 provides 8
level of interrupts .the onboard battery back up for RAM retains the memory content
in the case of power failure. The on board resident system monitor software is very
powerful and provides various software utilities. The kit provides various powerful
software commands like SEND, RECEIVE, INSERT, DELETE, BLOCK, MOVE,
RELOCATE, STRING, FILL& MEMORY COMPARE etc. which are very helpful in
debugging/developing the software.
VMC-85/9 is configured around the internationally adopted STD bus, which is the
most popular Bus for process control and real time applications. All the address, Data
and Control lines are available at the edge connector through the buffers. The kit is
fully expandable for any kind of application.
1.2 System Specification:
C.P.U
-
8bit Microprocessor, the 8085-A
MEMORY
-
Total on board capacity-64kbytes
RAM
-
2k bytes (6116), space for further expansion
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
ROM
-
4k bytes of EPROM loaded with powerful monitor program
(2732), space for further expansion using
2716/2732/2764/27128.
TIMER
-
16 bit programmable timer/counter using 8253
I/O
-
24 I/O lines expandable to 48 I/O using 8255 PPI
INTERRUPTS-
8 different level interrupts through 8259
KEYBOARD -
10 keys for command.
16 keys for hexadecimal data entry.
1 key for Vector interrupt and 1 key for reset
LED DISPLAY-
6 seven segment displays, 4 for address field.
BUS
All data, address and control signals (TTL compatible)
-
Available at edge connector.
INTERFACE -
1) Audio cassette recorder.
2)20 mA current loop through SID/SOD lines.
3) RS-232-c through SID/SOD lines with auto baud rate.
4) One RS-232-c through 8251 with a programmable baud
rate.
5) EPROM programmer
POWER SUPPLY -
+5V, 1.5 A for the kit
REQUIREMENT -
+12 V ±5%, 250mA for CRT and TTY.
-
+24 V ±5%, 100 mA for EPROM programmer interface
OPERATING TEMP - 0 to 50º C.
1.3 System Capabilities:
1) Examine the contents of any memory location.
2) Examine/modify the contents of any of the up internal register.
3) Modify the contents of any of the RAM location.
4) Move a block of data from one location to another location.
5) Insert one or more instructions in the user program.
6) Delete one or more instructions from the user program.
7) Relocate a program written for some memory area to some other memory area.
8) Find out a string of data lying at a particular address.
9) Fill a particular memory area with a constant.
10) Compare two blocks of memory.
11) Insert one or more data bytes in the user’s program/data entry.
12) Delete one or more data bytes from the user’s program/data area.
13) Transmit a program from memory to audio cassette recorder.
14) Receive a program into memory from Audio cassette Recorder
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
15) Check the contents of an EPROM for blank.
16) List the contents of an EPROM into RAM area.
17) Verify the contents of an EPROM with any memory area.
18) Program an EPROM.
19) *List a program or a block of data on the SIOD or prepare a paper tape.
20) Enter a program or a block of data from the SIOD using the paper tape.
21) Execute a program at full clock speed.
22) Execute a program in single step i.e , instruction by instruction.
23) Download HEX file to PC
(These facilities are available if serial I/O device are also connected to the kit).
Hardware Description:
General:
The system has got 8085-a as the Central processing unit. The clock frequency for
the system is 3.07MHz and is generated from a crystal of 6.14MHz. 8085 has got 8
data lines and 16 address lines. The lower 8 address lines and 8 bit data lines are
multiplexed. Since the lower 8 address bits appear on the bus during the first clock
cycle of a machine cycle and the 8 bit data appears on the bus during the second
and third clock cycle, it becomes necessary to latch the lower lower 8 address bits
during the first clock cycle so that the 16 bit address remains available in subsequent
cycles. This is achieved using a latch 74-LS-373.
Memory:
VMC-85/9 provides 2Kbytes of CMOS RAM using 6116 chip and 4Kbytes of EPROM
using 2732. The total on board memory can be expanded up to 64Kbytes. The
various chips which can be used are 2716, 2732, 2764, 27128, 6116 and 6264.
There are 6 memory spaces provided on VMC-85/9. These six pages are divided into
three blocks of two memory spaces each. Each memory space can define any
address slots from 0000-FFFF depending upon the size of the memory chip. Same
way any block (i.e, two memory spaces) can be defined to have any of the chips,
2716/2732/2764/ 27128/ 6116/ 6264.
I/O Devices:
The various I/O chips used in VMC-85/9 are 8279, 8255, 8253, 8251 and 8259. The
functional role of all these chips are given below:
8279:
8279 is a general purpose programmable keyboard and display I/O interface device
designed for use with the 8085 microprocessor. It provides a scanned interface to 28
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
contact key matrix provided in VMC-85/9 and scanned interface for the six 7-segment
displays. 8279 has got 16 X 8 display RAM which can be loaded or interrogated by
the CPU. When a key is pressed, its corresponding code is entered in FIFO queue of
8279 and can now be read by the microprocessor. 8279 also refreshes the display
RAM automatically.
8255:
8255 is a programmable peripheral interface (PPI) designed to use with 8085
microprocessor. This basically acts as a general purpose I/O component to interface
peripheral equipments to the system bus. It is not necessary to have an external logic
to interface with peripheral devices since the functional configuration of 8255 is
programmed by the system software. It has got three I/O ports of 8 lines each( PortA, Port-B, and Port-C). Port C can be divided into two ports of four lines each named
as Port C upper and Port C lower. Any I/O combination of Port A, Port B, Port C
upper and Port C lower can be defined using the appropriate software commands.
VMC-85/9 provides six I/O ports of 8 lines each using two 8255 chips.
8253:
This chip is a programmable interval timer/ counters and can be used for the
generation of accurate time delays under software control. Various other functions
can be implemented with this chip are programmable rate generator, event counter,
binary rate multiplier, real time clock etc. This chip has got three independent 16 bit
counters, each having a count rate of up to 2MHz. This first timer counter (Counter 0)
is being used for single step operation. The second timer counter (Counter 1) is
being used for generating programmable baud rate while using 8251. For single step
operation clock 0 signal of counter 0 is getting a clock frequency of 1.535MHz.
8251:
This chip is a programmable communication interface and is used as a peripheral
device. This device accepts data characters from the CPU in parallel format and then
converts them into serial data characters for the CPU. This chip will signal the CPU
whenever it can accept a new character for transmission or whenever it has received
a character for the CPU. The CPU can read the complete status of it at any time.
8251 has been utilized in VMC-85/9 for CRT terminal and TTY interface.
Display:
VMC-85/9 provides six digits of seven segment display. Four digits are for displaying
the address of any location or name of any register, where as rest of the two digits
are meant for displaying the contents of memory location or of a register. All the six
digits of the display are in hexadecimal notation.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Buffers:
Space has been provided on the board of VMC-85/9 for buffering the data, address
and control lines. One just needs to put buffers chips on the space provided for these
lines. All these address, data and control lines (TTL Compatible) are available to the
user at the PCB edge connector in the STD bus configuration. The buffer ICS used in
the VMC-85/9 are 74-LS-245 and 74-LS-240. In order to facilitate the multiprocessing
operation, all address, data and necessary control lines have been made Bidirectional.
Interface:
VMC-85/9 provides an interface for Audio Cassette Recorder. The user can store his
program into the recorder and can load back the program into the system memory as
and when required. The system provides two commands namely SEND AND
RECEIVE to store and to load from the Cassette tape. The subroutines required for
transmission and parallel to serial and serial to parallel conversion are all
incorporated into the system monitor program.
VMC-85/9 provides (0-20mA) current loop and RS-232-C interface through the SID
and SOD lines of 8085. The selection of (0-20mA) current loop and RS-232-C is
done by a switch at the left bottom side of the kit. An EPROM programmer interface
is provided on the board of kit to facilitate the programming of the 2716/2732/2732A/2764/27128-EPROMS. An additional RS232-C interface is provided through 8251
with programmable baud rate. Any serial device like printer, floppy drive or CRT
terminal etc. can be connected to it.
Battery back up:
The VMC-85/9 provides a battery back up for the onboard RAM area. The battery
back up circuitry is based around LM-393. Since each socket can be defined to have
6264 or 6116 chip also, the VCC to each memory socket is given through the Black
box-2. The VCC of all the memory sockets are brought at the Black box-2 named as
VCC M0 to VCC M5. Any RAM area to be backed up by battery, its corresponding VCC
M point should be connected to CMOS +5V point in the Black box-2 and other points
should be connected to VCC point.
ELECTRONIC DEVICES & CIRCUITS LAB
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Simple Programs using 8085 microprocessor:
Addition of two 8 – bit numbers:
Address
Hex
code
5100
5101
5102
5103
3A
00
41
47
5104
5105
5106
5107
3A
01
41
80
5108
5109
510A
510B
32
05
41
76
Mnemonic
Operand
LDA
4100
MOV
B, A
LDA
4101
ADD
B
STA
4105
HLT
Comments
Load the contents of accumulator
with the contents of memory
location 4100
Move
the
contents
of
accumulator into register B
Load the contents of accumulator
with the contents of memory
location 4101
Add the contents of accumulator
with the contents of register B
Store
the
contents
of
accumulator in 4105 memory
location
Stop the program.
Masking of lower nibble:
Address
Hex
code
5100
5101
5102
5103
5104
3A
00
41
E6
F0
5105
5106
5107
5108
32
01
41
76
Mnemonic
Operand
LDA
4100
ANI
F0 (H)
STA
4101
ELECTRONIC DEVICES & CIRCUITS LAB
HLT
Comments
Load the contents of accumulator
with the contents of memory
location 4100
The contents of accumulator are
logically AND ed with an
immediate data F0 (H)
Store
the
contents
of
accumulator in 4101 memory
location
Stop the program.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Subtraction of two 8 – bit numbers:
Address
Hex
code
5100
5101
5102
5103
3A
00
41
47
5104
5105
5106
5107
3A
01
41
80
5108
5109
510A
510B
32
05
41
76
Mnemonic
Operand
LDA
4100
MOV
B, A
LDA
4101
SUB
B
STA
4105
HLT
Comments
Load the contents of accumulator
with the contents of memory
location 4100
Move
the
contents
of
accumulator into register B
Load the contents of accumulator
with the contents of memory
location 4101
Subtract the contents of register
B
from
the
contents
of
accumulator
Store
the
contents
of
accumulator in 4105 memory
location
Stop the program.
1’s Complement of a given Byte:
Address
Hex
code
5100
5101
5102
5103
3A
00
41
2F
5104
5105
5106
5107
32
05
41
76
Mnemonic
Operand
LDA
4100
CMA
STA
4105
HLT
Comments
Load the contents of accumulator
with the contents of memory
location 4100
Complement the contents of
accumulator
Store
the
contents
of
accumulator in 4105 memory
location.
Stop the program.
2’s Complement of a given Byte:
Address
Hex
code
Mnemonic
Operand
5100
5101
5102
5103
3A
00
41
2F
LDA
4100
CMA
5104
3C
INR
A
5105
5106
5107
5108
32
05
41
76
STA
4105
ELECTRONIC DEVICES & CIRCUITS LAB
HLT
Comments
Load the contents of accumulator
with the contents of memory
location 4100
Complement the contents of
accumulator
The contents of accumulator are
incremented by ‘1’
Store
the
contents
of
accumulator in 4105 memory
location.
Stop the program.
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DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING
Addition of two 16 – bit numbers:
Address
Hex
code
5100
5101
5102
5103
2A
00
41
EB
5104
5105
5106
5107
2A
02
41
19
5108
5109
510A
510B
22
05
41
76
Mnemonic
Operand
Comments
LHLD
4100
Load HL pair the contents of
memory location 4100
LHLD
4102
Exchange the contents of HL pair
with the contents of DE pair
Load HL pair the contents of
memory location 4102
DAD
D
SHLD
4105
XCHG
HLT
Add the contents of HL register
pair with the contents of DE
register pair
Store the contents of HL pair in
4105 memory location
Stop the program.
Subtraction of two 16 – bit numbers:
Address
Hex
code
Mnemonic
Operand
Comments
5100
5101
5102
5103
2A
00
41
EB
LHLD
4100
Load HL pair the contents of
memory location 4100
LHLD
4102
Exchange the contents of HL pair
with the contents of DE pair
Load HL pair the contents of
memory location 4102
5104
5105
5106
5107
2A
02
41
7B
MOV
A, E
5108
95
SUB
L
5109
510A
510B
510C
32
04
41
7A
STA
4104
MOV
A, D
510D
94
SUB
H
510E
510F
5110
5111
32
05
41
76
STA
4105
ELECTRONIC DEVICES & CIRCUITS LAB
XCHG
HLT
Move the contents of register E
into accumulator
Subtract the contents of register
L
from
the
contents
of
accumulator
Store
the
contents
of
accumulator in 4104 memory
location
Move the contents of register D
into accumulator
Subtract the contents of register
H
from
the
contents
of
accumulator
Store
the
contents
of
accumulator in 4105 memory
location
Stop the program.
36